| /dalvik/vm/mterp/x86/ |
| H A D | OP_RETURN_WIDE.S | 8 GET_VREG_WORD %eax rINST 0 # eax<- v[AA+0]
9 GET_VREG_WORD rINST rINST 1 # rINST<- v[AA+1]
11 movl rINST,4+offThread_retval(%ecx)
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| H A D | OP_CONST.S | 4 movl rINST,rINST # rINST<- AA
7 SET_VREG %eax rINST # vAA<- eax
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| H A D | OP_CONST_4.S | 4 movl $$0xf,rINST
5 andl %eax,rINST # rINST<- A
9 SET_VREG %eax rINST
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| H A D | OP_MOVE_FROM16.S | 6 GET_VREG_R rINST rINST # rINST- fp[BBBB]
9 SET_VREG rINST %eax # fp[AA]<- ecx]
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| H A D | OP_MOVE_WIDE.S | 5 sarl $$4,rINST # rINST<- B
6 GET_VREG_WORD %eax rINST 0 # eax<- v[B+0]
7 GET_VREG_WORD rINST rINST 1 # rINST<- v[B+1]
9 SET_VREG_WORD rINST %ecx 1 # v[A+1]<- rINST
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| H A D | OP_MOVE.S | 6 shrl $$4,rINST # rINST<- B
7 GET_VREG_R rINST rINST
10 SET_VREG rINST %eax # fp[A]<-fp[B]
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| H A D | OP_MOVE_WIDE_FROM16.S | 6 GET_VREG_WORD rINST %ecx 0 # rINST<- v[BBBB+0]
8 SET_VREG_WORD rINST %eax 0 # v[AAAA+0]<- rINST
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| H A D | OP_ARRAY_LENGTH.S | 5 mov rINST,%eax # eax<- BA
6 sarl $$4,rINST # rINST<- B
7 GET_VREG_R %ecx rINST # ecx<- vB (object ref)
11 movl offArrayObject_length(%ecx),rINST
14 SET_VREG rINST %eax
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| H A D | OP_CONST_WIDE.S | 5 movl 6(rPC),rINST # rINST<- msw
7 movl rINST,4(%ecx)
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| H A D | OP_MOVE_WIDE_16.S | 6 GET_VREG_WORD rINST %ecx 0 # rINSTw_WORD<- v[BBBB+0]
8 SET_VREG_WORD rINST %eax 0 # v[AAAA+0]<- rINST
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| H A D | OP_MUL_INT_2ADDR.S | 4 sarl $$4,rINST # rINST<- B
5 GET_VREG_R %eax rINST # eax<- vB
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| H A D | binflop2addr.S | 11 sarl $$4,rINST # rINST<- B
12 $instr (rFP,rINST,4) # ex: faddp
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| H A D | binop2addr.S | 14 sarl $$4,rINST # rINST<- B
15 GET_VREG_R %eax rINST # eax<- vB
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| H A D | fpcvt.S | 7 sarl $$4,rINST # rINST<- B
8 $load (rFP,rINST,4) # %st0<- vB
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| H A D | shop2addr.S | 9 andb $$0xf,rINSTbl # rINST<- A
10 GET_VREG_R %eax rINST # eax<- vAA
13 SET_VREG $result rINST
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| H A D | unop.S | 8 sarl $$4,rINST # rINST<- B
9 GET_VREG_R %eax rINST # eax<- vB
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| /dalvik/vm/mterp/armv5te/ |
| H A D | OP_BREAKPOINT.S | 11 FETCH(rINST, 0) @ reload OP_BREAKPOINT + rest of inst
13 and rINST, #0xff00
14 orr rINST, rINST, r0
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| H A D | OP_MUL_LONG_2ADDR.S | 8 * again we stuff it into rINST.
11 mov r9, rINST, lsr #8 @ r9<- A+
12 mov r1, rINST, lsr #12 @ r1<- B
15 add rINST, rFP, r9, lsl #2 @ rINST<- &fp[A]
17 ldmia rINST, {r0-r1} @ r0/r1<- vAA/vAA+1
21 mov r0, rINST @ r0<- &fp[A] (free up rINST)
22 FETCH_ADVANCE_INST(1) @ advance rPC, load rINST
24 GET_INST_OPCODE(ip) @ extract opcode from rINST
[all...] |
| H A D | OP_CONST_16.S | 4 mov r3, rINST, lsr #8 @ r3<- AA
5 FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
7 GET_INST_OPCODE(ip) @ extract opcode from rINST
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| H A D | OP_MOVE_FROM16.S | 5 mov r0, rINST, lsr #8 @ r0<- AA
6 FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
8 GET_INST_OPCODE(ip) @ extract opcode from rINST
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| H A D | OP_MOVE_RESULT.S | 4 mov r2, rINST, lsr #8 @ r2<- AA
5 FETCH_ADVANCE_INST(1) @ advance rPC, load rINST
7 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| /dalvik/vm/mterp/mips/ |
| H A D | OP_BREAKPOINT.S | 11 FETCH(rINST, 0) # reload OP_BREAKPOINT + rest of inst
13 and rINST, 0xff00
14 or rINST, rINST, a0
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| H A D | OP_CONST_4.S | 3 sll a1, rINST, 16 # a1 <- Bxxx0000
5 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
8 GET_INST_OPCODE(t0) # ip <- opcode from rINST
|
| /dalvik/vm/compiler/template/ia32/ |
| H A D | header.S | 23 #define rINST %ebx define
|
| /dalvik/vm/mterp/armv6t2/ |
| H A D | OP_MUL_LONG_2ADDR.S | 8 * again we stuff it into rINST.
11 mov r1, rINST, lsr #12 @ r1<- B
12 ubfx r9, rINST, #8, #4 @ r9<- A
14 add rINST, rFP, r9, lsl #2 @ rINST<- &fp[A]
16 ldmia rINST, {r0-r1} @ r0/r1<- vAA/vAA+1
20 mov r0, rINST @ r0<- &fp[A] (free up rINST)
21 FETCH_ADVANCE_INST(1) @ advance rPC, load rINST
23 GET_INST_OPCODE(ip) @ extract opcode from rINST
[all...] |