Searched refs:CP0SRSC0_SRS3 (Results 1 - 2 of 2) sorted by relevance
| /external/qemu/target-mips/ | ||
| H A D | cpu.h | 236 #define CP0SRSC0_SRS3 20 macro |
| H A D | translate_init.c | 290 .CP0_SRSConf0 = (1 << CP0SRSC0_M) | (0x3fe << CP0SRSC0_SRS3) | |
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