Searched refs:CP0SRSCtl_ESS (Results 1 - 2 of 2) sorted by relevance
/external/qemu/target-mips/ | ||
H A D | cpu.h | 296 #define CP0SRSCtl_ESS 12 macro |
H A D | op_helper.c | 1201 uint32_t mask = (0xf << CP0SRSCtl_ESS) | (0xf << CP0SRSCtl_PSS); |
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