Searched refs:CondRHS (Results 1 - 4 of 4) sorted by relevance
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6849 // Operand List for BR_CC: Chain, CondCC, CondLHS, CondRHS, DestBB.
6853 SDValue CondLHS = N->getOperand(2), CondRHS = N->getOperand(3); local
6863 CondLHS, CondRHS, CC->get(), N->getDebugLoc(),
9461 SDNode *CondRHS = TheSelect->getOperand(1).getNode(); local
9464 (LLD->isPredecessorOf(CondLHS) || LLD->isPredecessorOf(CondRHS))) ||
9466 (RLD->isPredecessorOf(CondLHS) || RLD->isPredecessorOf(CondRHS))))
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| /external/clang/lib/Sema/ |
| H A D | SemaExpr.cpp | 5386 Expr *CondRHS; local
5388 if (!IsArithmeticBinaryExpr(Condition, &CondOpcode, &CondRHS))
5390 if (!ExprLooksBoolean(CondRHS))
5407 SourceRange(CondRHS->getLocStart(), RHSExpr->getLocEnd()));
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9263 SDValue CondRHS = N->getOperand(1); local
9270 if (DAG.isEqualTo(LHS, CondLHS) && DAG.isEqualTo(RHS, CondRHS)) {
9272 } else if (DAG.isEqualTo(LHS, CondRHS) && DAG.isEqualTo(RHS, CondLHS)) {
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 15475 SDValue CondRHS = Cond->getOperand(1); local
15481 Other->getOpcode() == ISD::SUB && DAG.isEqualTo(OpRHS, CondRHS))
15487 isSplatVector(CondRHS.getNode()) && isSplatVector(OpRHS.getNode())) {
15489 if (CondRHS.getConstantOperandVal(0) == -A-1)
15500 ISD::isBuildVectorAllZeros(CondRHS.getNode()) &&
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