CompilerTemplateAsm-armv5te.S revision 4c0dedfd9006daee4f6d96482cc6ac94a1797880
1ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 2ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * This file was generated automatically by gen-template.py for 'armv5te'. 3ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 4ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * --> DO NOT EDIT <-- 5ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 6ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 7ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/header.S */ 8ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 9ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Copyright (C) 2008 The Android Open Source Project 10ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 11ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Licensed under the Apache License, Version 2.0 (the "License"); 12ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * you may not use this file except in compliance with the License. 13ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * You may obtain a copy of the License at 14ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 15ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * http://www.apache.org/licenses/LICENSE-2.0 16ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 17ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Unless required by applicable law or agreed to in writing, software 18ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * distributed under the License is distributed on an "AS IS" BASIS, 19ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * See the License for the specific language governing permissions and 21ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * limitations under the License. 22ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 23ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 24ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng#if defined(WITH_JIT) 25ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 26ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 27ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * ARMv5 definitions and declarations. 28ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 29ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 30ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 31ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengARM EABI general notes: 32ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 33ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr0-r3 hold first 4 args to a method; they are not preserved across method calls 34ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr4-r8 are available for general use 35ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr9 is given special treatment in some situations, but not for us 36ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr10 (sl) seems to be generally available 37ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr11 (fp) is used by gcc (unless -fomit-frame-pointer is set) 38ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr12 (ip) is scratch -- not preserved across method calls 39ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr13 (sp) should be managed carefully in case a signal arrives 40ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr14 (lr) must be preserved 41ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr15 (pc) can be tinkered with directly 42ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 43ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr0 holds returns of <= 4 bytes 44ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr0-r1 hold returns of 8 bytes, low word in r0 45ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 46ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengCallee must save/restore r4+ (except r12) if it modifies them. 47ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 48ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengStack is "full descending". Only the arguments that don't fit in the first 4 49ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengregisters are placed on the stack. "sp" points at the first stacked argument 50ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng(i.e. the 5th arg). 51ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 52ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengVFP: single-precision results in s0, double-precision results in d0. 53ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 54ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengIn the EABI, "sp" must be 64-bit aligned on entry to a function, and any 55ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng64-bit quantities (long long, double) must be 64-bit aligned. 56ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng*/ 57ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 58ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 59ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengJIT and ARM notes: 60ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 61ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengThe following registers have fixed assignments: 62ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 63ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng reg nick purpose 64ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng r5 rFP interpreted frame pointer, used for accessing locals and args 65ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng r6 rGLUE MterpGlue pointer 66ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 67ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengThe following registers have fixed assignments in mterp but are scratch 68ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengregisters in compiled code 69ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 70ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng reg nick purpose 71ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng r4 rPC interpreted program counter, used for fetching instructions 721da12167d913efde56ec3b40491524b051679f2cAndy McFadden r7 rINST first 16-bit code unit of current instruction 731da12167d913efde56ec3b40491524b051679f2cAndy McFadden r8 rIBASE interpreted instruction base pointer, used for computed goto 74ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 75ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengMacros are provided for common operations. Each macro MUST emit only 76ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengone instruction to make instruction-counting easier. They MUST NOT alter 77ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengunspecified registers or condition codes. 78ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng*/ 79ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 80ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* single-purpose registers, given names for clarity */ 81ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng#define rPC r4 82ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng#define rFP r5 83ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng#define rGLUE r6 841da12167d913efde56ec3b40491524b051679f2cAndy McFadden#define rINST r7 851da12167d913efde56ec3b40491524b051679f2cAndy McFadden#define rIBASE r8 86ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 87ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 88ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Given a frame pointer, find the stack save area. 89ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 90ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * In C this is "((StackSaveArea*)(_fp) -1)". 91ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 92ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng#define SAVEAREA_FROM_FP(_reg, _fpreg) \ 93ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng sub _reg, _fpreg, #sizeofStackSaveArea 94ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 959a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee#define EXPORT_PC() \ 969a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)] 979a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee 98ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 99ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * This is a #include, not a %include, because we want the C pre-processor 100ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * to expand the macros into assembler assignment statements. 101ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 102ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng#include "../../../mterp/common/asm-constants.h" 103ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 104ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 105ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/platform.S */ 106ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 107ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * =========================================================================== 108ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * CPU-version-specific defines 109ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * =========================================================================== 110ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 111ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 112ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 113ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Macro for "MOV LR,PC / LDR PC,xxx", which is not allowed pre-ARMv5. 114ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Jump to subroutine. 115ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 116ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * May modify IP and LR. 117ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 118ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.macro LDR_PC_LR source 119ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov lr, pc 120ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr pc, \source 121ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.endm 122ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 123ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 124ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dvmCompilerTemplateStart 125ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .type dvmCompilerTemplateStart, %function 126ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .text 127ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 128ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdvmCompilerTemplateStart: 129ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 130ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* ------------------------------ */ 131ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .balign 4 132ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dvmCompiler_TEMPLATE_CMP_LONG 133ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdvmCompiler_TEMPLATE_CMP_LONG: 134ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_CMP_LONG.S */ 135ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* 136ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Compare two 64-bit values. Puts 0, 1, or -1 into the destination 137ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * register based on the results of the comparison. 138ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 139ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * We load the full values with LDM, but in practice many values could 140ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * be resolved by only looking at the high word. This could be made 141ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * faster or slower by splitting the LDM into a pair of LDRs. 142ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 143ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * If we just wanted to set condition flags, we could do this: 144ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * subs ip, r0, r2 145ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * sbcs ip, r1, r3 146ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * subeqs ip, r0, r2 147ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Leaving { <0, 0, >0 } in ip. However, we have to set it to a specific 148ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * integer value, which we can do with 2 conditional mov/mvn instructions 149ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * (set 1, set -1; if they're equal we already have 0 in ip), giving 150ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * us a constant 5-cycle path plus a branch at the end to the 151ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * instruction epilogue code. The multi-compare approach below needs 152ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 2 or 3 cycles + branch if the high word doesn't match, 6 + branch 153ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * in the worst case (the 64-bit values are equal). 154ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 155ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* cmp-long vAA, vBB, vCC */ 156ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng cmp r1, r3 @ compare (vBB+1, vCC+1) 157ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng blt .LTEMPLATE_CMP_LONG_less @ signed compare on high part 158ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bgt .LTEMPLATE_CMP_LONG_greater 159ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng subs r0, r0, r2 @ r0<- r0 - r2 160ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bxeq lr 161ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bhi .LTEMPLATE_CMP_LONG_greater @ unsigned compare on low part 162ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.LTEMPLATE_CMP_LONG_less: 163ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mvn r0, #0 @ r0<- -1 164ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bx lr 165ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.LTEMPLATE_CMP_LONG_greater: 166ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r0, #1 @ r0<- 1 167ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bx lr 168ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 169ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 170ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* ------------------------------ */ 171ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .balign 4 172ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dvmCompiler_TEMPLATE_RETURN 173ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdvmCompiler_TEMPLATE_RETURN: 174ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_RETURN.S */ 175ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* 176ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Unwind a frame from the Dalvik stack for compiled OP_RETURN_XXX. 177ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * If the stored value in returnAddr 178ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * is non-zero, the caller is compiled by the JIT thus return to the 179ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * address in the code cache following the invoke instruction. Otherwise 180ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * return to the special dvmJitToInterpNoChain entry point. 181ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 182ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng SAVEAREA_FROM_FP(r0, rFP) @ r0<- saveArea (old) 183ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r10, [r0, #offStackSaveArea_prevFrame] @ r10<- saveArea->prevFrame 184ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r8, [rGLUE, #offGlue_pSelfSuspendCount] @ r8<- &suspendCount 185ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc 18697319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao#if !defined(WITH_SELF_VERIFICATION) 187ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r9, [r0, #offStackSaveArea_returnAddr] @ r9<- chaining cell ret 18897319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao#else 18997319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao mov r9, #0 @ disable chaining 19097319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao#endif 191ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r2, [r10, #(offStackSaveArea_method - sizeofStackSaveArea)] 192ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ r2<- method we're returning to 193ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r3, [rGLUE, #offGlue_self] @ r3<- glue->self 194ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng cmp r2, #0 @ break frame? 19597319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao#if !defined(WITH_SELF_VERIFICATION) 196ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng beq 1f @ bail to interpreter 19797319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao#else 19897319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao blxeq lr @ punt to interpreter and compare state 19997319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao#endif 2006c10a977ec892c26c8e306356491833bbb073d40Ben Cheng ldr r1, .LdvmJitToInterpNoChain @ defined in footer.S 201ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov rFP, r10 @ publish new FP 202ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldrne r10, [r2, #offMethod_clazz] @ r10<- method->clazz 203ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r8, [r8] @ r8<- suspendCount 204ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 205ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str r2, [rGLUE, #offGlue_method]@ glue->method = newSave->method 2066c10a977ec892c26c8e306356491833bbb073d40Ben Cheng ldr r0, [r10, #offClassObject_pDvmDex] @ r0<- method->clazz->pDvmDex 207ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str rFP, [r3, #offThread_curFrame] @ self->curFrame = fp 208ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng add rPC, rPC, #6 @ publish new rPC (advance 6 bytes) 2096c10a977ec892c26c8e306356491833bbb073d40Ben Cheng str r0, [rGLUE, #offGlue_methodClassDex] 210ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng cmp r8, #0 @ check the suspendCount 211ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng movne r9, #0 @ clear the chaining cell address 212ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng cmp r9, #0 @ chaining cell exists? 213ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng blxne r9 @ jump to the chaining cell 2146c10a977ec892c26c8e306356491833bbb073d40Ben Cheng#if defined(EXIT_STATS) 2156c10a977ec892c26c8e306356491833bbb073d40Ben Cheng mov r0, #kCallsiteInterpreted 2166c10a977ec892c26c8e306356491833bbb073d40Ben Cheng#endif 2176c10a977ec892c26c8e306356491833bbb073d40Ben Cheng mov pc, r1 @ callsite is interpreted 218ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng1: 219ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng stmia rGLUE, {rPC, rFP} @ SAVE_PC_FP_TO_GLUE() 220ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r2, .LdvmMterpStdBail @ defined in footer.S 221ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r1, #0 @ changeInterp = false 222ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r0, rGLUE @ Expecting rGLUE in r0 223ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng blx r2 @ exit the interpreter 224ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 225ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* ------------------------------ */ 226ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .balign 4 227ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dvmCompiler_TEMPLATE_INVOKE_METHOD_NO_OPT 228ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdvmCompiler_TEMPLATE_INVOKE_METHOD_NO_OPT: 229ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_INVOKE_METHOD_NO_OPT.S */ 230ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* 231ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * For polymorphic callsites - setup the Dalvik frame and load Dalvik PC 232ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * into rPC then jump to dvmJitToInterpNoChain to dispatch the 233ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * runtime-resolved callee. 234ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 235ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ r0 = methodToCall, r1 = returnCell, rPC = dalvikCallsite 236ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize 237ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize 238ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r9, [rGLUE, #offGlue_interpStackEnd] @ r9<- interpStackEnd 239ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r8, [rGLUE, #offGlue_pSelfSuspendCount] @ r8<- &suspendCount 240ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng add r3, r1, #1 @ Thumb addr is odd 241ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area 242ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize) 243ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng SAVEAREA_FROM_FP(r10, r1) @ r10<- stack save area 244ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng sub r10, r10, r2, lsl #2 @ r10<- bottom (newsave - outsSize) 245ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r8, [r8] @ r3<- suspendCount (int) 246ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng cmp r10, r9 @ bottom < interpStackEnd? 247ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bxlt lr @ return to raise stack overflow excep. 248ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ r1 = newFP, r0 = methodToCall, r3 = returnCell, rPC = dalvikCallsite 249ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r9, [r0, #offMethod_clazz] @ r9<- method->clazz 250ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r10, [r0, #offMethod_accessFlags] @ r10<- methodToCall->accessFlags 251ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str rPC, [rFP, #(offStackSaveArea_currentPc - sizeofStackSaveArea)] 252ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str rPC, [r1, #(offStackSaveArea_savedPc - sizeofStackSaveArea)] 253ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr rPC, [r0, #offMethod_insns] @ rPC<- methodToCall->insns 254ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 255ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 256ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ set up newSaveArea 257ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)] 258ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)] 259ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)] 260ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng cmp r8, #0 @ suspendCount != 0 261ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bxne lr @ bail to the interpreter 262ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng tst r10, #ACC_NATIVE 26397319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao#if !defined(WITH_SELF_VERIFICATION) 264ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bne .LinvokeNative 26597319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao#else 26697319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao bxne lr @ bail to the interpreter 26797319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao#endif 268ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 269ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r10, .LdvmJitToInterpNoChain 270ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r3, [r9, #offClassObject_pDvmDex] @ r3<- method->clazz->pDvmDex 271ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r2, [rGLUE, #offGlue_self] @ r2<- glue->self 272ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 273ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ Update "glue" values for the new method 274ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str r0, [rGLUE, #offGlue_method] @ glue->method = methodToCall 275ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str r3, [rGLUE, #offGlue_methodClassDex] @ glue->methodClassDex = ... 276ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov rFP, r1 @ fp = newFp 277ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str rFP, [r2, #offThread_curFrame] @ self->curFrame = newFp 278ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 279ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ Start executing the callee 2806c10a977ec892c26c8e306356491833bbb073d40Ben Cheng#if defined(EXIT_STATS) 2816c10a977ec892c26c8e306356491833bbb073d40Ben Cheng mov r0, #kInlineCacheMiss 2826c10a977ec892c26c8e306356491833bbb073d40Ben Cheng#endif 283ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov pc, r10 @ dvmJitToInterpNoChain 284ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 285ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* ------------------------------ */ 286ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .balign 4 287ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dvmCompiler_TEMPLATE_INVOKE_METHOD_CHAIN 288ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdvmCompiler_TEMPLATE_INVOKE_METHOD_CHAIN: 289ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_INVOKE_METHOD_CHAIN.S */ 290ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* 291ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * For monomorphic callsite, setup the Dalvik frame and return to the 292ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Thumb code through the link register to transfer control to the callee 293ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * method through a dedicated chaining cell. 294ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 295ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ r0 = methodToCall, r1 = returnCell, rPC = dalvikCallsite 29638329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng @ methodToCall is guaranteed to be non-native 29738329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng.LinvokeChain: 298ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize 299ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize 300ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r9, [rGLUE, #offGlue_interpStackEnd] @ r9<- interpStackEnd 301ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r8, [rGLUE, #offGlue_pSelfSuspendCount] @ r8<- &suspendCount 302ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng add r3, r1, #1 @ Thumb addr is odd 303ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area 304ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize) 305ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng SAVEAREA_FROM_FP(r10, r1) @ r10<- stack save area 306ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng add r12, lr, #2 @ setup the punt-to-interp address 307ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng sub r10, r10, r2, lsl #2 @ r10<- bottom (newsave - outsSize) 308ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r8, [r8] @ r3<- suspendCount (int) 309ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng cmp r10, r9 @ bottom < interpStackEnd? 310ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bxlt r12 @ return to raise stack overflow excep. 311ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ r1 = newFP, r0 = methodToCall, r3 = returnCell, rPC = dalvikCallsite 312ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r9, [r0, #offMethod_clazz] @ r9<- method->clazz 313ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str rPC, [rFP, #(offStackSaveArea_currentPc - sizeofStackSaveArea)] 314ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str rPC, [r1, #(offStackSaveArea_savedPc - sizeofStackSaveArea)] 315ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr rPC, [r0, #offMethod_insns] @ rPC<- methodToCall->insns 316ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 317ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 318ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ set up newSaveArea 319ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)] 320ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)] 321ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)] 322ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng cmp r8, #0 @ suspendCount != 0 323ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bxne r12 @ bail to the interpreter 324ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 325ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r3, [r9, #offClassObject_pDvmDex] @ r3<- method->clazz->pDvmDex 326ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r2, [rGLUE, #offGlue_self] @ r2<- glue->self 327ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 328ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ Update "glue" values for the new method 329ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str r0, [rGLUE, #offGlue_method] @ glue->method = methodToCall 330ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str r3, [rGLUE, #offGlue_methodClassDex] @ glue->methodClassDex = ... 331ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov rFP, r1 @ fp = newFp 332ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str rFP, [r2, #offThread_curFrame] @ self->curFrame = newFp 333ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 334ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bx lr @ return to the callee-chaining cell 335ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 336ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 337ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 338ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* ------------------------------ */ 339ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .balign 4 34038329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng .global dvmCompiler_TEMPLATE_INVOKE_METHOD_PREDICTED_CHAIN 34138329f5678fd7a4879528b02a0ab60322d38a897Ben ChengdvmCompiler_TEMPLATE_INVOKE_METHOD_PREDICTED_CHAIN: 34238329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng/* File: armv5te/TEMPLATE_INVOKE_METHOD_PREDICTED_CHAIN.S */ 34338329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng /* 34438329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * For polymorphic callsite, check whether the cached class pointer matches 34538329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * the current one. If so setup the Dalvik frame and return to the 34638329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * Thumb code through the link register to transfer control to the callee 34738329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * method through a dedicated chaining cell. 34838329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * 34989efc3d632adfa076bd622369b1ad8e4b49cf20eBill Buzbee * The predicted chaining cell is declared in ArmLIR.h with the 35038329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * following layout: 35138329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * 35238329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * typedef struct PredictedChainingCell { 35338329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * u4 branch; 35438329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * const ClassObject *clazz; 35538329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * const Method *method; 35638329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * u4 counter; 35738329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * } PredictedChainingCell; 35838329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * 35938329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * Upon returning to the callsite: 36038329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * - lr : to branch to the chaining cell 36138329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * - lr+2: to punt to the interpreter 36238329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * - lr+4: to fully resolve the callee and may rechain. 36338329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * r3 <- class 36438329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * r9 <- counter 36538329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng */ 36638329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng @ r0 = this, r1 = returnCell, r2 = predictedChainCell, rPC = dalvikCallsite 36738329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldr r3, [r0, #offObject_clazz] @ r3 <- this->class 36838329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldr r8, [r2, #4] @ r8 <- predictedChainCell->clazz 36938329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldr r0, [r2, #8] @ r0 <- predictedChainCell->method 37038329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldr r9, [r2, #12] @ r9 <- predictedChainCell->counter 37138329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng cmp r3, r8 @ predicted class == actual class? 37238329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng beq .LinvokeChain @ predicted chain is valid 37338329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldr r7, [r3, #offClassObject_vtable] @ r7 <- this->class->vtable 37438329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng sub r1, r9, #1 @ count-- 37538329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng str r1, [r2, #12] @ write back to PredictedChainingCell->counter 37638329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng add lr, lr, #4 @ return to fully-resolve landing pad 37738329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng /* 37838329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * r1 <- count 37938329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * r2 <- &predictedChainCell 38038329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * r3 <- this->class 38138329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * r4 <- dPC 38238329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng * r7 <- this->class->vtable 38338329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng */ 38438329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng bx lr 38538329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng 38638329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng/* ------------------------------ */ 38738329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng .balign 4 38838329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng .global dvmCompiler_TEMPLATE_INVOKE_METHOD_NATIVE 38938329f5678fd7a4879528b02a0ab60322d38a897Ben ChengdvmCompiler_TEMPLATE_INVOKE_METHOD_NATIVE: 39038329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng/* File: armv5te/TEMPLATE_INVOKE_METHOD_NATIVE.S */ 39138329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng @ r0 = methodToCall, r1 = returnCell, rPC = dalvikCallsite 39238329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize 39338329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldr r9, [rGLUE, #offGlue_interpStackEnd] @ r9<- interpStackEnd 39438329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldr r8, [rGLUE, #offGlue_pSelfSuspendCount] @ r8<- &suspendCount 39538329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng add r3, r1, #1 @ Thumb addr is odd 39638329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area 39738329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize) 39838329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng SAVEAREA_FROM_FP(r10, r1) @ r10<- stack save area 39938329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldr r8, [r8] @ r3<- suspendCount (int) 40038329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng cmp r10, r9 @ bottom < interpStackEnd? 40138329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng bxlt lr @ return to raise stack overflow excep. 40238329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng @ r1 = newFP, r0 = methodToCall, r3 = returnCell, rPC = dalvikCallsite 40338329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng str rPC, [rFP, #(offStackSaveArea_currentPc - sizeofStackSaveArea)] 40438329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng str rPC, [r1, #(offStackSaveArea_savedPc - sizeofStackSaveArea)] 40538329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldr rPC, [r0, #offMethod_insns] @ rPC<- methodToCall->insns 40638329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng 40738329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng 40838329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng @ set up newSaveArea 40938329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)] 41038329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)] 41138329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldr r3, [rGLUE, #offGlue_self] @ r3<- glue->self 41238329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)] 41338329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng cmp r8, #0 @ suspendCount != 0 41438329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldr r8, [r0, #offMethod_nativeFunc] @ r8<- method->nativeFunc 41597319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao#if !defined(WITH_SELF_VERIFICATION) 41638329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng bxne lr @ bail to the interpreter 41797319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao#else 41897319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao bx lr @ bail to interpreter unconditionally 41997319a8a234e9fe1cf90ca39aa6eca37d729afd5Jeff Hao#endif 42038329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng 42138329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng @ go ahead and transfer control to the native code 422d5ab726b65d7271be261864c7e224fb90bfe06e0Andy McFadden ldr r9, [r3, #offThread_jniLocal_topCookie] @ r9<- thread->localRef->... 42338329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng str r1, [r3, #offThread_curFrame] @ self->curFrame = newFp 424d5ab726b65d7271be261864c7e224fb90bfe06e0Andy McFadden str r9, [r1, #(offStackSaveArea_localRefCookie - sizeofStackSaveArea)] 425d5ab726b65d7271be261864c7e224fb90bfe06e0Andy McFadden @ newFp->localRefCookie=top 42638329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng mov r9, r3 @ r9<- glue->self (preserve) 42738329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng SAVEAREA_FROM_FP(r10, r1) @ r10<- new stack save area 42838329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng 42938329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng mov r2, r0 @ r2<- methodToCall 43038329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng mov r0, r1 @ r0<- newFP 43138329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng add r1, rGLUE, #offGlue_retval @ r1<- &retval 43238329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng 43338329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng blx r8 @ off to the native code 43438329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng 43538329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng @ native return; r9=self, r10=newSaveArea 43638329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng @ equivalent to dvmPopJniLocals 43738329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldr r2, [r10, #offStackSaveArea_returnAddr] @ r2 = chaining cell ret 438d5ab726b65d7271be261864c7e224fb90bfe06e0Andy McFadden ldr r0, [r10, #offStackSaveArea_localRefCookie] @ r0<- saved->top 43938329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng ldr r1, [r9, #offThread_exception] @ check for exception 44038329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng str rFP, [r9, #offThread_curFrame] @ self->curFrame = fp 44138329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng cmp r1, #0 @ null? 442d5ab726b65d7271be261864c7e224fb90bfe06e0Andy McFadden str r0, [r9, #offThread_jniLocal_topCookie] @ new top <- old top 44338329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng bne .LhandleException @ no, handle exception 44438329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng bx r2 44538329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng 44638329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng 44738329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng/* ------------------------------ */ 44838329f5678fd7a4879528b02a0ab60322d38a897Ben Cheng .balign 4 449ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dvmCompiler_TEMPLATE_CMPG_DOUBLE 450ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdvmCompiler_TEMPLATE_CMPG_DOUBLE: 451ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_CMPG_DOUBLE.S */ 452ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_CMPL_DOUBLE.S */ 453ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* 4541465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * For the JIT: incoming arguments in r0-r1, r2-r3 455ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * result in r0 456ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 457ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Compare two floating-point values. Puts 0, 1, or -1 into the 458ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * destination register based on the results of the comparison. 459ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 460ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Provide a "naninst" instruction that puts 1 or -1 into r1 depending 461ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * on what value we'd like to return when one of the operands is NaN. 462ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 463ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * See OP_CMPL_FLOAT for an explanation. 464ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 465ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * For: cmpl-double, cmpg-double 466ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 467ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* op vAA, vBB, vCC */ 4681465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee push {r0-r3} @ save operands 4691465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee mov r11, lr @ save return address 470ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng LDR_PC_LR ".L__aeabi_cdcmple" @ PIC way of "bl __aeabi_cdcmple" 471ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bhi .LTEMPLATE_CMPG_DOUBLE_gt_or_nan @ C set and Z clear, disambiguate 472ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mvncc r0, #0 @ (less than) r1<- -1 473ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng moveq r0, #0 @ (equal) r1<- 0, trumps less than 4741465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee add sp, #16 @ drop unused operands 4751465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bx r11 476ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 477ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ Test for NaN with a second comparison. EABI forbids testing bit 478ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ patterns, and we can't represent 0x7fc00000 in immediate form, so 479ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ make the library call. 480ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.LTEMPLATE_CMPG_DOUBLE_gt_or_nan: 4811465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee pop {r2-r3} @ restore operands in reverse order 4821465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee pop {r0-r1} @ restore operands in reverse order 483ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng LDR_PC_LR ".L__aeabi_cdcmple" @ r0<- Z set if eq, C clear if < 484ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng movcc r0, #1 @ (greater than) r1<- 1 4851465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bxcc r11 486ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r0, #1 @ r1<- 1 or -1 for NaN 4871465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bx r11 488ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 489ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 490ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 491ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* ------------------------------ */ 492ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .balign 4 493ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dvmCompiler_TEMPLATE_CMPL_DOUBLE 494ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdvmCompiler_TEMPLATE_CMPL_DOUBLE: 495ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_CMPL_DOUBLE.S */ 496ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* 4971465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * For the JIT: incoming arguments in r0-r1, r2-r3 498ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * result in r0 499ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 500ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Compare two floating-point values. Puts 0, 1, or -1 into the 501ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * destination register based on the results of the comparison. 502ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 503ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Provide a "naninst" instruction that puts 1 or -1 into r1 depending 504ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * on what value we'd like to return when one of the operands is NaN. 505ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 506ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * See OP_CMPL_FLOAT for an explanation. 507ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 508ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * For: cmpl-double, cmpg-double 509ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 510ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* op vAA, vBB, vCC */ 5111465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee push {r0-r3} @ save operands 5121465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee mov r11, lr @ save return address 513ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng LDR_PC_LR ".L__aeabi_cdcmple" @ PIC way of "bl __aeabi_cdcmple" 514ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bhi .LTEMPLATE_CMPL_DOUBLE_gt_or_nan @ C set and Z clear, disambiguate 515ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mvncc r0, #0 @ (less than) r1<- -1 516ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng moveq r0, #0 @ (equal) r1<- 0, trumps less than 5171465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee add sp, #16 @ drop unused operands 5181465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bx r11 519ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 520ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ Test for NaN with a second comparison. EABI forbids testing bit 521ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ patterns, and we can't represent 0x7fc00000 in immediate form, so 522ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ make the library call. 523ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.LTEMPLATE_CMPL_DOUBLE_gt_or_nan: 5241465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee pop {r2-r3} @ restore operands in reverse order 5251465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee pop {r0-r1} @ restore operands in reverse order 526ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng LDR_PC_LR ".L__aeabi_cdcmple" @ r0<- Z set if eq, C clear if < 527ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng movcc r0, #1 @ (greater than) r1<- 1 5281465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bxcc r11 529ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mvn r0, #0 @ r1<- 1 or -1 for NaN 5301465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bx r11 531ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 532ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 533ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* ------------------------------ */ 534ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .balign 4 535ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dvmCompiler_TEMPLATE_CMPG_FLOAT 536ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdvmCompiler_TEMPLATE_CMPG_FLOAT: 537ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_CMPG_FLOAT.S */ 538ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_CMPL_FLOAT.S */ 539ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* 5401465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * For the JIT: incoming arguments in r0-r1, r2-r3 541ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * result in r0 542ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 543ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Compare two floating-point values. Puts 0, 1, or -1 into the 544ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * destination register based on the results of the comparison. 545ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 546ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Provide a "naninst" instruction that puts 1 or -1 into r1 depending 547ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * on what value we'd like to return when one of the operands is NaN. 548ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 549ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * The operation we're implementing is: 550ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * if (x == y) 551ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * return 0; 552ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * else if (x < y) 553ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * return -1; 554ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * else if (x > y) 555ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * return 1; 556ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * else 557ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * return {-1,1}; // one or both operands was NaN 558ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 559ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * The straightforward implementation requires 3 calls to functions 560ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * that return a result in r0. We can do it with two calls if our 561ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * EABI library supports __aeabi_cfcmple (only one if we want to check 562ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * for NaN directly): 563ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * check x <= y 564ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * if <, return -1 565ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * if ==, return 0 566ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * check y <= x 567ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * if <, return 1 568ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * return {-1,1} 569ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 570ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * for: cmpl-float, cmpg-float 571ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 572ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* op vAA, vBB, vCC */ 573ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r9, r0 @ Save copies - we may need to redo 574ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r10, r1 5751465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee mov r11, lr @ save return address 576ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng LDR_PC_LR ".L__aeabi_cfcmple" @ cmp <=: C clear if <, Z set if eq 577ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bhi .LTEMPLATE_CMPG_FLOAT_gt_or_nan @ C set and Z clear, disambiguate 578ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mvncc r0, #0 @ (less than) r0<- -1 579ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng moveq r0, #0 @ (equal) r0<- 0, trumps less than 5801465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bx r11 581ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ Test for NaN with a second comparison. EABI forbids testing bit 582ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ patterns, and we can't represent 0x7fc00000 in immediate form, so 583ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ make the library call. 584ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.LTEMPLATE_CMPG_FLOAT_gt_or_nan: 5851465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee mov r0, r10 @ restore in reverse order 5861465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee mov r1, r9 587ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng LDR_PC_LR ".L__aeabi_cfcmple" @ r0<- Z set if eq, C clear if < 588ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng movcc r0, #1 @ (greater than) r1<- 1 5891465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bxcc r11 590ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r0, #1 @ r1<- 1 or -1 for NaN 5911465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bx r11 592ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 593ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 594ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 595ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 596ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* ------------------------------ */ 597ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .balign 4 598ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dvmCompiler_TEMPLATE_CMPL_FLOAT 599ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdvmCompiler_TEMPLATE_CMPL_FLOAT: 600ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_CMPL_FLOAT.S */ 601ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* 6021465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * For the JIT: incoming arguments in r0-r1, r2-r3 603ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * result in r0 604ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 605ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Compare two floating-point values. Puts 0, 1, or -1 into the 606ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * destination register based on the results of the comparison. 607ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 608ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Provide a "naninst" instruction that puts 1 or -1 into r1 depending 609ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * on what value we'd like to return when one of the operands is NaN. 610ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 611ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * The operation we're implementing is: 612ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * if (x == y) 613ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * return 0; 614ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * else if (x < y) 615ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * return -1; 616ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * else if (x > y) 617ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * return 1; 618ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * else 619ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * return {-1,1}; // one or both operands was NaN 620ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 621ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * The straightforward implementation requires 3 calls to functions 622ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * that return a result in r0. We can do it with two calls if our 623ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * EABI library supports __aeabi_cfcmple (only one if we want to check 624ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * for NaN directly): 625ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * check x <= y 626ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * if <, return -1 627ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * if ==, return 0 628ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * check y <= x 629ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * if <, return 1 630ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * return {-1,1} 631ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 632ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * for: cmpl-float, cmpg-float 633ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 634ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* op vAA, vBB, vCC */ 635ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r9, r0 @ Save copies - we may need to redo 636ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r10, r1 6371465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee mov r11, lr @ save return address 638ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng LDR_PC_LR ".L__aeabi_cfcmple" @ cmp <=: C clear if <, Z set if eq 639ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bhi .LTEMPLATE_CMPL_FLOAT_gt_or_nan @ C set and Z clear, disambiguate 640ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mvncc r0, #0 @ (less than) r0<- -1 641ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng moveq r0, #0 @ (equal) r0<- 0, trumps less than 6421465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bx r11 643ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ Test for NaN with a second comparison. EABI forbids testing bit 644ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ patterns, and we can't represent 0x7fc00000 in immediate form, so 645ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ make the library call. 646ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.LTEMPLATE_CMPL_FLOAT_gt_or_nan: 6471465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee mov r0, r10 @ restore in reverse order 6481465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee mov r1, r9 649ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng LDR_PC_LR ".L__aeabi_cfcmple" @ r0<- Z set if eq, C clear if < 650ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng movcc r0, #1 @ (greater than) r1<- 1 6511465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bxcc r11 652ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mvn r0, #0 @ r1<- 1 or -1 for NaN 6531465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bx r11 654ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 655ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 656ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 657ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* ------------------------------ */ 658ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .balign 4 659ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dvmCompiler_TEMPLATE_MUL_LONG 660ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdvmCompiler_TEMPLATE_MUL_LONG: 661ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_MUL_LONG.S */ 662ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* 663ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Signed 64-bit integer multiply. 664ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 665ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * For JIT: op1 in r0/r1, op2 in r2/r3, return in r0/r1 666ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 667ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Consider WXxYZ (r1r0 x r3r2) with a long multiply: 668ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * WX 669ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * x YZ 670ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * -------- 671ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * ZW ZX 672ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * YW YX 673ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 674ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * The low word of the result holds ZX, the high word holds 675ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * (ZW+YX) + (the high overflow from ZX). YW doesn't matter because 676ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * it doesn't fit in the low 64 bits. 677ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 678ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Unlike most ARM math operations, multiply instructions have 679ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * restrictions on using the same register more than once (Rd and Rm 680ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * cannot be the same). 681ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 682ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* mul-long vAA, vBB, vCC */ 683ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mul ip, r2, r1 @ ip<- ZxW 684ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng umull r9, r10, r2, r0 @ r9/r10 <- ZxX 685ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mla r2, r0, r3, ip @ r2<- YxX + (ZxW) 686ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng add r10, r2, r10 @ r10<- r10 + low(ZxW + (YxX)) 687ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r0,r9 688ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r1,r10 689ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bx lr 690ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 691ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* ------------------------------ */ 692ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .balign 4 693ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dvmCompiler_TEMPLATE_SHL_LONG 694ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdvmCompiler_TEMPLATE_SHL_LONG: 695ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_SHL_LONG.S */ 696ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* 697ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Long integer shift. This is different from the generic 32/64-bit 698ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * binary operations because vAA/vBB are 64-bit but vCC (the shift 699ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * distance) is 32-bit. Also, Dalvik requires us to ignore all but the low 700ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 6 bits. 701ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 702ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* shl-long vAA, vBB, vCC */ 703ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng and r2, r2, #63 @ r2<- r2 & 0x3f 704ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r1, r1, asl r2 @ r1<- r1 << r2 705ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng rsb r3, r2, #32 @ r3<- 32 - r2 706ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2)) 707ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng subs ip, r2, #32 @ ip<- r2 - 32 708ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32) 709ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r0, r0, asl r2 @ r0<- r0 << r2 710ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bx lr 711ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 712ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* ------------------------------ */ 713ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .balign 4 714ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dvmCompiler_TEMPLATE_SHR_LONG 715ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdvmCompiler_TEMPLATE_SHR_LONG: 716ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_SHR_LONG.S */ 717ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* 718ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Long integer shift. This is different from the generic 32/64-bit 719ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * binary operations because vAA/vBB are 64-bit but vCC (the shift 720ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * distance) is 32-bit. Also, Dalvik requires us to ignore all but the low 721ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 6 bits. 722ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 723ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* shr-long vAA, vBB, vCC */ 724ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng and r2, r2, #63 @ r0<- r0 & 0x3f 725ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r0, r0, lsr r2 @ r0<- r2 >> r2 726ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng rsb r3, r2, #32 @ r3<- 32 - r2 727ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2)) 728ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng subs ip, r2, #32 @ ip<- r2 - 32 729ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32) 730ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r1, r1, asr r2 @ r1<- r1 >> r2 731ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bx lr 732ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 733ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 734ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* ------------------------------ */ 735ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .balign 4 736ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dvmCompiler_TEMPLATE_USHR_LONG 737ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdvmCompiler_TEMPLATE_USHR_LONG: 738ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/TEMPLATE_USHR_LONG.S */ 739ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* 740ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Long integer shift. This is different from the generic 32/64-bit 741ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * binary operations because vAA/vBB are 64-bit but vCC (the shift 742ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * distance) is 32-bit. Also, Dalvik requires us to ignore all but the low 743ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 6 bits. 744ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 745ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng /* ushr-long vAA, vBB, vCC */ 746ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng and r2, r2, #63 @ r0<- r0 & 0x3f 747ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r0, r0, lsr r2 @ r0<- r2 >> r2 748ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng rsb r3, r2, #32 @ r3<- 32 - r2 749ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2)) 750ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng subs ip, r2, #32 @ ip<- r2 - 32 751ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32) 752ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r1, r1, lsr r2 @ r1<- r1 >>> r2 753ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bx lr 754ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 755ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 7564f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng/* ------------------------------ */ 7574f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng .balign 4 7584f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng .global dvmCompiler_TEMPLATE_THROW_EXCEPTION_COMMON 7594f48917c0741e4d9b15ca7c45956aea05fea103fBen ChengdvmCompiler_TEMPLATE_THROW_EXCEPTION_COMMON: 7604f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng/* File: armv5te/TEMPLATE_THROW_EXCEPTION_COMMON.S */ 7614f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng /* 7624f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng * Throw an exception from JIT'ed code. 7634f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng * On entry: 7644f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng * r0 Dalvik PC that raises the exception 7654f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng */ 7664f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng b .LhandleException 7674f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng 7681465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee/* ------------------------------ */ 7691465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee .balign 4 7701465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee .global dvmCompiler_TEMPLATE_SAVE_STATE 7711465db5ee2d3c4c4dcc8e017a294172e858765cbBill BuzbeedvmCompiler_TEMPLATE_SAVE_STATE: 7721465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee/* File: armv5te/TEMPLATE_SAVE_STATE.S */ 7731465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee /* 7741465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * This handler performs a register save for selfVerification mode. 7751465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * On entry: 7761465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * Top of stack + 4: r7 value to save 7771465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * Top of stack + 0: r0 value to save 7781465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * r0 - offset from rGLUE to the beginning of the heapArgSpace record 7791465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * r7 - the value of regMap 7801465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * 7811465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * The handler must save regMap, r0-r12 and then return with r0-r12 7821465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * with their original values (note that this means r0 and r7 must take 7831465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * the values on the stack - not the ones in those registers on entry. 7841465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * Finally, the two registers previously pushed must be popped. 7851465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee */ 7861465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee add r0, r0, rGLUE @ pointer to heapArgSpace 7871465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee stmia r0!, {r7} @ save regMap 7881465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee ldr r7, [r13, #0] @ recover r0 value 7891465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee stmia r0!, {r7} @ save r0 7901465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee ldr r7, [r13, #4] @ recover r7 value 7911465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee stmia r0!, {r1-r12} 7921465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee pop {r0, r7} @ recover r0, r7 7931465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bx lr 7941465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee 7951465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee/* ------------------------------ */ 7961465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee .balign 4 7971465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee .global dvmCompiler_TEMPLATE_RESTORE_STATE 7981465db5ee2d3c4c4dcc8e017a294172e858765cbBill BuzbeedvmCompiler_TEMPLATE_RESTORE_STATE: 7991465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee/* File: armv5te/TEMPLATE_RESTORE_STATE.S */ 8001465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee /* 8011465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * This handler restores state following a selfVerification memory access. 8021465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * On entry: 8031465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee * r0 - offset from rGLUE to the 1st element of the coreRegs save array. 8041465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee */ 8051465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee add r0, r0, rGLUE @ pointer to heapArgSpace.coreRegs[0] 8061465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee ldmia r0, {r0-r12} 8071465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee bx lr 8081465db5ee2d3c4c4dcc8e017a294172e858765cbBill Buzbee 809fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee/* ------------------------------ */ 810fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee .balign 4 811fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee .global dvmCompiler_TEMPLATE_STRING_COMPARETO 812fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill BuzbeedvmCompiler_TEMPLATE_STRING_COMPARETO: 813fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee/* File: armv5te/TEMPLATE_STRING_COMPARETO.S */ 814fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee /* 815fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * String's compareTo. 816fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * 817fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * Requires r0/r1 to have been previously checked for null. Will 818fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * return negative if this's string is < comp, 0 if they are the 819fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * same and positive if >. 820fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * 821fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * IMPORTANT NOTE: 822fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * 823fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * This code relies on hard-coded offsets for string objects, and must be 824fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * kept in sync with definitions in UtfString.h. See asm-constants.h 825fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * 826fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * On entry: 827fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * r0: this object pointer 828fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * r1: comp object pointer 829fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * 830fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee */ 831fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 832fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee mov r2, r0 @ this to r2, opening up r0 for return value 833fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee subs r0, r2, r1 @ Same? 834fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee bxeq lr 835fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 836fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldr r4, [r2, #STRING_FIELDOFF_OFFSET] 837fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldr r9, [r1, #STRING_FIELDOFF_OFFSET] 838fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldr r7, [r2, #STRING_FIELDOFF_COUNT] 839fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldr r10, [r1, #STRING_FIELDOFF_COUNT] 840fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldr r2, [r2, #STRING_FIELDOFF_VALUE] 841fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldr r1, [r1, #STRING_FIELDOFF_VALUE] 842fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 843fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee /* 844fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * At this point, we have: 845fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * value: r2/r1 846fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * offset: r4/r9 847fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * count: r7/r10 848fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * We're going to compute 849fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * r11 <- countDiff 850fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * r10 <- minCount 851fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee */ 852fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee subs r11, r7, r10 853fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee movls r10, r7 854fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 855fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee /* Now, build pointers to the string data */ 856fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee add r2, r2, r4, lsl #1 857fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee add r1, r1, r9, lsl #1 858fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee /* 859fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * Note: data pointers point to previous element so we can use pre-index 860fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * mode with base writeback. 861fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee */ 862fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee add r2, #16-2 @ offset to contents[-1] 863fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee add r1, #16-2 @ offset to contents[-1] 864fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 865fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee /* 866fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * At this point we have: 867fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * r2: *this string data 868fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * r1: *comp string data 869fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * r10: iteration count for comparison 870fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * r11: value to return if the first part of the string is equal 871fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * r0: reserved for result 872fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * r3, r4, r7, r8, r9, r12 available for loading string data 873fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee */ 874fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 8754c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee subs r10, #2 8764c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee blt do_remainder2 8774c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee 8784c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee /* 8794c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee * Unroll the first two checks so we can quickly catch early mismatch 8804c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee * on long strings (but preserve incoming alignment) 8814c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee */ 8824c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee 8834c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee ldrh r3, [r2, #2]! 8844c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee ldrh r4, [r1, #2]! 8854c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee ldrh r7, [r2, #2]! 8864c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee ldrh r8, [r1, #2]! 8874c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee subs r0, r3, r4 8884c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee subeqs r0, r7, r8 8894c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee bxne lr 8904c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee cmp r10, #28 8914c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee bgt do_memcmp16 8924c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee subs r10, #3 893fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee blt do_remainder 8944c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee 895fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbeeloopback_triple: 896fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldrh r3, [r2, #2]! 897fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldrh r4, [r1, #2]! 898fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldrh r7, [r2, #2]! 899fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldrh r8, [r1, #2]! 900fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldrh r9, [r2, #2]! 901fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldrh r12,[r1, #2]! 902fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee subs r0, r3, r4 903fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee subeqs r0, r7, r8 904fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee subeqs r0, r9, r12 905fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee bxne lr 906fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee subs r10, #3 9075965d47b624798343b6a53afd384f2cf88d091deBill Buzbee bge loopback_triple 908fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 909fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbeedo_remainder: 9105965d47b624798343b6a53afd384f2cf88d091deBill Buzbee adds r10, #3 911fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee beq returnDiff 912fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 913fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbeeloopback_single: 914fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldrh r3, [r2, #2]! 915fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldrh r4, [r1, #2]! 916fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee subs r0, r3, r4 917fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee bxne lr 918fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee subs r10, #1 919fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee bne loopback_single 920fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 921fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill BuzbeereturnDiff: 922fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee mov r0, r11 923fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee bx lr 924fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 9254c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbeedo_remainder2: 9264c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee adds r10, #2 9274c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee bne loopback_single 9284c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee mov r0, r11 9294c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee bx lr 9304c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee 9314c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee /* Long string case */ 9324c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbeedo_memcmp16: 9334c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee mov r4, lr 9344c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee ldr lr, .Lmemcmp16 9354c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee mov r7, r11 9364c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee add r0, r2, #2 9374c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee add r1, r1, #2 9384c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee mov r2, r10 9394c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee blx lr 9404c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee cmp r0, #0 9414c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee bxne r4 9424c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee mov r0, r7 9434c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee bx r4 9444c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee 9454c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee.Lmemcmp16: 9464c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee .word __memcmp16 9474c0dedfd9006daee4f6d96482cc6ac94a1797880Bill Buzbee 948fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 949fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee/* ------------------------------ */ 950fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee .balign 4 951fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee .global dvmCompiler_TEMPLATE_STRING_INDEXOF 952fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill BuzbeedvmCompiler_TEMPLATE_STRING_INDEXOF: 953fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee/* File: armv5te/TEMPLATE_STRING_INDEXOF.S */ 954fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee /* 955fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * String's indexOf. 956fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * 957fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * Requires r0 to have been previously checked for null. Will 958fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * return index of match of r1 in r0. 959fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * 960fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * IMPORTANT NOTE: 961fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * 962fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * This code relies on hard-coded offsets for string objects, and must be 963fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * kept in sync wth definitions in UtfString.h See asm-constants.h 964fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * 965fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * On entry: 966fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * r0: string object pointer 967fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * r1: char to match 968fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * r2: Starting offset in string data 969fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee */ 970fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 971fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldr r7, [r0, #STRING_FIELDOFF_OFFSET] 972fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldr r8, [r0, #STRING_FIELDOFF_COUNT] 973fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldr r0, [r0, #STRING_FIELDOFF_VALUE] 974fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 975fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee /* 976fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * At this point, we have: 97749024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee * r0: object pointer 97849024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee * r1: char to match 97949024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee * r2: starting offset 98049024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee * r7: offset 98149024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee * r8: string length 982fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee */ 983fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 98449024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee /* Build pointer to start of string data */ 98549024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee add r0, #16 98649024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee add r0, r0, r7, lsl #1 98749024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee 98849024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee /* Save a copy of starting data in r7 */ 98949024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee mov r7, r0 99049024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee 991fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee /* Clamp start to [0..count] */ 992fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee cmp r2, #0 993fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee movlt r2, #0 994fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee cmp r2, r8 99549024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee movgt r2, r8 996fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 99749024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee /* Build pointer to start of data to compare and pre-bias */ 998fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee add r0, r0, r2, lsl #1 99949024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee sub r0, #2 100049024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee 100149024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee /* Compute iteration count */ 100249024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee sub r8, r2 1003fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 1004fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee /* 1005fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee * At this point we have: 100649024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee * r0: start of data to test 100749024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee * r1: chat to compare 100849024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee * r8: iteration count 100949024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee * r7: original start of string 101049024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee * r3, r4, r9, r10, r11, r12 available for loading string data 1011fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee */ 1012fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 101349024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee sub r8, #4 101449024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee blt indexof_remainder 1015fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 101649024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbeeindexof_loop4: 1017fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldrh r3, [r0, #2]! 1018fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldrh r4, [r0, #2]! 101949024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee ldrh r10, [r0, #2]! 102049024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee ldrh r11, [r0, #2]! 1021fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee cmp r3, r1 1022fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee beq match_0 1023fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee cmp r4, r1 1024fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee beq match_1 102549024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee cmp r10, r1 1026fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee beq match_2 102749024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee cmp r11, r1 1028fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee beq match_3 1029fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee subs r8, #4 103049024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee bge indexof_loop4 1031fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 103249024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbeeindexof_remainder: 103349024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee adds r8, #4 103449024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee beq indexof_nomatch 1035fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 103649024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbeeindexof_loop1: 1037fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee ldrh r3, [r0, #2]! 1038fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee cmp r3, r1 1039fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee beq match_3 1040fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee subs r8, #1 104149024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee bne indexof_loop1 1042fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 104349024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbeeindexof_nomatch: 1044fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee mov r0, #-1 1045fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee bx lr 1046fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 1047fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbeematch_0: 1048fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee sub r0, #6 104949024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee sub r0, r7 105049024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee asr r0, r0, #1 1051fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee bx lr 1052fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbeematch_1: 1053fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee sub r0, #4 105449024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee sub r0, r7 105549024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee asr r0, r0, #1 1056fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee bx lr 1057fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbeematch_2: 1058fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee sub r0, #2 105949024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee sub r0, r7 106049024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee asr r0, r0, #1 1061fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee bx lr 1062fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbeematch_3: 106349024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee sub r0, r7 106449024493479b1ab8b5f9b44c24a3b0c33afc796cBill Buzbee asr r0, r0, #1 1065fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee bx lr 1066fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 1067fd023aaec5f2b0df61d1702ea2f29a70abe90158Bill Buzbee 10689a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee/* ------------------------------ */ 10699a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee .balign 4 10709a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee .global dvmCompiler_TEMPLATE_INTERPRET 10719a8c75adb2abf551d06dbf757bff558c1feded08Bill BuzbeedvmCompiler_TEMPLATE_INTERPRET: 10729a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee/* File: armv5te/TEMPLATE_INTERPRET.S */ 10739a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee /* 10749a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee * This handler transfers control to the interpeter without performing 10759a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee * any lookups. It may be called either as part of a normal chaining 10769a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee * operation, or from the transition code in header.S. We distinquish 10779a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee * the two cases by looking at the link register. If called from a 10789a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee * translation chain, it will point to the chaining Dalvik PC + 1. 10799a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee * On entry: 10809a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee * lr - if NULL: 10819a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee * r1 - the Dalvik PC to begin interpretation. 10829a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee * else 10839a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee * [lr, #-1] contains Dalvik PC to begin interpretation 10849a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee * rGLUE - pointer to interpState 10859a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee * rFP - Dalvik frame pointer 10869a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee */ 10879a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee cmp lr, #0 10889a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee ldrne r1,[lr, #-1] 10899a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee ldr r2, .LinterpPunt 10909a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee mov r0, r1 @ set Dalvik PC 10919a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee bx r2 10929a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee @ doesn't return 10939a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee 10949a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee.LinterpPunt: 10959a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee .word dvmJitToInterpPunt 10969a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee 1097ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .size dvmCompilerTemplateStart, .-dvmCompilerTemplateStart 1098ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* File: armv5te/footer.S */ 1099ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 1100ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * =========================================================================== 1101ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Common subroutines and data 1102ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * =========================================================================== 1103ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 1104ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 1105ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .text 1106ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .align 2 1107ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.LinvokeNative: 1108ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ Prep for the native call 1109ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ r1 = newFP, r0 = methodToCall 1110ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r3, [rGLUE, #offGlue_self] @ r3<- glue->self 1111d5ab726b65d7271be261864c7e224fb90bfe06e0Andy McFadden ldr r9, [r3, #offThread_jniLocal_topCookie] @ r9<- thread->localRef->... 1112ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str r1, [r3, #offThread_curFrame] @ self->curFrame = newFp 1113d5ab726b65d7271be261864c7e224fb90bfe06e0Andy McFadden str r9, [r1, #(offStackSaveArea_localRefCookie - sizeofStackSaveArea)] 1114d5ab726b65d7271be261864c7e224fb90bfe06e0Andy McFadden @ newFp->localRefCookie=top 1115ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r9, r3 @ r9<- glue->self (preserve) 1116ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng SAVEAREA_FROM_FP(r10, r1) @ r10<- new stack save area 1117ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 1118ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r2, r0 @ r2<- methodToCall 1119ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng mov r0, r1 @ r0<- newFP 1120ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng add r1, rGLUE, #offGlue_retval @ r1<- &retval 1121ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 1122ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng LDR_PC_LR "[r2, #offMethod_nativeFunc]" 1123ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 1124ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ native return; r9=self, r10=newSaveArea 1125ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng @ equivalent to dvmPopJniLocals 1126ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r2, [r10, #offStackSaveArea_returnAddr] @ r2 = chaining cell ret 1127d5ab726b65d7271be261864c7e224fb90bfe06e0Andy McFadden ldr r0, [r10, #offStackSaveArea_localRefCookie] @ r0<- saved->top 1128ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng ldr r1, [r9, #offThread_exception] @ check for exception 1129ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng str rFP, [r9, #offThread_curFrame] @ self->curFrame = fp 1130ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng cmp r1, #0 @ null? 1131d5ab726b65d7271be261864c7e224fb90bfe06e0Andy McFadden str r0, [r9, #offThread_jniLocal_topCookie] @ new top <- old top 11324f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng ldr r0, [r10, #offStackSaveArea_savedPc] @ reload rPC 1133ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bne .LhandleException @ no, handle exception 1134ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng bx r2 1135ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 11364f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng/* 11374f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng * On entry: 11384f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng * r0 Faulting Dalvik PC 11394f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng */ 1140ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.LhandleException: 11414f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng ldr r1, .LdvmMterpCommonExceptionThrown @ PIC way of getting &func 1142cc6600c2702c0b29457836acde1cfc4f25c63b67Ben Cheng ldr rIBASE, .LdvmAsmInstructionStart @ same as above 11434f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng mov rPC, r0 @ reload the faulting Dalvik address 11444f48917c0741e4d9b15ca7c45956aea05fea103fBen Cheng mov pc, r1 @ branch to dvmMterpCommonExceptionThrown 1145ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 1146ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .align 2 1147ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.LdvmAsmInstructionStart: 1148ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .word dvmAsmInstructionStart 1149ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.LdvmJitToInterpNoChain: 1150ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .word dvmJitToInterpNoChain 1151ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.LdvmMterpStdBail: 1152ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .word dvmMterpStdBail 1153cc6600c2702c0b29457836acde1cfc4f25c63b67Ben Cheng.LdvmMterpCommonExceptionThrown: 1154cc6600c2702c0b29457836acde1cfc4f25c63b67Ben Cheng .word dvmMterpCommonExceptionThrown 1155ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.L__aeabi_cdcmple: 1156ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .word __aeabi_cdcmple 1157ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng.L__aeabi_cfcmple: 1158ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .word __aeabi_cfcmple 1159ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 1160ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng .global dmvCompilerTemplateEnd 1161ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengdmvCompilerTemplateEnd: 1162ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 1163ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng#endif /* WITH_JIT */ 1164ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 1165