Targets.cpp revision 002333f8b2cf1a8614e532f6ce366b21af85142c
1//===--- Targets.cpp - Implement -arch option and targets -----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements construction of a TargetInfo object from a 11// target triple. 12// 13//===----------------------------------------------------------------------===// 14 15#include "clang/Basic/TargetInfo.h" 16#include "clang/Basic/Builtins.h" 17#include "clang/Basic/Diagnostic.h" 18#include "clang/Basic/LangOptions.h" 19#include "clang/Basic/MacroBuilder.h" 20#include "clang/Basic/TargetBuiltins.h" 21#include "clang/Basic/TargetOptions.h" 22#include "llvm/ADT/APFloat.h" 23#include "llvm/ADT/OwningPtr.h" 24#include "llvm/ADT/STLExtras.h" 25#include "llvm/ADT/StringRef.h" 26#include "llvm/ADT/StringSwitch.h" 27#include "llvm/ADT/Triple.h" 28#include "llvm/MC/MCSectionMachO.h" 29#include "llvm/Type.h" 30#include <algorithm> 31using namespace clang; 32 33//===----------------------------------------------------------------------===// 34// Common code shared among targets. 35//===----------------------------------------------------------------------===// 36 37/// DefineStd - Define a macro name and standard variants. For example if 38/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 39/// when in GNU mode. 40static void DefineStd(MacroBuilder &Builder, llvm::StringRef MacroName, 41 const LangOptions &Opts) { 42 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 43 44 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 45 // in the user's namespace. 46 if (Opts.GNUMode) 47 Builder.defineMacro(MacroName); 48 49 // Define __unix. 50 Builder.defineMacro("__" + MacroName); 51 52 // Define __unix__. 53 Builder.defineMacro("__" + MacroName + "__"); 54} 55 56//===----------------------------------------------------------------------===// 57// Defines specific to certain operating systems. 58//===----------------------------------------------------------------------===// 59 60namespace { 61template<typename TgtInfo> 62class OSTargetInfo : public TgtInfo { 63protected: 64 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 65 MacroBuilder &Builder) const=0; 66public: 67 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 68 virtual void getTargetDefines(const LangOptions &Opts, 69 MacroBuilder &Builder) const { 70 TgtInfo::getTargetDefines(Opts, Builder); 71 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 72 } 73 74}; 75} // end anonymous namespace 76 77 78static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 79 const llvm::Triple &Triple, 80 llvm::StringRef &PlatformName, 81 VersionTuple &PlatformMinVersion) { 82 Builder.defineMacro("__APPLE_CC__", "5621"); 83 Builder.defineMacro("__APPLE__"); 84 Builder.defineMacro("__MACH__"); 85 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 86 87 // __weak is always defined, for use in blocks and with objc pointers. 88 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 89 90 // Darwin defines __strong even in C mode (just to nothing). 91 if (!Opts.ObjC1 || Opts.getGCMode() == LangOptions::NonGC) 92 Builder.defineMacro("__strong", ""); 93 else 94 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 95 96 if (Opts.Static) 97 Builder.defineMacro("__STATIC__"); 98 else 99 Builder.defineMacro("__DYNAMIC__"); 100 101 if (Opts.POSIXThreads) 102 Builder.defineMacro("_REENTRANT"); 103 104 // Get the platform type and version number from the triple. 105 unsigned Maj, Min, Rev; 106 107 // If no version was given, default to to 10.4.0, for simplifying tests. 108 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") { 109 PlatformName = "macosx"; 110 Min = Rev = 0; 111 Maj = 8; 112 } else { 113 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]", 114 // "-osxNNN", and "-iosNNN"). 115 116 if (Triple.getOS() == llvm::Triple::Darwin) { 117 // For historical reasons that make little sense, the version passed here 118 // is the "darwin" version, which drops the 10 and offsets by 4. 119 Triple.getOSVersion(Maj, Min, Rev); 120 121 if (Triple.getEnvironmentName() == "iphoneos") { 122 PlatformName = "ios"; 123 } else { 124 PlatformName = "macosx"; 125 Rev = Min; 126 Min = Maj - 4; 127 Maj = 10; 128 } 129 } else { 130 Triple.getOSVersion(Maj, Min, Rev); 131 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 132 } 133 } 134 135 // Set the appropriate OS version define. 136 if (PlatformName == "ios") { 137 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 138 char Str[6]; 139 Str[0] = '0' + Maj; 140 Str[1] = '0' + (Min / 10); 141 Str[2] = '0' + (Min % 10); 142 Str[3] = '0' + (Rev / 10); 143 Str[4] = '0' + (Rev % 10); 144 Str[5] = '\0'; 145 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 146 } else { 147 // Note that the Driver allows versions which aren't representable in the 148 // define (because we only get a single digit for the minor and micro 149 // revision numbers). So, we limit them to the maximum representable 150 // version. 151 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 152 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 153 char Str[5]; 154 Str[0] = '0' + (Maj / 10); 155 Str[1] = '0' + (Maj % 10); 156 Str[2] = '0' + std::min(Min, 9U); 157 Str[3] = '0' + std::min(Rev, 9U); 158 Str[4] = '\0'; 159 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 160 } 161 162 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 163} 164 165namespace { 166template<typename Target> 167class DarwinTargetInfo : public OSTargetInfo<Target> { 168protected: 169 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 170 MacroBuilder &Builder) const { 171 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 172 this->PlatformMinVersion); 173 } 174 175public: 176 DarwinTargetInfo(const std::string& triple) : 177 OSTargetInfo<Target>(triple) { 178 this->TLSSupported = llvm::Triple(triple).getDarwinMajorNumber() > 10; 179 this->MCountName = "\01mcount"; 180 } 181 182 virtual std::string isValidSectionSpecifier(llvm::StringRef SR) const { 183 // Let MCSectionMachO validate this. 184 llvm::StringRef Segment, Section; 185 unsigned TAA, StubSize; 186 bool HasTAA; 187 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 188 TAA, HasTAA, StubSize); 189 } 190 191 virtual const char *getStaticInitSectionSpecifier() const { 192 // FIXME: We should return 0 when building kexts. 193 return "__TEXT,__StaticInit,regular,pure_instructions"; 194 } 195 196}; 197 198 199// DragonFlyBSD Target 200template<typename Target> 201class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 202protected: 203 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 204 MacroBuilder &Builder) const { 205 // DragonFly defines; list based off of gcc output 206 Builder.defineMacro("__DragonFly__"); 207 Builder.defineMacro("__DragonFly_cc_version", "100001"); 208 Builder.defineMacro("__ELF__"); 209 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 210 Builder.defineMacro("__tune_i386__"); 211 DefineStd(Builder, "unix", Opts); 212 } 213public: 214 DragonFlyBSDTargetInfo(const std::string &triple) 215 : OSTargetInfo<Target>(triple) {} 216}; 217 218// FreeBSD Target 219template<typename Target> 220class FreeBSDTargetInfo : public OSTargetInfo<Target> { 221protected: 222 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 223 MacroBuilder &Builder) const { 224 // FreeBSD defines; list based off of gcc output 225 226 // FIXME: Move version number handling to llvm::Triple. 227 llvm::StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1); 228 229 Builder.defineMacro("__FreeBSD__", Release); 230 Builder.defineMacro("__FreeBSD_cc_version", Release + "00001"); 231 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 232 DefineStd(Builder, "unix", Opts); 233 Builder.defineMacro("__ELF__"); 234 } 235public: 236 FreeBSDTargetInfo(const std::string &triple) 237 : OSTargetInfo<Target>(triple) { 238 this->UserLabelPrefix = ""; 239 240 llvm::Triple Triple(triple); 241 switch (Triple.getArch()) { 242 default: 243 case llvm::Triple::x86: 244 case llvm::Triple::x86_64: 245 this->MCountName = ".mcount"; 246 break; 247 case llvm::Triple::mips: 248 case llvm::Triple::mipsel: 249 case llvm::Triple::ppc: 250 case llvm::Triple::ppc64: 251 this->MCountName = "_mcount"; 252 break; 253 case llvm::Triple::arm: 254 this->MCountName = "__mcount"; 255 break; 256 } 257 258 } 259}; 260 261// Minix Target 262template<typename Target> 263class MinixTargetInfo : public OSTargetInfo<Target> { 264protected: 265 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 266 MacroBuilder &Builder) const { 267 // Minix defines 268 269 Builder.defineMacro("__minix", "3"); 270 Builder.defineMacro("_EM_WSIZE", "4"); 271 Builder.defineMacro("_EM_PSIZE", "4"); 272 Builder.defineMacro("_EM_SSIZE", "2"); 273 Builder.defineMacro("_EM_LSIZE", "4"); 274 Builder.defineMacro("_EM_FSIZE", "4"); 275 Builder.defineMacro("_EM_DSIZE", "8"); 276 DefineStd(Builder, "unix", Opts); 277 } 278public: 279 MinixTargetInfo(const std::string &triple) 280 : OSTargetInfo<Target>(triple) { 281 this->UserLabelPrefix = ""; 282 } 283}; 284 285// Linux target 286template<typename Target> 287class LinuxTargetInfo : public OSTargetInfo<Target> { 288protected: 289 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 290 MacroBuilder &Builder) const { 291 // Linux defines; list based off of gcc output 292 DefineStd(Builder, "unix", Opts); 293 DefineStd(Builder, "linux", Opts); 294 Builder.defineMacro("__gnu_linux__"); 295 Builder.defineMacro("__ELF__"); 296 if (Opts.POSIXThreads) 297 Builder.defineMacro("_REENTRANT"); 298 if (Opts.CPlusPlus) 299 Builder.defineMacro("_GNU_SOURCE"); 300 } 301public: 302 LinuxTargetInfo(const std::string& triple) 303 : OSTargetInfo<Target>(triple) { 304 this->UserLabelPrefix = ""; 305 this->WIntType = TargetInfo::UnsignedInt; 306 } 307}; 308 309// NetBSD Target 310template<typename Target> 311class NetBSDTargetInfo : public OSTargetInfo<Target> { 312protected: 313 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 314 MacroBuilder &Builder) const { 315 // NetBSD defines; list based off of gcc output 316 Builder.defineMacro("__NetBSD__"); 317 Builder.defineMacro("__unix__"); 318 Builder.defineMacro("__ELF__"); 319 if (Opts.POSIXThreads) 320 Builder.defineMacro("_POSIX_THREADS"); 321 } 322public: 323 NetBSDTargetInfo(const std::string &triple) 324 : OSTargetInfo<Target>(triple) { 325 this->UserLabelPrefix = ""; 326 } 327}; 328 329// OpenBSD Target 330template<typename Target> 331class OpenBSDTargetInfo : public OSTargetInfo<Target> { 332protected: 333 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 334 MacroBuilder &Builder) const { 335 // OpenBSD defines; list based off of gcc output 336 337 Builder.defineMacro("__OpenBSD__"); 338 DefineStd(Builder, "unix", Opts); 339 Builder.defineMacro("__ELF__"); 340 if (Opts.POSIXThreads) 341 Builder.defineMacro("_POSIX_THREADS"); 342 } 343public: 344 OpenBSDTargetInfo(const std::string &triple) 345 : OSTargetInfo<Target>(triple) {} 346}; 347 348// PSP Target 349template<typename Target> 350class PSPTargetInfo : public OSTargetInfo<Target> { 351protected: 352 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 353 MacroBuilder &Builder) const { 354 // PSP defines; list based on the output of the pspdev gcc toolchain. 355 Builder.defineMacro("PSP"); 356 Builder.defineMacro("_PSP"); 357 Builder.defineMacro("__psp__"); 358 Builder.defineMacro("__ELF__"); 359 } 360public: 361 PSPTargetInfo(const std::string& triple) 362 : OSTargetInfo<Target>(triple) { 363 this->UserLabelPrefix = ""; 364 } 365}; 366 367// PS3 PPU Target 368template<typename Target> 369class PS3PPUTargetInfo : public OSTargetInfo<Target> { 370protected: 371 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 372 MacroBuilder &Builder) const { 373 // PS3 PPU defines. 374 Builder.defineMacro("__PPC__"); 375 Builder.defineMacro("__PPU__"); 376 Builder.defineMacro("__CELLOS_LV2__"); 377 Builder.defineMacro("__ELF__"); 378 Builder.defineMacro("__LP32__"); 379 Builder.defineMacro("_ARCH_PPC64"); 380 Builder.defineMacro("__powerpc64__"); 381 } 382public: 383 PS3PPUTargetInfo(const std::string& triple) 384 : OSTargetInfo<Target>(triple) { 385 this->UserLabelPrefix = ""; 386 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32; 387 this->IntMaxType = TargetInfo::SignedLongLong; 388 this->UIntMaxType = TargetInfo::UnsignedLongLong; 389 this->Int64Type = TargetInfo::SignedLongLong; 390 this->SizeType = TargetInfo::UnsignedInt; 391 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 392 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 393 } 394}; 395 396// FIXME: Need a real SPU target. 397// PS3 SPU Target 398template<typename Target> 399class PS3SPUTargetInfo : public OSTargetInfo<Target> { 400protected: 401 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 402 MacroBuilder &Builder) const { 403 // PS3 PPU defines. 404 Builder.defineMacro("__SPU__"); 405 Builder.defineMacro("__ELF__"); 406 } 407public: 408 PS3SPUTargetInfo(const std::string& triple) 409 : OSTargetInfo<Target>(triple) { 410 this->UserLabelPrefix = ""; 411 } 412}; 413 414// AuroraUX target 415template<typename Target> 416class AuroraUXTargetInfo : public OSTargetInfo<Target> { 417protected: 418 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 419 MacroBuilder &Builder) const { 420 DefineStd(Builder, "sun", Opts); 421 DefineStd(Builder, "unix", Opts); 422 Builder.defineMacro("__ELF__"); 423 Builder.defineMacro("__svr4__"); 424 Builder.defineMacro("__SVR4"); 425 } 426public: 427 AuroraUXTargetInfo(const std::string& triple) 428 : OSTargetInfo<Target>(triple) { 429 this->UserLabelPrefix = ""; 430 this->WCharType = this->SignedLong; 431 // FIXME: WIntType should be SignedLong 432 } 433}; 434 435// Solaris target 436template<typename Target> 437class SolarisTargetInfo : public OSTargetInfo<Target> { 438protected: 439 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 440 MacroBuilder &Builder) const { 441 DefineStd(Builder, "sun", Opts); 442 DefineStd(Builder, "unix", Opts); 443 Builder.defineMacro("__ELF__"); 444 Builder.defineMacro("__svr4__"); 445 Builder.defineMacro("__SVR4"); 446 } 447public: 448 SolarisTargetInfo(const std::string& triple) 449 : OSTargetInfo<Target>(triple) { 450 this->UserLabelPrefix = ""; 451 this->WCharType = this->SignedLong; 452 // FIXME: WIntType should be SignedLong 453 } 454}; 455 456// Windows target 457template<typename Target> 458class WindowsTargetInfo : public OSTargetInfo<Target> { 459protected: 460 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 461 MacroBuilder &Builder) const { 462 Builder.defineMacro("_WIN32"); 463 } 464 void getVisualStudioDefines(const LangOptions &Opts, 465 MacroBuilder &Builder) const { 466 if (Opts.CPlusPlus) { 467 if (Opts.RTTI) 468 Builder.defineMacro("_CPPRTTI"); 469 470 if (Opts.Exceptions) 471 Builder.defineMacro("_CPPUNWIND"); 472 } 473 474 if (!Opts.CharIsSigned) 475 Builder.defineMacro("_CHAR_UNSIGNED"); 476 477 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 478 // but it works for now. 479 if (Opts.POSIXThreads) 480 Builder.defineMacro("_MT"); 481 482 if (Opts.MSCVersion != 0) 483 Builder.defineMacro("_MSC_VER", llvm::Twine(Opts.MSCVersion)); 484 485 if (Opts.Microsoft) { 486 Builder.defineMacro("_MSC_EXTENSIONS"); 487 488 if (Opts.CPlusPlus0x) { 489 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 490 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 491 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 492 } 493 } 494 495 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 496 } 497 498public: 499 WindowsTargetInfo(const std::string &triple) 500 : OSTargetInfo<Target>(triple) {} 501}; 502 503} // end anonymous namespace. 504 505//===----------------------------------------------------------------------===// 506// Specific target implementations. 507//===----------------------------------------------------------------------===// 508 509namespace { 510// PPC abstract base class 511class PPCTargetInfo : public TargetInfo { 512 static const Builtin::Info BuiltinInfo[]; 513 static const char * const GCCRegNames[]; 514 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 515 516public: 517 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 518 519 virtual void getTargetBuiltins(const Builtin::Info *&Records, 520 unsigned &NumRecords) const { 521 Records = BuiltinInfo; 522 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 523 } 524 525 virtual void getTargetDefines(const LangOptions &Opts, 526 MacroBuilder &Builder) const; 527 528 virtual void getGCCRegNames(const char * const *&Names, 529 unsigned &NumNames) const; 530 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 531 unsigned &NumAliases) const; 532 virtual bool validateAsmConstraint(const char *&Name, 533 TargetInfo::ConstraintInfo &Info) const { 534 switch (*Name) { 535 default: return false; 536 case 'O': // Zero 537 break; 538 case 'b': // Base register 539 case 'f': // Floating point register 540 Info.setAllowsRegister(); 541 break; 542 // FIXME: The following are added to allow parsing. 543 // I just took a guess at what the actions should be. 544 // Also, is more specific checking needed? I.e. specific registers? 545 case 'd': // Floating point register (containing 64-bit value) 546 case 'v': // Altivec vector register 547 Info.setAllowsRegister(); 548 break; 549 case 'w': 550 switch (Name[1]) { 551 case 'd':// VSX vector register to hold vector double data 552 case 'f':// VSX vector register to hold vector float data 553 case 's':// VSX vector register to hold scalar float data 554 case 'a':// Any VSX register 555 break; 556 default: 557 return false; 558 } 559 Info.setAllowsRegister(); 560 Name++; // Skip over 'w'. 561 break; 562 case 'h': // `MQ', `CTR', or `LINK' register 563 case 'q': // `MQ' register 564 case 'c': // `CTR' register 565 case 'l': // `LINK' register 566 case 'x': // `CR' register (condition register) number 0 567 case 'y': // `CR' register (condition register) 568 case 'z': // `XER[CA]' carry bit (part of the XER register) 569 Info.setAllowsRegister(); 570 break; 571 case 'I': // Signed 16-bit constant 572 case 'J': // Unsigned 16-bit constant shifted left 16 bits 573 // (use `L' instead for SImode constants) 574 case 'K': // Unsigned 16-bit constant 575 case 'L': // Signed 16-bit constant shifted left 16 bits 576 case 'M': // Constant larger than 31 577 case 'N': // Exact power of 2 578 case 'P': // Constant whose negation is a signed 16-bit constant 579 case 'G': // Floating point constant that can be loaded into a 580 // register with one instruction per word 581 case 'H': // Integer/Floating point constant that can be loaded 582 // into a register using three instructions 583 break; 584 case 'm': // Memory operand. Note that on PowerPC targets, m can 585 // include addresses that update the base register. It 586 // is therefore only safe to use `m' in an asm statement 587 // if that asm statement accesses the operand exactly once. 588 // The asm statement must also use `%U<opno>' as a 589 // placeholder for the "update" flag in the corresponding 590 // load or store instruction. For example: 591 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 592 // is correct but: 593 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 594 // is not. Use es rather than m if you don't want the base 595 // register to be updated. 596 case 'e': 597 if (Name[1] != 's') 598 return false; 599 // es: A "stable" memory operand; that is, one which does not 600 // include any automodification of the base register. Unlike 601 // `m', this constraint can be used in asm statements that 602 // might access the operand several times, or that might not 603 // access it at all. 604 Info.setAllowsMemory(); 605 Name++; // Skip over 'e'. 606 break; 607 case 'Q': // Memory operand that is an offset from a register (it is 608 // usually better to use `m' or `es' in asm statements) 609 case 'Z': // Memory operand that is an indexed or indirect from a 610 // register (it is usually better to use `m' or `es' in 611 // asm statements) 612 Info.setAllowsMemory(); 613 Info.setAllowsRegister(); 614 break; 615 case 'R': // AIX TOC entry 616 case 'a': // Address operand that is an indexed or indirect from a 617 // register (`p' is preferable for asm statements) 618 case 'S': // Constant suitable as a 64-bit mask operand 619 case 'T': // Constant suitable as a 32-bit mask operand 620 case 'U': // System V Release 4 small data area reference 621 case 't': // AND masks that can be performed by two rldic{l, r} 622 // instructions 623 case 'W': // Vector constant that does not require memory 624 case 'j': // Vector constant that is all zeros. 625 break; 626 // End FIXME. 627 } 628 return true; 629 } 630 virtual const char *getClobbers() const { 631 return ""; 632 } 633}; 634 635const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 636#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false }, 637#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 638 ALL_LANGUAGES, false }, 639#include "clang/Basic/BuiltinsPPC.def" 640}; 641 642 643/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 644/// #defines that are not tied to a specific subtarget. 645void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 646 MacroBuilder &Builder) const { 647 // Target identification. 648 Builder.defineMacro("__ppc__"); 649 Builder.defineMacro("_ARCH_PPC"); 650 Builder.defineMacro("__powerpc__"); 651 Builder.defineMacro("__POWERPC__"); 652 if (PointerWidth == 64) { 653 Builder.defineMacro("_ARCH_PPC64"); 654 Builder.defineMacro("_LP64"); 655 Builder.defineMacro("__LP64__"); 656 Builder.defineMacro("__powerpc64__"); 657 Builder.defineMacro("__ppc64__"); 658 } else { 659 Builder.defineMacro("__ppc__"); 660 } 661 662 // Target properties. 663 Builder.defineMacro("_BIG_ENDIAN"); 664 Builder.defineMacro("__BIG_ENDIAN__"); 665 666 // Subtarget options. 667 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 668 Builder.defineMacro("__REGISTER_PREFIX__", ""); 669 670 // FIXME: Should be controlled by command line option. 671 Builder.defineMacro("__LONG_DOUBLE_128__"); 672 673 if (Opts.AltiVec) { 674 Builder.defineMacro("__VEC__", "10206"); 675 Builder.defineMacro("__ALTIVEC__"); 676 } 677} 678 679 680const char * const PPCTargetInfo::GCCRegNames[] = { 681 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 682 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 683 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 684 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 685 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 686 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 687 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 688 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 689 "mq", "lr", "ctr", "ap", 690 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 691 "xer", 692 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 693 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 694 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 695 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 696 "vrsave", "vscr", 697 "spe_acc", "spefscr", 698 "sfp" 699}; 700 701void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 702 unsigned &NumNames) const { 703 Names = GCCRegNames; 704 NumNames = llvm::array_lengthof(GCCRegNames); 705} 706 707const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 708 // While some of these aliases do map to different registers 709 // they still share the same register name. 710 { { "0" }, "r0" }, 711 { { "1"}, "r1" }, 712 { { "2" }, "r2" }, 713 { { "3" }, "r3" }, 714 { { "4" }, "r4" }, 715 { { "5" }, "r5" }, 716 { { "6" }, "r6" }, 717 { { "7" }, "r7" }, 718 { { "8" }, "r8" }, 719 { { "9" }, "r9" }, 720 { { "10" }, "r10" }, 721 { { "11" }, "r11" }, 722 { { "12" }, "r12" }, 723 { { "13" }, "r13" }, 724 { { "14" }, "r14" }, 725 { { "15" }, "r15" }, 726 { { "16" }, "r16" }, 727 { { "17" }, "r17" }, 728 { { "18" }, "r18" }, 729 { { "19" }, "r19" }, 730 { { "20" }, "r20" }, 731 { { "21" }, "r21" }, 732 { { "22" }, "r22" }, 733 { { "23" }, "r23" }, 734 { { "24" }, "r24" }, 735 { { "25" }, "r25" }, 736 { { "26" }, "r26" }, 737 { { "27" }, "r27" }, 738 { { "28" }, "r28" }, 739 { { "29" }, "r29" }, 740 { { "30" }, "r30" }, 741 { { "31" }, "r31" }, 742 { { "fr0" }, "f0" }, 743 { { "fr1" }, "f1" }, 744 { { "fr2" }, "f2" }, 745 { { "fr3" }, "f3" }, 746 { { "fr4" }, "f4" }, 747 { { "fr5" }, "f5" }, 748 { { "fr6" }, "f6" }, 749 { { "fr7" }, "f7" }, 750 { { "fr8" }, "f8" }, 751 { { "fr9" }, "f9" }, 752 { { "fr10" }, "f10" }, 753 { { "fr11" }, "f11" }, 754 { { "fr12" }, "f12" }, 755 { { "fr13" }, "f13" }, 756 { { "fr14" }, "f14" }, 757 { { "fr15" }, "f15" }, 758 { { "fr16" }, "f16" }, 759 { { "fr17" }, "f17" }, 760 { { "fr18" }, "f18" }, 761 { { "fr19" }, "f19" }, 762 { { "fr20" }, "f20" }, 763 { { "fr21" }, "f21" }, 764 { { "fr22" }, "f22" }, 765 { { "fr23" }, "f23" }, 766 { { "fr24" }, "f24" }, 767 { { "fr25" }, "f25" }, 768 { { "fr26" }, "f26" }, 769 { { "fr27" }, "f27" }, 770 { { "fr28" }, "f28" }, 771 { { "fr29" }, "f29" }, 772 { { "fr30" }, "f30" }, 773 { { "fr31" }, "f31" }, 774 { { "cc" }, "cr0" }, 775}; 776 777void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 778 unsigned &NumAliases) const { 779 Aliases = GCCRegAliases; 780 NumAliases = llvm::array_lengthof(GCCRegAliases); 781} 782} // end anonymous namespace. 783 784namespace { 785class PPC32TargetInfo : public PPCTargetInfo { 786public: 787 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 788 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 789 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 790 791 if (getTriple().getOS() == llvm::Triple::FreeBSD) 792 SizeType = UnsignedInt; 793 } 794 795 virtual const char *getVAListDeclaration() const { 796 // This is the ELF definition, and is overridden by the Darwin sub-target 797 return "typedef struct __va_list_tag {" 798 " unsigned char gpr;" 799 " unsigned char fpr;" 800 " unsigned short reserved;" 801 " void* overflow_arg_area;" 802 " void* reg_save_area;" 803 "} __builtin_va_list[1];"; 804 } 805}; 806} // end anonymous namespace. 807 808namespace { 809class PPC64TargetInfo : public PPCTargetInfo { 810public: 811 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 812 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 813 IntMaxType = SignedLong; 814 UIntMaxType = UnsignedLong; 815 Int64Type = SignedLong; 816 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 817 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 818 } 819 virtual const char *getVAListDeclaration() const { 820 return "typedef char* __builtin_va_list;"; 821 } 822}; 823} // end anonymous namespace. 824 825 826namespace { 827class DarwinPPC32TargetInfo : 828 public DarwinTargetInfo<PPC32TargetInfo> { 829public: 830 DarwinPPC32TargetInfo(const std::string& triple) 831 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 832 HasAlignMac68kSupport = true; 833 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 834 } 835 virtual const char *getVAListDeclaration() const { 836 return "typedef char* __builtin_va_list;"; 837 } 838}; 839 840class DarwinPPC64TargetInfo : 841 public DarwinTargetInfo<PPC64TargetInfo> { 842public: 843 DarwinPPC64TargetInfo(const std::string& triple) 844 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 845 HasAlignMac68kSupport = true; 846 } 847}; 848} // end anonymous namespace. 849 850namespace { 851 class PTXTargetInfo : public TargetInfo { 852 static const char * const GCCRegNames[]; 853 static const Builtin::Info BuiltinInfo[]; 854 public: 855 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 856 TLSSupported = false; 857 LongWidth = LongAlign = 64; 858 } 859 virtual void getTargetDefines(const LangOptions &Opts, 860 MacroBuilder &Builder) const { 861 Builder.defineMacro("__PTX__"); 862 } 863 virtual void getTargetBuiltins(const Builtin::Info *&Records, 864 unsigned &NumRecords) const { 865 Records = BuiltinInfo; 866 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 867 } 868 869 virtual void getGCCRegNames(const char * const *&Names, 870 unsigned &NumNames) const; 871 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 872 unsigned &NumAliases) const { 873 // No aliases. 874 Aliases = 0; 875 NumAliases = 0; 876 } 877 virtual bool validateAsmConstraint(const char *&Name, 878 TargetInfo::ConstraintInfo &info) const { 879 // FIXME: implement 880 return true; 881 } 882 virtual const char *getClobbers() const { 883 // FIXME: Is this really right? 884 return ""; 885 } 886 virtual const char *getVAListDeclaration() const { 887 // FIXME: implement 888 return "typedef char* __builtin_va_list;"; 889 } 890 }; 891 892 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 893#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false }, 894#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 895 ALL_LANGUAGES, false }, 896#include "clang/Basic/BuiltinsPTX.def" 897 }; 898 899 const char * const PTXTargetInfo::GCCRegNames[] = { 900 "r0" 901 }; 902 903 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 904 unsigned &NumNames) const { 905 Names = GCCRegNames; 906 NumNames = llvm::array_lengthof(GCCRegNames); 907 } 908 909 910 class PTX32TargetInfo : public PTXTargetInfo { 911 public: 912 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 913 PointerWidth = PointerAlign = 32; 914 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 915 DescriptionString 916 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 917 } 918 }; 919 920 class PTX64TargetInfo : public PTXTargetInfo { 921 public: 922 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 923 PointerWidth = PointerAlign = 64; 924 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 925 DescriptionString 926 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 927 } 928 }; 929} 930 931namespace { 932// MBlaze abstract base class 933class MBlazeTargetInfo : public TargetInfo { 934 static const char * const GCCRegNames[]; 935 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 936 937public: 938 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 939 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 940 } 941 942 virtual void getTargetBuiltins(const Builtin::Info *&Records, 943 unsigned &NumRecords) const { 944 // FIXME: Implement. 945 Records = 0; 946 NumRecords = 0; 947 } 948 949 virtual void getTargetDefines(const LangOptions &Opts, 950 MacroBuilder &Builder) const; 951 952 virtual const char *getVAListDeclaration() const { 953 return "typedef char* __builtin_va_list;"; 954 } 955 virtual const char *getTargetPrefix() const { 956 return "mblaze"; 957 } 958 virtual void getGCCRegNames(const char * const *&Names, 959 unsigned &NumNames) const; 960 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 961 unsigned &NumAliases) const; 962 virtual bool validateAsmConstraint(const char *&Name, 963 TargetInfo::ConstraintInfo &Info) const { 964 switch (*Name) { 965 default: return false; 966 case 'O': // Zero 967 return true; 968 case 'b': // Base register 969 case 'f': // Floating point register 970 Info.setAllowsRegister(); 971 return true; 972 } 973 } 974 virtual const char *getClobbers() const { 975 return ""; 976 } 977}; 978 979/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 980/// #defines that are not tied to a specific subtarget. 981void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 982 MacroBuilder &Builder) const { 983 // Target identification. 984 Builder.defineMacro("__microblaze__"); 985 Builder.defineMacro("_ARCH_MICROBLAZE"); 986 Builder.defineMacro("__MICROBLAZE__"); 987 988 // Target properties. 989 Builder.defineMacro("_BIG_ENDIAN"); 990 Builder.defineMacro("__BIG_ENDIAN__"); 991 992 // Subtarget options. 993 Builder.defineMacro("__REGISTER_PREFIX__", ""); 994} 995 996 997const char * const MBlazeTargetInfo::GCCRegNames[] = { 998 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 999 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1000 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1001 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1002 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1003 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1004 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1005 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1006 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1007 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1008}; 1009 1010void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1011 unsigned &NumNames) const { 1012 Names = GCCRegNames; 1013 NumNames = llvm::array_lengthof(GCCRegNames); 1014} 1015 1016const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1017 { {"f0"}, "r0" }, 1018 { {"f1"}, "r1" }, 1019 { {"f2"}, "r2" }, 1020 { {"f3"}, "r3" }, 1021 { {"f4"}, "r4" }, 1022 { {"f5"}, "r5" }, 1023 { {"f6"}, "r6" }, 1024 { {"f7"}, "r7" }, 1025 { {"f8"}, "r8" }, 1026 { {"f9"}, "r9" }, 1027 { {"f10"}, "r10" }, 1028 { {"f11"}, "r11" }, 1029 { {"f12"}, "r12" }, 1030 { {"f13"}, "r13" }, 1031 { {"f14"}, "r14" }, 1032 { {"f15"}, "r15" }, 1033 { {"f16"}, "r16" }, 1034 { {"f17"}, "r17" }, 1035 { {"f18"}, "r18" }, 1036 { {"f19"}, "r19" }, 1037 { {"f20"}, "r20" }, 1038 { {"f21"}, "r21" }, 1039 { {"f22"}, "r22" }, 1040 { {"f23"}, "r23" }, 1041 { {"f24"}, "r24" }, 1042 { {"f25"}, "r25" }, 1043 { {"f26"}, "r26" }, 1044 { {"f27"}, "r27" }, 1045 { {"f28"}, "r28" }, 1046 { {"f29"}, "r29" }, 1047 { {"f30"}, "r30" }, 1048 { {"f31"}, "r31" }, 1049}; 1050 1051void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1052 unsigned &NumAliases) const { 1053 Aliases = GCCRegAliases; 1054 NumAliases = llvm::array_lengthof(GCCRegAliases); 1055} 1056} // end anonymous namespace. 1057 1058namespace { 1059// Namespace for x86 abstract base class 1060const Builtin::Info BuiltinInfo[] = { 1061#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false }, 1062#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1063 ALL_LANGUAGES, false }, 1064#include "clang/Basic/BuiltinsX86.def" 1065}; 1066 1067static const char* const GCCRegNames[] = { 1068 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1069 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1070 "argp", "flags", "fspr", "dirflag", "frame", 1071 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1072 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1073 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1074 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15" 1075}; 1076 1077const TargetInfo::GCCRegAlias GCCRegAliases[] = { 1078 { { "al", "ah", "eax", "rax" }, "ax" }, 1079 { { "bl", "bh", "ebx", "rbx" }, "bx" }, 1080 { { "cl", "ch", "ecx", "rcx" }, "cx" }, 1081 { { "dl", "dh", "edx", "rdx" }, "dx" }, 1082 { { "esi", "rsi" }, "si" }, 1083 { { "edi", "rdi" }, "di" }, 1084 { { "esp", "rsp" }, "sp" }, 1085 { { "ebp", "rbp" }, "bp" }, 1086}; 1087 1088// X86 target abstract base class; x86-32 and x86-64 are very close, so 1089// most of the implementation can be shared. 1090class X86TargetInfo : public TargetInfo { 1091 enum X86SSEEnum { 1092 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 1093 } SSELevel; 1094 enum AMD3DNowEnum { 1095 NoAMD3DNow, AMD3DNow, AMD3DNowAthlon 1096 } AMD3DNowLevel; 1097 1098 bool HasAES; 1099 bool HasAVX; 1100 1101public: 1102 X86TargetInfo(const std::string& triple) 1103 : TargetInfo(triple), SSELevel(NoMMXSSE), AMD3DNowLevel(NoAMD3DNow), 1104 HasAES(false), HasAVX(false) { 1105 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1106 } 1107 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1108 unsigned &NumRecords) const { 1109 Records = BuiltinInfo; 1110 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1111 } 1112 virtual void getGCCRegNames(const char * const *&Names, 1113 unsigned &NumNames) const { 1114 Names = GCCRegNames; 1115 NumNames = llvm::array_lengthof(GCCRegNames); 1116 } 1117 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1118 unsigned &NumAliases) const { 1119 Aliases = GCCRegAliases; 1120 NumAliases = llvm::array_lengthof(GCCRegAliases); 1121 } 1122 virtual bool validateAsmConstraint(const char *&Name, 1123 TargetInfo::ConstraintInfo &info) const; 1124 virtual std::string convertConstraint(const char *&Constraint) const; 1125 virtual const char *getClobbers() const { 1126 return "~{dirflag},~{fpsr},~{flags}"; 1127 } 1128 virtual void getTargetDefines(const LangOptions &Opts, 1129 MacroBuilder &Builder) const; 1130 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1131 const std::string &Name, 1132 bool Enabled) const; 1133 virtual void getDefaultFeatures(const std::string &CPU, 1134 llvm::StringMap<bool> &Features) const; 1135 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1136}; 1137 1138void X86TargetInfo::getDefaultFeatures(const std::string &CPU, 1139 llvm::StringMap<bool> &Features) const { 1140 // FIXME: This should not be here. 1141 Features["3dnow"] = false; 1142 Features["3dnowa"] = false; 1143 Features["mmx"] = false; 1144 Features["sse"] = false; 1145 Features["sse2"] = false; 1146 Features["sse3"] = false; 1147 Features["ssse3"] = false; 1148 Features["sse41"] = false; 1149 Features["sse42"] = false; 1150 Features["aes"] = false; 1151 Features["avx"] = false; 1152 1153 // LLVM does not currently recognize this. 1154 // Features["sse4a"] = false; 1155 1156 // FIXME: This *really* should not be here. 1157 1158 // X86_64 always has SSE2. 1159 if (PointerWidth == 64) 1160 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1161 1162 if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" || 1163 CPU == "pentium" || CPU == "i686" || CPU == "pentiumpro") 1164 ; 1165 else if (CPU == "pentium-mmx" || CPU == "pentium2") 1166 setFeatureEnabled(Features, "mmx", true); 1167 else if (CPU == "pentium3") 1168 setFeatureEnabled(Features, "sse", true); 1169 else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64") 1170 setFeatureEnabled(Features, "sse2", true); 1171 else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona") 1172 setFeatureEnabled(Features, "sse3", true); 1173 else if (CPU == "core2") 1174 setFeatureEnabled(Features, "ssse3", true); 1175 else if (CPU == "penryn") { 1176 setFeatureEnabled(Features, "sse4", true); 1177 Features["sse42"] = false; 1178 } else if (CPU == "atom") 1179 setFeatureEnabled(Features, "sse3", true); 1180 else if (CPU == "corei7") { 1181 setFeatureEnabled(Features, "sse4", true); 1182 setFeatureEnabled(Features, "aes", true); 1183 } else if (CPU == "corei7-avx") { 1184 setFeatureEnabled(Features, "sse4", true); 1185 setFeatureEnabled(Features, "aes", true); 1186// setFeatureEnabled(Features, "avx", true); 1187 } else if (CPU == "k6" || CPU == "winchip-c6") 1188 setFeatureEnabled(Features, "mmx", true); 1189 else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" || 1190 CPU == "athlon-tbird" || CPU == "winchip2" || CPU == "c3") { 1191 setFeatureEnabled(Features, "mmx", true); 1192 setFeatureEnabled(Features, "3dnow", true); 1193 } else if (CPU == "athlon-4" || CPU == "athlon-xp" || CPU == "athlon-mp") { 1194 setFeatureEnabled(Features, "sse", true); 1195 setFeatureEnabled(Features, "3dnowa", true); 1196 } else if (CPU == "k8" || CPU == "opteron" || CPU == "athlon64" || 1197 CPU == "athlon-fx") { 1198 setFeatureEnabled(Features, "sse2", true); 1199 setFeatureEnabled(Features, "3dnowa", true); 1200 } else if (CPU == "k8-sse3") { 1201 setFeatureEnabled(Features, "sse3", true); 1202 setFeatureEnabled(Features, "3dnowa", true); 1203 } else if (CPU == "c3-2") 1204 setFeatureEnabled(Features, "sse", true); 1205} 1206 1207bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1208 const std::string &Name, 1209 bool Enabled) const { 1210 // FIXME: This *really* should not be here. We need some way of translating 1211 // options into llvm subtarget features. 1212 if (!Features.count(Name) && 1213 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1214 return false; 1215 1216 if (Enabled) { 1217 if (Name == "mmx") 1218 Features["mmx"] = true; 1219 else if (Name == "sse") 1220 Features["mmx"] = Features["sse"] = true; 1221 else if (Name == "sse2") 1222 Features["mmx"] = Features["sse"] = Features["sse2"] = true; 1223 else if (Name == "sse3") 1224 Features["mmx"] = Features["sse"] = Features["sse2"] = 1225 Features["sse3"] = true; 1226 else if (Name == "ssse3") 1227 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1228 Features["ssse3"] = true; 1229 else if (Name == "sse4" || Name == "sse4.2") 1230 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1231 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1232 else if (Name == "sse4.1") 1233 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1234 Features["ssse3"] = Features["sse41"] = true; 1235 else if (Name == "3dnow") 1236 Features["3dnowa"] = true; 1237 else if (Name == "3dnowa") 1238 Features["3dnow"] = Features["3dnowa"] = true; 1239 else if (Name == "aes") 1240 Features["aes"] = true; 1241 else if (Name == "avx") 1242 Features["avx"] = true; 1243 } else { 1244 if (Name == "mmx") 1245 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = 1246 Features["sse"] = Features["sse2"] = Features["sse3"] = 1247 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1248 else if (Name == "sse") 1249 Features["sse"] = Features["sse2"] = Features["sse3"] = 1250 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1251 else if (Name == "sse2") 1252 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1253 Features["sse41"] = Features["sse42"] = false; 1254 else if (Name == "sse3") 1255 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1256 Features["sse42"] = false; 1257 else if (Name == "ssse3") 1258 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1259 else if (Name == "sse4" || Name == "sse4.1") 1260 Features["sse41"] = Features["sse42"] = false; 1261 else if (Name == "sse4.2") 1262 Features["sse42"] = false; 1263 else if (Name == "3dnow") 1264 Features["3dnow"] = Features["3dnowa"] = false; 1265 else if (Name == "3dnowa") 1266 Features["3dnowa"] = false; 1267 else if (Name == "aes") 1268 Features["aes"] = false; 1269 else if (Name == "avx") 1270 Features["avx"] = false; 1271 } 1272 1273 return true; 1274} 1275 1276/// HandleTargetOptions - Perform initialization based on the user 1277/// configured set of features. 1278void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1279 // Remember the maximum enabled sselevel. 1280 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1281 // Ignore disabled features. 1282 if (Features[i][0] == '-') 1283 continue; 1284 1285 if (Features[i].substr(1) == "aes") { 1286 HasAES = true; 1287 continue; 1288 } 1289 1290 // FIXME: Not sure yet how to treat AVX in regard to SSE levels. 1291 // For now let it be enabled together with other SSE levels. 1292 if (Features[i].substr(1) == "avx") { 1293 HasAVX = true; 1294 continue; 1295 } 1296 1297 assert(Features[i][0] == '+' && "Invalid target feature!"); 1298 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1299 .Case("sse42", SSE42) 1300 .Case("sse41", SSE41) 1301 .Case("ssse3", SSSE3) 1302 .Case("sse3", SSE3) 1303 .Case("sse2", SSE2) 1304 .Case("sse", SSE1) 1305 .Case("mmx", MMX) 1306 .Default(NoMMXSSE); 1307 SSELevel = std::max(SSELevel, Level); 1308 1309 AMD3DNowEnum ThreeDNowLevel = 1310 llvm::StringSwitch<AMD3DNowEnum>(Features[i].substr(1)) 1311 .Case("3dnowa", AMD3DNowAthlon) 1312 .Case("3dnow", AMD3DNow) 1313 .Default(NoAMD3DNow); 1314 1315 AMD3DNowLevel = std::max(AMD3DNowLevel, ThreeDNowLevel); 1316 } 1317} 1318 1319/// X86TargetInfo::getTargetDefines - Return a set of the X86-specific #defines 1320/// that are not tied to a specific subtarget. 1321void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1322 MacroBuilder &Builder) const { 1323 // Target identification. 1324 if (PointerWidth == 64) { 1325 Builder.defineMacro("_LP64"); 1326 Builder.defineMacro("__LP64__"); 1327 Builder.defineMacro("__amd64__"); 1328 Builder.defineMacro("__amd64"); 1329 Builder.defineMacro("__x86_64"); 1330 Builder.defineMacro("__x86_64__"); 1331 } else { 1332 DefineStd(Builder, "i386", Opts); 1333 } 1334 1335 if (HasAES) 1336 Builder.defineMacro("__AES__"); 1337 1338 if (HasAVX) 1339 Builder.defineMacro("__AVX__"); 1340 1341 // Target properties. 1342 Builder.defineMacro("__LITTLE_ENDIAN__"); 1343 1344 // Subtarget options. 1345 Builder.defineMacro("__nocona"); 1346 Builder.defineMacro("__nocona__"); 1347 Builder.defineMacro("__tune_nocona__"); 1348 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1349 1350 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1351 // functions in glibc header files that use FP Stack inline asm which the 1352 // backend can't deal with (PR879). 1353 Builder.defineMacro("__NO_MATH_INLINES"); 1354 1355 // Each case falls through to the previous one here. 1356 switch (SSELevel) { 1357 case SSE42: 1358 Builder.defineMacro("__SSE4_2__"); 1359 case SSE41: 1360 Builder.defineMacro("__SSE4_1__"); 1361 case SSSE3: 1362 Builder.defineMacro("__SSSE3__"); 1363 case SSE3: 1364 Builder.defineMacro("__SSE3__"); 1365 case SSE2: 1366 Builder.defineMacro("__SSE2__"); 1367 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 1368 case SSE1: 1369 Builder.defineMacro("__SSE__"); 1370 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 1371 case MMX: 1372 Builder.defineMacro("__MMX__"); 1373 case NoMMXSSE: 1374 break; 1375 } 1376 1377 if (Opts.Microsoft && PointerWidth == 32) { 1378 switch (SSELevel) { 1379 case SSE42: 1380 case SSE41: 1381 case SSSE3: 1382 case SSE3: 1383 case SSE2: 1384 Builder.defineMacro("_M_IX86_FP", llvm::Twine(2)); 1385 break; 1386 case SSE1: 1387 Builder.defineMacro("_M_IX86_FP", llvm::Twine(1)); 1388 break; 1389 default: 1390 Builder.defineMacro("_M_IX86_FP", llvm::Twine(0)); 1391 } 1392 } 1393 1394 // Each case falls through to the previous one here. 1395 switch (AMD3DNowLevel) { 1396 case AMD3DNowAthlon: 1397 Builder.defineMacro("__3dNOW_A__"); 1398 case AMD3DNow: 1399 Builder.defineMacro("__3dNOW__"); 1400 case NoAMD3DNow: 1401 break; 1402 } 1403} 1404 1405 1406bool 1407X86TargetInfo::validateAsmConstraint(const char *&Name, 1408 TargetInfo::ConstraintInfo &Info) const { 1409 switch (*Name) { 1410 default: return false; 1411 case 'Y': // first letter of a pair: 1412 switch (*(Name+1)) { 1413 default: return false; 1414 case '0': // First SSE register. 1415 case 't': // Any SSE register, when SSE2 is enabled. 1416 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 1417 case 'm': // any MMX register, when inter-unit moves enabled. 1418 break; // falls through to setAllowsRegister. 1419 } 1420 case 'a': // eax. 1421 case 'b': // ebx. 1422 case 'c': // ecx. 1423 case 'd': // edx. 1424 case 'S': // esi. 1425 case 'D': // edi. 1426 case 'A': // edx:eax. 1427 case 'f': // any x87 floating point stack register. 1428 case 't': // top of floating point stack. 1429 case 'u': // second from top of floating point stack. 1430 case 'q': // Any register accessible as [r]l: a, b, c, and d. 1431 case 'y': // Any MMX register. 1432 case 'x': // Any SSE register. 1433 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 1434 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 1435 case 'l': // "Index" registers: any general register that can be used as an 1436 // index in a base+index memory access. 1437 Info.setAllowsRegister(); 1438 return true; 1439 case 'C': // SSE floating point constant. 1440 case 'G': // x87 floating point constant. 1441 case 'e': // 32-bit signed integer constant for use with zero-extending 1442 // x86_64 instructions. 1443 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 1444 // x86_64 instructions. 1445 return true; 1446 } 1447 return false; 1448} 1449 1450 1451std::string 1452X86TargetInfo::convertConstraint(const char *&Constraint) const { 1453 switch (*Constraint) { 1454 case 'a': return std::string("{ax}"); 1455 case 'b': return std::string("{bx}"); 1456 case 'c': return std::string("{cx}"); 1457 case 'd': return std::string("{dx}"); 1458 case 'S': return std::string("{si}"); 1459 case 'D': return std::string("{di}"); 1460 case 'p': // address 1461 return std::string("im"); 1462 case 't': // top of floating point stack. 1463 return std::string("{st}"); 1464 case 'u': // second from top of floating point stack. 1465 return std::string("{st(1)}"); // second from top of floating point stack. 1466 default: 1467 return std::string(1, *Constraint); 1468 } 1469} 1470} // end anonymous namespace 1471 1472namespace { 1473// X86-32 generic target 1474class X86_32TargetInfo : public X86TargetInfo { 1475public: 1476 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 1477 DoubleAlign = LongLongAlign = 32; 1478 LongDoubleWidth = 96; 1479 LongDoubleAlign = 32; 1480 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1481 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 1482 "a0:0:64-f80:32:32-n8:16:32"; 1483 SizeType = UnsignedInt; 1484 PtrDiffType = SignedInt; 1485 IntPtrType = SignedInt; 1486 RegParmMax = 3; 1487 1488 // Use fpret for all types. 1489 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 1490 (1 << TargetInfo::Double) | 1491 (1 << TargetInfo::LongDouble)); 1492 } 1493 virtual const char *getVAListDeclaration() const { 1494 return "typedef char* __builtin_va_list;"; 1495 } 1496 1497 int getEHDataRegisterNumber(unsigned RegNo) const { 1498 if (RegNo == 0) return 0; 1499 if (RegNo == 1) return 2; 1500 return -1; 1501 } 1502}; 1503} // end anonymous namespace 1504 1505namespace { 1506class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 1507public: 1508 OpenBSDI386TargetInfo(const std::string& triple) : 1509 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 1510 SizeType = UnsignedLong; 1511 IntPtrType = SignedLong; 1512 PtrDiffType = SignedLong; 1513 } 1514}; 1515} // end anonymous namespace 1516 1517namespace { 1518class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 1519public: 1520 DarwinI386TargetInfo(const std::string& triple) : 1521 DarwinTargetInfo<X86_32TargetInfo>(triple) { 1522 LongDoubleWidth = 128; 1523 LongDoubleAlign = 128; 1524 SizeType = UnsignedLong; 1525 IntPtrType = SignedLong; 1526 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1527 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 1528 "a0:0:64-f80:128:128-n8:16:32"; 1529 HasAlignMac68kSupport = true; 1530 } 1531 1532}; 1533} // end anonymous namespace 1534 1535namespace { 1536// x86-32 Windows target 1537class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 1538public: 1539 WindowsX86_32TargetInfo(const std::string& triple) 1540 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 1541 TLSSupported = false; 1542 WCharType = UnsignedShort; 1543 DoubleAlign = LongLongAlign = 64; 1544 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1545 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 1546 "v128:128:128-a0:0:64-f80:32:32-n8:16:32"; 1547 } 1548 virtual void getTargetDefines(const LangOptions &Opts, 1549 MacroBuilder &Builder) const { 1550 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 1551 } 1552}; 1553} // end anonymous namespace 1554 1555namespace { 1556 1557// x86-32 Windows Visual Studio target 1558class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 1559public: 1560 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 1561 : WindowsX86_32TargetInfo(triple) { 1562 LongDoubleWidth = LongDoubleAlign = 64; 1563 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 1564 } 1565 virtual void getTargetDefines(const LangOptions &Opts, 1566 MacroBuilder &Builder) const { 1567 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 1568 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 1569 // The value of the following reflects processor type. 1570 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 1571 // We lost the original triple, so we use the default. 1572 Builder.defineMacro("_M_IX86", "600"); 1573 } 1574}; 1575} // end anonymous namespace 1576 1577namespace { 1578// x86-32 MinGW target 1579class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 1580public: 1581 MinGWX86_32TargetInfo(const std::string& triple) 1582 : WindowsX86_32TargetInfo(triple) { 1583 } 1584 virtual void getTargetDefines(const LangOptions &Opts, 1585 MacroBuilder &Builder) const { 1586 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 1587 DefineStd(Builder, "WIN32", Opts); 1588 DefineStd(Builder, "WINNT", Opts); 1589 Builder.defineMacro("_X86_"); 1590 Builder.defineMacro("__MSVCRT__"); 1591 Builder.defineMacro("__MINGW32__"); 1592 1593 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 1594 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 1595 if (Opts.Microsoft) 1596 // Provide "as-is" __declspec. 1597 Builder.defineMacro("__declspec", "__declspec"); 1598 else 1599 // Provide alias of __attribute__ like mingw32-gcc. 1600 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 1601 } 1602}; 1603} // end anonymous namespace 1604 1605namespace { 1606// x86-32 Cygwin target 1607class CygwinX86_32TargetInfo : public X86_32TargetInfo { 1608public: 1609 CygwinX86_32TargetInfo(const std::string& triple) 1610 : X86_32TargetInfo(triple) { 1611 TLSSupported = false; 1612 WCharType = UnsignedShort; 1613 DoubleAlign = LongLongAlign = 64; 1614 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1615 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 1616 "a0:0:64-f80:32:32-n8:16:32"; 1617 } 1618 virtual void getTargetDefines(const LangOptions &Opts, 1619 MacroBuilder &Builder) const { 1620 X86_32TargetInfo::getTargetDefines(Opts, Builder); 1621 Builder.defineMacro("__CYGWIN__"); 1622 Builder.defineMacro("__CYGWIN32__"); 1623 DefineStd(Builder, "unix", Opts); 1624 if (Opts.CPlusPlus) 1625 Builder.defineMacro("_GNU_SOURCE"); 1626 } 1627}; 1628} // end anonymous namespace 1629 1630namespace { 1631// x86-32 Haiku target 1632class HaikuX86_32TargetInfo : public X86_32TargetInfo { 1633public: 1634 HaikuX86_32TargetInfo(const std::string& triple) 1635 : X86_32TargetInfo(triple) { 1636 SizeType = UnsignedLong; 1637 IntPtrType = SignedLong; 1638 PtrDiffType = SignedLong; 1639 this->UserLabelPrefix = ""; 1640 } 1641 virtual void getTargetDefines(const LangOptions &Opts, 1642 MacroBuilder &Builder) const { 1643 X86_32TargetInfo::getTargetDefines(Opts, Builder); 1644 Builder.defineMacro("__INTEL__"); 1645 Builder.defineMacro("__HAIKU__"); 1646 } 1647}; 1648} // end anonymous namespace 1649 1650namespace { 1651// x86-64 generic target 1652class X86_64TargetInfo : public X86TargetInfo { 1653public: 1654 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 1655 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 1656 LongDoubleWidth = 128; 1657 LongDoubleAlign = 128; 1658 LargeArrayMinWidth = 128; 1659 LargeArrayAlign = 128; 1660 IntMaxType = SignedLong; 1661 UIntMaxType = UnsignedLong; 1662 Int64Type = SignedLong; 1663 RegParmMax = 6; 1664 1665 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1666 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 1667 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"; 1668 1669 // Use fpret only for long double. 1670 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 1671 } 1672 virtual const char *getVAListDeclaration() const { 1673 return "typedef struct __va_list_tag {" 1674 " unsigned gp_offset;" 1675 " unsigned fp_offset;" 1676 " void* overflow_arg_area;" 1677 " void* reg_save_area;" 1678 "} __va_list_tag;" 1679 "typedef __va_list_tag __builtin_va_list[1];"; 1680 } 1681 1682 int getEHDataRegisterNumber(unsigned RegNo) const { 1683 if (RegNo == 0) return 0; 1684 if (RegNo == 1) return 1; 1685 return -1; 1686 } 1687}; 1688} // end anonymous namespace 1689 1690namespace { 1691// x86-64 Windows target 1692class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 1693public: 1694 WindowsX86_64TargetInfo(const std::string& triple) 1695 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 1696 TLSSupported = false; 1697 WCharType = UnsignedShort; 1698 LongWidth = LongAlign = 32; 1699 DoubleAlign = LongLongAlign = 64; 1700 IntMaxType = SignedLongLong; 1701 UIntMaxType = UnsignedLongLong; 1702 Int64Type = SignedLongLong; 1703 SizeType = UnsignedLongLong; 1704 PtrDiffType = SignedLongLong; 1705 IntPtrType = SignedLongLong; 1706 this->UserLabelPrefix = ""; 1707 } 1708 virtual void getTargetDefines(const LangOptions &Opts, 1709 MacroBuilder &Builder) const { 1710 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 1711 Builder.defineMacro("_WIN64"); 1712 } 1713 virtual const char *getVAListDeclaration() const { 1714 return "typedef char* __builtin_va_list;"; 1715 } 1716}; 1717} // end anonymous namespace 1718 1719namespace { 1720// x86-64 Windows Visual Studio target 1721class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 1722public: 1723 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 1724 : WindowsX86_64TargetInfo(triple) { 1725 LongDoubleWidth = LongDoubleAlign = 64; 1726 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 1727 } 1728 virtual void getTargetDefines(const LangOptions &Opts, 1729 MacroBuilder &Builder) const { 1730 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 1731 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 1732 Builder.defineMacro("_M_X64"); 1733 Builder.defineMacro("_M_AMD64"); 1734 } 1735}; 1736} // end anonymous namespace 1737 1738namespace { 1739// x86-64 MinGW target 1740class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 1741public: 1742 MinGWX86_64TargetInfo(const std::string& triple) 1743 : WindowsX86_64TargetInfo(triple) { 1744 } 1745 virtual void getTargetDefines(const LangOptions &Opts, 1746 MacroBuilder &Builder) const { 1747 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 1748 DefineStd(Builder, "WIN64", Opts); 1749 Builder.defineMacro("__MSVCRT__"); 1750 Builder.defineMacro("__MINGW32__"); 1751 Builder.defineMacro("__MINGW64__"); 1752 1753 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 1754 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 1755 if (Opts.Microsoft) 1756 // Provide "as-is" __declspec. 1757 Builder.defineMacro("__declspec", "__declspec"); 1758 else 1759 // Provide alias of __attribute__ like mingw32-gcc. 1760 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 1761 } 1762}; 1763} // end anonymous namespace 1764 1765namespace { 1766class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 1767public: 1768 DarwinX86_64TargetInfo(const std::string& triple) 1769 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 1770 Int64Type = SignedLongLong; 1771 } 1772}; 1773} // end anonymous namespace 1774 1775namespace { 1776class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 1777public: 1778 OpenBSDX86_64TargetInfo(const std::string& triple) 1779 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 1780 IntMaxType = SignedLongLong; 1781 UIntMaxType = UnsignedLongLong; 1782 Int64Type = SignedLongLong; 1783 } 1784}; 1785} // end anonymous namespace 1786 1787namespace { 1788class ARMTargetInfo : public TargetInfo { 1789 // Possible FPU choices. 1790 enum FPUMode { 1791 NoFPU, 1792 VFP2FPU, 1793 VFP3FPU, 1794 NeonFPU 1795 }; 1796 1797 static bool FPUModeIsVFP(FPUMode Mode) { 1798 return Mode >= VFP2FPU && Mode <= NeonFPU; 1799 } 1800 1801 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1802 static const char * const GCCRegNames[]; 1803 1804 std::string ABI, CPU; 1805 1806 unsigned FPU : 3; 1807 1808 unsigned IsThumb : 1; 1809 1810 // Initialized via features. 1811 unsigned SoftFloat : 1; 1812 unsigned SoftFloatABI : 1; 1813 1814 static const Builtin::Info BuiltinInfo[]; 1815 1816public: 1817 ARMTargetInfo(const std::string &TripleStr) 1818 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 1819 { 1820 SizeType = UnsignedInt; 1821 PtrDiffType = SignedInt; 1822 1823 // {} in inline assembly are neon specifiers, not assembly variant 1824 // specifiers. 1825 NoAsmVariants = true; 1826 1827 // FIXME: Should we just treat this as a feature? 1828 IsThumb = getTriple().getArchName().startswith("thumb"); 1829 if (IsThumb) { 1830 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 1831 // so set preferred for small types to 32. 1832 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 1833 "i64:64:64-f32:32:32-f64:64:64-" 1834 "v64:64:64-v128:64:128-a0:0:32-n32"); 1835 } else { 1836 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1837 "i64:64:64-f32:32:32-f64:64:64-" 1838 "v64:64:64-v128:64:128-a0:0:64-n32"); 1839 } 1840 1841 // ARM targets default to using the ARM C++ ABI. 1842 CXXABI = CXXABI_ARM; 1843 } 1844 virtual const char *getABI() const { return ABI.c_str(); } 1845 virtual bool setABI(const std::string &Name) { 1846 ABI = Name; 1847 1848 // The defaults (above) are for AAPCS, check if we need to change them. 1849 // 1850 // FIXME: We need support for -meabi... we could just mangle it into the 1851 // name. 1852 if (Name == "apcs-gnu") { 1853 DoubleAlign = LongLongAlign = LongDoubleAlign = 32; 1854 SizeType = UnsignedLong; 1855 1856 // Do not respect the alignment of bit-field types when laying out 1857 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 1858 UseBitFieldTypeAlignment = false; 1859 1860 if (IsThumb) { 1861 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 1862 // so set preferred for small types to 32. 1863 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 1864 "i64:32:32-f32:32:32-f64:32:32-" 1865 "v64:32:64-v128:32:128-a0:0:32-n32"); 1866 } else { 1867 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1868 "i64:32:64-f32:32:32-f64:32:64-" 1869 "v64:32:64-v128:32:128-a0:0:32-n32"); 1870 } 1871 1872 // FIXME: Override "preferred align" for double and long long. 1873 } else if (Name == "aapcs") { 1874 // FIXME: Enumerated types are variable width in straight AAPCS. 1875 } else if (Name == "aapcs-linux") { 1876 ; 1877 } else 1878 return false; 1879 1880 return true; 1881 } 1882 1883 void getDefaultFeatures(const std::string &CPU, 1884 llvm::StringMap<bool> &Features) const { 1885 // FIXME: This should not be here. 1886 Features["vfp2"] = false; 1887 Features["vfp3"] = false; 1888 Features["neon"] = false; 1889 1890 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 1891 Features["vfp2"] = true; 1892 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 1893 Features["neon"] = true; 1894 } 1895 1896 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1897 const std::string &Name, 1898 bool Enabled) const { 1899 if (Name == "soft-float" || Name == "soft-float-abi") { 1900 Features[Name] = Enabled; 1901 } else if (Name == "vfp2" || Name == "vfp3" || Name == "neon") { 1902 // These effectively are a single option, reset them when any is enabled. 1903 if (Enabled) 1904 Features["vfp2"] = Features["vfp3"] = Features["neon"] = false; 1905 Features[Name] = Enabled; 1906 } else 1907 return false; 1908 1909 return true; 1910 } 1911 1912 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 1913 FPU = NoFPU; 1914 SoftFloat = SoftFloatABI = false; 1915 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 1916 if (Features[i] == "+soft-float") 1917 SoftFloat = true; 1918 else if (Features[i] == "+soft-float-abi") 1919 SoftFloatABI = true; 1920 else if (Features[i] == "+vfp2") 1921 FPU = VFP2FPU; 1922 else if (Features[i] == "+vfp3") 1923 FPU = VFP3FPU; 1924 else if (Features[i] == "+neon") 1925 FPU = NeonFPU; 1926 } 1927 1928 // Remove front-end specific options which the backend handles differently. 1929 std::vector<std::string>::iterator it; 1930 it = std::find(Features.begin(), Features.end(), "+soft-float"); 1931 if (it != Features.end()) 1932 Features.erase(it); 1933 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 1934 if (it != Features.end()) 1935 Features.erase(it); 1936 } 1937 1938 static const char *getCPUDefineSuffix(llvm::StringRef Name) { 1939 return llvm::StringSwitch<const char*>(Name) 1940 .Cases("arm8", "arm810", "4") 1941 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 1942 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 1943 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 1944 .Case("ep9312", "4T") 1945 .Cases("arm10tdmi", "arm1020t", "5T") 1946 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 1947 .Case("arm926ej-s", "5TEJ") 1948 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 1949 .Cases("xscale", "iwmmxt", "5TE") 1950 .Case("arm1136j-s", "6J") 1951 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 1952 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 1953 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 1954 .Cases("cortex-a8", "cortex-a9", "7A") 1955 .Case("cortex-m3", "7M") 1956 .Case("cortex-m0", "6M") 1957 .Default(0); 1958 } 1959 virtual bool setCPU(const std::string &Name) { 1960 if (!getCPUDefineSuffix(Name)) 1961 return false; 1962 1963 CPU = Name; 1964 return true; 1965 } 1966 virtual void getTargetDefines(const LangOptions &Opts, 1967 MacroBuilder &Builder) const { 1968 // Target identification. 1969 Builder.defineMacro("__arm"); 1970 Builder.defineMacro("__arm__"); 1971 1972 // Target properties. 1973 Builder.defineMacro("__ARMEL__"); 1974 Builder.defineMacro("__LITTLE_ENDIAN__"); 1975 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1976 1977 llvm::StringRef CPUArch = getCPUDefineSuffix(CPU); 1978 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 1979 1980 // Subtarget options. 1981 1982 // FIXME: It's more complicated than this and we don't really support 1983 // interworking. 1984 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 1985 Builder.defineMacro("__THUMB_INTERWORK__"); 1986 1987 if (ABI == "aapcs" || ABI == "aapcs-linux") 1988 Builder.defineMacro("__ARM_EABI__"); 1989 1990 if (SoftFloat) 1991 Builder.defineMacro("__SOFTFP__"); 1992 1993 if (CPU == "xscale") 1994 Builder.defineMacro("__XSCALE__"); 1995 1996 bool IsARMv7 = CPUArch.startswith("7"); 1997 if (IsThumb) { 1998 Builder.defineMacro("__THUMBEL__"); 1999 Builder.defineMacro("__thumb__"); 2000 if (CPUArch == "6T2" || IsARMv7) 2001 Builder.defineMacro("__thumb2__"); 2002 } 2003 2004 // Note, this is always on in gcc, even though it doesn't make sense. 2005 Builder.defineMacro("__APCS_32__"); 2006 2007 if (FPUModeIsVFP((FPUMode) FPU)) 2008 Builder.defineMacro("__VFP_FP__"); 2009 2010 // This only gets set when Neon instructions are actually available, unlike 2011 // the VFP define, hence the soft float and arch check. This is subtly 2012 // different from gcc, we follow the intent which was that it should be set 2013 // when Neon instructions are actually available. 2014 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2015 Builder.defineMacro("__ARM_NEON__"); 2016 } 2017 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2018 unsigned &NumRecords) const { 2019 Records = BuiltinInfo; 2020 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2021 } 2022 virtual const char *getVAListDeclaration() const { 2023 return "typedef void* __builtin_va_list;"; 2024 } 2025 virtual void getGCCRegNames(const char * const *&Names, 2026 unsigned &NumNames) const; 2027 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2028 unsigned &NumAliases) const; 2029 virtual bool validateAsmConstraint(const char *&Name, 2030 TargetInfo::ConstraintInfo &Info) const { 2031 // FIXME: Check if this is complete 2032 switch (*Name) { 2033 default: 2034 case 'l': // r0-r7 2035 case 'h': // r8-r15 2036 case 'w': // VFP Floating point register single precision 2037 case 'P': // VFP Floating point register double precision 2038 Info.setAllowsRegister(); 2039 return true; 2040 case 'U': // a memory reference... 2041 switch (Name[1]) { 2042 case 'q': // ...ARMV4 ldrsb 2043 case 'v': // ...VFP load/store (reg+constant offset) 2044 case 'y': // ...iWMMXt load/store 2045 Info.setAllowsMemory(); 2046 Name++; 2047 return true; 2048 } 2049 } 2050 return false; 2051 } 2052 std::string 2053 virtual convertConstraint(const char *&Constraint) const { 2054 std::string R; 2055 switch (*Constraint) { 2056 case 'U': // Two-character constraint; add "^" hint for later parsing. 2057 R = std::string("^") + Constraint; 2058 Constraint++; 2059 break; 2060 default: 2061 return std::string(1, *Constraint); 2062 } 2063 return R; 2064 } 2065 virtual const char *getClobbers() const { 2066 // FIXME: Is this really right? 2067 return ""; 2068 } 2069}; 2070 2071const char * const ARMTargetInfo::GCCRegNames[] = { 2072 // Integer registers 2073 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2074 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2075 2076 // Float registers 2077 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2078 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2079 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2080 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2081 2082 // Double registers 2083 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2084 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2085 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2086 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2087 2088 // Quad registers 2089 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2090 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2091}; 2092 2093void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2094 unsigned &NumNames) const { 2095 Names = GCCRegNames; 2096 NumNames = llvm::array_lengthof(GCCRegNames); 2097} 2098 2099const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2100 { { "a1" }, "r0" }, 2101 { { "a2" }, "r1" }, 2102 { { "a3" }, "r2" }, 2103 { { "a4" }, "r3" }, 2104 { { "v1" }, "r4" }, 2105 { { "v2" }, "r5" }, 2106 { { "v3" }, "r6" }, 2107 { { "v4" }, "r7" }, 2108 { { "v5" }, "r8" }, 2109 { { "v6", "rfp" }, "r9" }, 2110 { { "sl" }, "r10" }, 2111 { { "fp" }, "r11" }, 2112 { { "ip" }, "r12" }, 2113 { { "r13" }, "sp" }, 2114 { { "r14" }, "lr" }, 2115 { { "r15" }, "pc" }, 2116 // The S, D and Q registers overlap, but aren't really aliases; we 2117 // don't want to substitute one of these for a different-sized one. 2118}; 2119 2120void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2121 unsigned &NumAliases) const { 2122 Aliases = GCCRegAliases; 2123 NumAliases = llvm::array_lengthof(GCCRegAliases); 2124} 2125 2126const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2127#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false }, 2128#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2129 ALL_LANGUAGES, false }, 2130#include "clang/Basic/BuiltinsARM.def" 2131}; 2132} // end anonymous namespace. 2133 2134 2135namespace { 2136class DarwinARMTargetInfo : 2137 public DarwinTargetInfo<ARMTargetInfo> { 2138protected: 2139 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2140 MacroBuilder &Builder) const { 2141 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2142 } 2143 2144public: 2145 DarwinARMTargetInfo(const std::string& triple) 2146 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2147 HasAlignMac68kSupport = true; 2148 } 2149}; 2150} // end anonymous namespace. 2151 2152namespace { 2153class SparcV8TargetInfo : public TargetInfo { 2154 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2155 static const char * const GCCRegNames[]; 2156 bool SoftFloat; 2157public: 2158 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 2159 // FIXME: Support Sparc quad-precision long double? 2160 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2161 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2162 } 2163 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2164 const std::string &Name, 2165 bool Enabled) const { 2166 if (Name == "soft-float") 2167 Features[Name] = Enabled; 2168 else 2169 return false; 2170 2171 return true; 2172 } 2173 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2174 SoftFloat = false; 2175 for (unsigned i = 0, e = Features.size(); i != e; ++i) 2176 if (Features[i] == "+soft-float") 2177 SoftFloat = true; 2178 } 2179 virtual void getTargetDefines(const LangOptions &Opts, 2180 MacroBuilder &Builder) const { 2181 DefineStd(Builder, "sparc", Opts); 2182 Builder.defineMacro("__sparcv8"); 2183 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2184 2185 if (SoftFloat) 2186 Builder.defineMacro("SOFT_FLOAT", "1"); 2187 } 2188 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2189 unsigned &NumRecords) const { 2190 // FIXME: Implement! 2191 } 2192 virtual const char *getVAListDeclaration() const { 2193 return "typedef void* __builtin_va_list;"; 2194 } 2195 virtual void getGCCRegNames(const char * const *&Names, 2196 unsigned &NumNames) const; 2197 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2198 unsigned &NumAliases) const; 2199 virtual bool validateAsmConstraint(const char *&Name, 2200 TargetInfo::ConstraintInfo &info) const { 2201 // FIXME: Implement! 2202 return false; 2203 } 2204 virtual const char *getClobbers() const { 2205 // FIXME: Implement! 2206 return ""; 2207 } 2208}; 2209 2210const char * const SparcV8TargetInfo::GCCRegNames[] = { 2211 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2212 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 2213 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 2214 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 2215}; 2216 2217void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 2218 unsigned &NumNames) const { 2219 Names = GCCRegNames; 2220 NumNames = llvm::array_lengthof(GCCRegNames); 2221} 2222 2223const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 2224 { { "g0" }, "r0" }, 2225 { { "g1" }, "r1" }, 2226 { { "g2" }, "r2" }, 2227 { { "g3" }, "r3" }, 2228 { { "g4" }, "r4" }, 2229 { { "g5" }, "r5" }, 2230 { { "g6" }, "r6" }, 2231 { { "g7" }, "r7" }, 2232 { { "o0" }, "r8" }, 2233 { { "o1" }, "r9" }, 2234 { { "o2" }, "r10" }, 2235 { { "o3" }, "r11" }, 2236 { { "o4" }, "r12" }, 2237 { { "o5" }, "r13" }, 2238 { { "o6", "sp" }, "r14" }, 2239 { { "o7" }, "r15" }, 2240 { { "l0" }, "r16" }, 2241 { { "l1" }, "r17" }, 2242 { { "l2" }, "r18" }, 2243 { { "l3" }, "r19" }, 2244 { { "l4" }, "r20" }, 2245 { { "l5" }, "r21" }, 2246 { { "l6" }, "r22" }, 2247 { { "l7" }, "r23" }, 2248 { { "i0" }, "r24" }, 2249 { { "i1" }, "r25" }, 2250 { { "i2" }, "r26" }, 2251 { { "i3" }, "r27" }, 2252 { { "i4" }, "r28" }, 2253 { { "i5" }, "r29" }, 2254 { { "i6", "fp" }, "r30" }, 2255 { { "i7" }, "r31" }, 2256}; 2257 2258void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2259 unsigned &NumAliases) const { 2260 Aliases = GCCRegAliases; 2261 NumAliases = llvm::array_lengthof(GCCRegAliases); 2262} 2263} // end anonymous namespace. 2264 2265namespace { 2266class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 2267public: 2268 AuroraUXSparcV8TargetInfo(const std::string& triple) : 2269 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 2270 SizeType = UnsignedInt; 2271 PtrDiffType = SignedInt; 2272 } 2273}; 2274class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 2275public: 2276 SolarisSparcV8TargetInfo(const std::string& triple) : 2277 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 2278 SizeType = UnsignedInt; 2279 PtrDiffType = SignedInt; 2280 } 2281}; 2282} // end anonymous namespace. 2283 2284namespace { 2285 class MSP430TargetInfo : public TargetInfo { 2286 static const char * const GCCRegNames[]; 2287 public: 2288 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 2289 TLSSupported = false; 2290 IntWidth = 16; IntAlign = 16; 2291 LongWidth = 32; LongLongWidth = 64; 2292 LongAlign = LongLongAlign = 16; 2293 PointerWidth = 16; PointerAlign = 16; 2294 SizeType = UnsignedInt; 2295 IntMaxType = SignedLong; 2296 UIntMaxType = UnsignedLong; 2297 IntPtrType = SignedShort; 2298 PtrDiffType = SignedInt; 2299 SigAtomicType = SignedLong; 2300 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 2301 } 2302 virtual void getTargetDefines(const LangOptions &Opts, 2303 MacroBuilder &Builder) const { 2304 Builder.defineMacro("MSP430"); 2305 Builder.defineMacro("__MSP430__"); 2306 // FIXME: defines for different 'flavours' of MCU 2307 } 2308 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2309 unsigned &NumRecords) const { 2310 // FIXME: Implement. 2311 Records = 0; 2312 NumRecords = 0; 2313 } 2314 virtual void getGCCRegNames(const char * const *&Names, 2315 unsigned &NumNames) const; 2316 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2317 unsigned &NumAliases) const { 2318 // No aliases. 2319 Aliases = 0; 2320 NumAliases = 0; 2321 } 2322 virtual bool validateAsmConstraint(const char *&Name, 2323 TargetInfo::ConstraintInfo &info) const { 2324 // No target constraints for now. 2325 return false; 2326 } 2327 virtual const char *getClobbers() const { 2328 // FIXME: Is this really right? 2329 return ""; 2330 } 2331 virtual const char *getVAListDeclaration() const { 2332 // FIXME: implement 2333 return "typedef char* __builtin_va_list;"; 2334 } 2335 }; 2336 2337 const char * const MSP430TargetInfo::GCCRegNames[] = { 2338 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2339 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2340 }; 2341 2342 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 2343 unsigned &NumNames) const { 2344 Names = GCCRegNames; 2345 NumNames = llvm::array_lengthof(GCCRegNames); 2346 } 2347} 2348 2349 2350namespace { 2351 class SystemZTargetInfo : public TargetInfo { 2352 static const char * const GCCRegNames[]; 2353 public: 2354 SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) { 2355 TLSSupported = false; 2356 IntWidth = IntAlign = 32; 2357 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64; 2358 PointerWidth = PointerAlign = 64; 2359 DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-" 2360 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64"; 2361 } 2362 virtual void getTargetDefines(const LangOptions &Opts, 2363 MacroBuilder &Builder) const { 2364 Builder.defineMacro("__s390__"); 2365 Builder.defineMacro("__s390x__"); 2366 } 2367 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2368 unsigned &NumRecords) const { 2369 // FIXME: Implement. 2370 Records = 0; 2371 NumRecords = 0; 2372 } 2373 2374 virtual void getGCCRegNames(const char * const *&Names, 2375 unsigned &NumNames) const; 2376 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2377 unsigned &NumAliases) const { 2378 // No aliases. 2379 Aliases = 0; 2380 NumAliases = 0; 2381 } 2382 virtual bool validateAsmConstraint(const char *&Name, 2383 TargetInfo::ConstraintInfo &info) const { 2384 // FIXME: implement 2385 return true; 2386 } 2387 virtual const char *getClobbers() const { 2388 // FIXME: Is this really right? 2389 return ""; 2390 } 2391 virtual const char *getVAListDeclaration() const { 2392 // FIXME: implement 2393 return "typedef char* __builtin_va_list;"; 2394 } 2395 }; 2396 2397 const char * const SystemZTargetInfo::GCCRegNames[] = { 2398 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2399 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2400 }; 2401 2402 void SystemZTargetInfo::getGCCRegNames(const char * const *&Names, 2403 unsigned &NumNames) const { 2404 Names = GCCRegNames; 2405 NumNames = llvm::array_lengthof(GCCRegNames); 2406 } 2407} 2408 2409namespace { 2410 class BlackfinTargetInfo : public TargetInfo { 2411 static const char * const GCCRegNames[]; 2412 public: 2413 BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) { 2414 TLSSupported = false; 2415 DoubleAlign = 32; 2416 LongLongAlign = 32; 2417 LongDoubleAlign = 32; 2418 DescriptionString = "e-p:32:32-i64:32-f64:32-n32"; 2419 } 2420 2421 virtual void getTargetDefines(const LangOptions &Opts, 2422 MacroBuilder &Builder) const { 2423 DefineStd(Builder, "bfin", Opts); 2424 DefineStd(Builder, "BFIN", Opts); 2425 Builder.defineMacro("__ADSPBLACKFIN__"); 2426 // FIXME: This one is really dependent on -mcpu 2427 Builder.defineMacro("__ADSPLPBLACKFIN__"); 2428 // FIXME: Add cpu-dependent defines and __SILICON_REVISION__ 2429 } 2430 2431 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2432 unsigned &NumRecords) const { 2433 // FIXME: Implement. 2434 Records = 0; 2435 NumRecords = 0; 2436 } 2437 2438 virtual void getGCCRegNames(const char * const *&Names, 2439 unsigned &NumNames) const; 2440 2441 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2442 unsigned &NumAliases) const { 2443 // No aliases. 2444 Aliases = 0; 2445 NumAliases = 0; 2446 } 2447 2448 virtual bool validateAsmConstraint(const char *&Name, 2449 TargetInfo::ConstraintInfo &Info) const { 2450 if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) { 2451 Info.setAllowsRegister(); 2452 return true; 2453 } 2454 return false; 2455 } 2456 2457 virtual const char *getClobbers() const { 2458 return ""; 2459 } 2460 2461 virtual const char *getVAListDeclaration() const { 2462 return "typedef char* __builtin_va_list;"; 2463 } 2464 }; 2465 2466 const char * const BlackfinTargetInfo::GCCRegNames[] = { 2467 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2468 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp", 2469 "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3", 2470 "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3", 2471 "a0", "a1", "cc", 2472 "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp", 2473 "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1" 2474 }; 2475 2476 void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names, 2477 unsigned &NumNames) const { 2478 Names = GCCRegNames; 2479 NumNames = llvm::array_lengthof(GCCRegNames); 2480 } 2481} 2482 2483namespace { 2484 2485 // LLVM and Clang cannot be used directly to output native binaries for 2486 // target, but is used to compile C code to llvm bitcode with correct 2487 // type and alignment information. 2488 // 2489 // TCE uses the llvm bitcode as input and uses it for generating customized 2490 // target processor and program binary. TCE co-design environment is 2491 // publicly available in http://tce.cs.tut.fi 2492 2493 class TCETargetInfo : public TargetInfo{ 2494 public: 2495 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 2496 TLSSupported = false; 2497 IntWidth = 32; 2498 LongWidth = LongLongWidth = 32; 2499 PointerWidth = 32; 2500 IntAlign = 32; 2501 LongAlign = LongLongAlign = 32; 2502 PointerAlign = 32; 2503 SizeType = UnsignedInt; 2504 IntMaxType = SignedLong; 2505 UIntMaxType = UnsignedLong; 2506 IntPtrType = SignedInt; 2507 PtrDiffType = SignedInt; 2508 FloatWidth = 32; 2509 FloatAlign = 32; 2510 DoubleWidth = 32; 2511 DoubleAlign = 32; 2512 LongDoubleWidth = 32; 2513 LongDoubleAlign = 32; 2514 FloatFormat = &llvm::APFloat::IEEEsingle; 2515 DoubleFormat = &llvm::APFloat::IEEEsingle; 2516 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 2517 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 2518 "i16:16:32-i32:32:32-i64:32:32-" 2519 "f32:32:32-f64:32:32-v64:32:32-" 2520 "v128:32:32-a0:0:32-n32"; 2521 } 2522 2523 virtual void getTargetDefines(const LangOptions &Opts, 2524 MacroBuilder &Builder) const { 2525 DefineStd(Builder, "tce", Opts); 2526 Builder.defineMacro("__TCE__"); 2527 Builder.defineMacro("__TCE_V1__"); 2528 } 2529 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2530 unsigned &NumRecords) const {} 2531 virtual const char *getClobbers() const { 2532 return ""; 2533 } 2534 virtual const char *getVAListDeclaration() const { 2535 return "typedef void* __builtin_va_list;"; 2536 } 2537 virtual void getGCCRegNames(const char * const *&Names, 2538 unsigned &NumNames) const {} 2539 virtual bool validateAsmConstraint(const char *&Name, 2540 TargetInfo::ConstraintInfo &info) const { 2541 return true; 2542 } 2543 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2544 unsigned &NumAliases) const {} 2545 }; 2546} 2547 2548namespace { 2549class MipsTargetInfo : public TargetInfo { 2550 std::string ABI, CPU; 2551 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2552 static const char * const GCCRegNames[]; 2553public: 2554 MipsTargetInfo(const std::string& triple) : TargetInfo(triple), ABI("o32") { 2555 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 2556 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2557 SizeType = UnsignedInt; 2558 PtrDiffType = SignedInt; 2559 } 2560 virtual const char *getABI() const { return ABI.c_str(); } 2561 virtual bool setABI(const std::string &Name) { 2562 2563 if ((Name == "o32") || (Name == "eabi")) { 2564 ABI = Name; 2565 return true; 2566 } else 2567 return false; 2568 } 2569 virtual bool setCPU(const std::string &Name) { 2570 CPU = Name; 2571 return true; 2572 } 2573 void getDefaultFeatures(const std::string &CPU, 2574 llvm::StringMap<bool> &Features) const { 2575 Features[ABI] = true; 2576 Features[CPU] = true; 2577 } 2578 virtual void getArchDefines(const LangOptions &Opts, 2579 MacroBuilder &Builder) const { 2580 if (ABI == "o32") 2581 Builder.defineMacro("__mips_o32"); 2582 else if (ABI == "eabi") 2583 Builder.defineMacro("__mips_eabi"); 2584 } 2585 virtual void getTargetDefines(const LangOptions &Opts, 2586 MacroBuilder &Builder) const { 2587 DefineStd(Builder, "mips", Opts); 2588 Builder.defineMacro("_mips"); 2589 DefineStd(Builder, "MIPSEB", Opts); 2590 Builder.defineMacro("_MIPSEB"); 2591 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2592 getArchDefines(Opts, Builder); 2593 } 2594 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2595 unsigned &NumRecords) const { 2596 // FIXME: Implement! 2597 } 2598 virtual const char *getVAListDeclaration() const { 2599 return "typedef void* __builtin_va_list;"; 2600 } 2601 virtual void getGCCRegNames(const char * const *&Names, 2602 unsigned &NumNames) const; 2603 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2604 unsigned &NumAliases) const; 2605 virtual bool validateAsmConstraint(const char *&Name, 2606 TargetInfo::ConstraintInfo &Info) const { 2607 switch (*Name) { 2608 default: 2609 case 'r': // CPU registers. 2610 case 'd': // Equivalent to "r" unless generating MIPS16 code. 2611 case 'y': // Equivalent to "r", backwards compatibility only. 2612 case 'f': // floating-point registers. 2613 Info.setAllowsRegister(); 2614 return true; 2615 } 2616 return false; 2617 } 2618 2619 virtual const char *getClobbers() const { 2620 // FIXME: Implement! 2621 return ""; 2622 } 2623}; 2624 2625const char * const MipsTargetInfo::GCCRegNames[] = { 2626 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 2627 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 2628 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 2629 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 2630 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 2631 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 2632 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 2633 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 2634 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 2635 "$fcc5","$fcc6","$fcc7" 2636}; 2637 2638void MipsTargetInfo::getGCCRegNames(const char * const *&Names, 2639 unsigned &NumNames) const { 2640 Names = GCCRegNames; 2641 NumNames = llvm::array_lengthof(GCCRegNames); 2642} 2643 2644const TargetInfo::GCCRegAlias MipsTargetInfo::GCCRegAliases[] = { 2645 { { "at" }, "$1" }, 2646 { { "v0" }, "$2" }, 2647 { { "v1" }, "$3" }, 2648 { { "a0" }, "$4" }, 2649 { { "a1" }, "$5" }, 2650 { { "a2" }, "$6" }, 2651 { { "a3" }, "$7" }, 2652 { { "t0" }, "$8" }, 2653 { { "t1" }, "$9" }, 2654 { { "t2" }, "$10" }, 2655 { { "t3" }, "$11" }, 2656 { { "t4" }, "$12" }, 2657 { { "t5" }, "$13" }, 2658 { { "t6" }, "$14" }, 2659 { { "t7" }, "$15" }, 2660 { { "s0" }, "$16" }, 2661 { { "s1" }, "$17" }, 2662 { { "s2" }, "$18" }, 2663 { { "s3" }, "$19" }, 2664 { { "s4" }, "$20" }, 2665 { { "s5" }, "$21" }, 2666 { { "s6" }, "$22" }, 2667 { { "s7" }, "$23" }, 2668 { { "t8" }, "$24" }, 2669 { { "t9" }, "$25" }, 2670 { { "k0" }, "$26" }, 2671 { { "k1" }, "$27" }, 2672 { { "gp" }, "$28" }, 2673 { { "sp" }, "$29" }, 2674 { { "fp" }, "$30" }, 2675 { { "ra" }, "$31" } 2676}; 2677 2678void MipsTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2679 unsigned &NumAliases) const { 2680 Aliases = GCCRegAliases; 2681 NumAliases = llvm::array_lengthof(GCCRegAliases); 2682} 2683} // end anonymous namespace. 2684 2685namespace { 2686class MipselTargetInfo : public MipsTargetInfo { 2687public: 2688 MipselTargetInfo(const std::string& triple) : MipsTargetInfo(triple) { 2689 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 2690 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2691 } 2692 2693 virtual void getTargetDefines(const LangOptions &Opts, 2694 MacroBuilder &Builder) const; 2695}; 2696 2697void MipselTargetInfo::getTargetDefines(const LangOptions &Opts, 2698 MacroBuilder &Builder) const { 2699 DefineStd(Builder, "mips", Opts); 2700 Builder.defineMacro("_mips"); 2701 DefineStd(Builder, "MIPSEL", Opts); 2702 Builder.defineMacro("_MIPSEL"); 2703 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2704 getArchDefines(Opts, Builder); 2705} 2706} // end anonymous namespace. 2707 2708//===----------------------------------------------------------------------===// 2709// Driver code 2710//===----------------------------------------------------------------------===// 2711 2712static TargetInfo *AllocateTarget(const std::string &T) { 2713 llvm::Triple Triple(T); 2714 llvm::Triple::OSType os = Triple.getOS(); 2715 2716 switch (Triple.getArch()) { 2717 default: 2718 return NULL; 2719 2720 case llvm::Triple::arm: 2721 case llvm::Triple::thumb: 2722 if (Triple.isOSDarwin()) 2723 return new DarwinARMTargetInfo(T); 2724 2725 switch (os) { 2726 case llvm::Triple::Linux: 2727 return new LinuxTargetInfo<ARMTargetInfo>(T); 2728 case llvm::Triple::FreeBSD: 2729 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 2730 default: 2731 return new ARMTargetInfo(T); 2732 } 2733 2734 case llvm::Triple::bfin: 2735 return new BlackfinTargetInfo(T); 2736 2737 case llvm::Triple::msp430: 2738 return new MSP430TargetInfo(T); 2739 2740 case llvm::Triple::mips: 2741 if (os == llvm::Triple::Psp) 2742 return new PSPTargetInfo<MipsTargetInfo>(T); 2743 if (os == llvm::Triple::Linux) 2744 return new LinuxTargetInfo<MipsTargetInfo>(T); 2745 return new MipsTargetInfo(T); 2746 2747 case llvm::Triple::mipsel: 2748 if (os == llvm::Triple::Psp) 2749 return new PSPTargetInfo<MipselTargetInfo>(T); 2750 if (os == llvm::Triple::Linux) 2751 return new LinuxTargetInfo<MipselTargetInfo>(T); 2752 return new MipselTargetInfo(T); 2753 2754 case llvm::Triple::ppc: 2755 if (Triple.isOSDarwin()) 2756 return new DarwinPPC32TargetInfo(T); 2757 else if (os == llvm::Triple::FreeBSD) 2758 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 2759 return new PPC32TargetInfo(T); 2760 2761 case llvm::Triple::ppc64: 2762 if (Triple.isOSDarwin()) 2763 return new DarwinPPC64TargetInfo(T); 2764 else if (os == llvm::Triple::Lv2) 2765 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 2766 else if (os == llvm::Triple::FreeBSD) 2767 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 2768 return new PPC64TargetInfo(T); 2769 2770 case llvm::Triple::ptx32: 2771 return new PTX32TargetInfo(T); 2772 case llvm::Triple::ptx64: 2773 return new PTX64TargetInfo(T); 2774 2775 case llvm::Triple::mblaze: 2776 return new MBlazeTargetInfo(T); 2777 2778 case llvm::Triple::sparc: 2779 if (os == llvm::Triple::AuroraUX) 2780 return new AuroraUXSparcV8TargetInfo(T); 2781 if (os == llvm::Triple::Solaris) 2782 return new SolarisSparcV8TargetInfo(T); 2783 return new SparcV8TargetInfo(T); 2784 2785 // FIXME: Need a real SPU target. 2786 case llvm::Triple::cellspu: 2787 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 2788 2789 case llvm::Triple::systemz: 2790 return new SystemZTargetInfo(T); 2791 2792 case llvm::Triple::tce: 2793 return new TCETargetInfo(T); 2794 2795 case llvm::Triple::x86: 2796 if (Triple.isOSDarwin()) 2797 return new DarwinI386TargetInfo(T); 2798 2799 switch (os) { 2800 case llvm::Triple::AuroraUX: 2801 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 2802 case llvm::Triple::Linux: 2803 return new LinuxTargetInfo<X86_32TargetInfo>(T); 2804 case llvm::Triple::DragonFly: 2805 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 2806 case llvm::Triple::NetBSD: 2807 return new NetBSDTargetInfo<X86_32TargetInfo>(T); 2808 case llvm::Triple::OpenBSD: 2809 return new OpenBSDI386TargetInfo(T); 2810 case llvm::Triple::FreeBSD: 2811 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 2812 case llvm::Triple::Minix: 2813 return new MinixTargetInfo<X86_32TargetInfo>(T); 2814 case llvm::Triple::Solaris: 2815 return new SolarisTargetInfo<X86_32TargetInfo>(T); 2816 case llvm::Triple::Cygwin: 2817 return new CygwinX86_32TargetInfo(T); 2818 case llvm::Triple::MinGW32: 2819 return new MinGWX86_32TargetInfo(T); 2820 case llvm::Triple::Win32: 2821 return new VisualStudioWindowsX86_32TargetInfo(T); 2822 case llvm::Triple::Haiku: 2823 return new HaikuX86_32TargetInfo(T); 2824 default: 2825 return new X86_32TargetInfo(T); 2826 } 2827 2828 case llvm::Triple::x86_64: 2829 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 2830 return new DarwinX86_64TargetInfo(T); 2831 2832 switch (os) { 2833 case llvm::Triple::AuroraUX: 2834 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 2835 case llvm::Triple::Linux: 2836 return new LinuxTargetInfo<X86_64TargetInfo>(T); 2837 case llvm::Triple::DragonFly: 2838 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 2839 case llvm::Triple::NetBSD: 2840 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 2841 case llvm::Triple::OpenBSD: 2842 return new OpenBSDX86_64TargetInfo(T); 2843 case llvm::Triple::FreeBSD: 2844 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 2845 case llvm::Triple::Solaris: 2846 return new SolarisTargetInfo<X86_64TargetInfo>(T); 2847 case llvm::Triple::MinGW32: 2848 return new MinGWX86_64TargetInfo(T); 2849 case llvm::Triple::Win32: // This is what Triple.h supports now. 2850 return new VisualStudioWindowsX86_64TargetInfo(T); 2851 default: 2852 return new X86_64TargetInfo(T); 2853 } 2854 } 2855} 2856 2857/// CreateTargetInfo - Return the target info object for the specified target 2858/// triple. 2859TargetInfo *TargetInfo::CreateTargetInfo(Diagnostic &Diags, 2860 TargetOptions &Opts) { 2861 llvm::Triple Triple(Opts.Triple); 2862 2863 // Construct the target 2864 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 2865 if (!Target) { 2866 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 2867 return 0; 2868 } 2869 2870 // Set the target CPU if specified. 2871 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 2872 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 2873 return 0; 2874 } 2875 2876 // Set the target ABI if specified. 2877 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 2878 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 2879 return 0; 2880 } 2881 2882 // Set the target C++ ABI. 2883 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 2884 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 2885 return 0; 2886 } 2887 2888 // Compute the default target features, we need the target to handle this 2889 // because features may have dependencies on one another. 2890 llvm::StringMap<bool> Features; 2891 Target->getDefaultFeatures(Opts.CPU, Features); 2892 2893 // Apply the user specified deltas. 2894 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 2895 ie = Opts.Features.end(); it != ie; ++it) { 2896 const char *Name = it->c_str(); 2897 2898 // Apply the feature via the target. 2899 if ((Name[0] != '-' && Name[0] != '+') || 2900 !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) { 2901 Diags.Report(diag::err_target_invalid_feature) << Name; 2902 return 0; 2903 } 2904 } 2905 2906 // Add the features to the compile options. 2907 // 2908 // FIXME: If we are completely confident that we have the right set, we only 2909 // need to pass the minuses. 2910 Opts.Features.clear(); 2911 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 2912 ie = Features.end(); it != ie; ++it) 2913 Opts.Features.push_back(std::string(it->second ? "+" : "-") + it->first()); 2914 Target->HandleTargetFeatures(Opts.Features); 2915 2916 return Target.take(); 2917} 2918