Targets.cpp revision 148735ecc78fc58bea17d5cdd3225d484f350865
1//===--- Targets.cpp - Implement -arch option and targets -----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements construction of a TargetInfo object from a 11// target triple. 12// 13//===----------------------------------------------------------------------===// 14 15#include "clang/Basic/TargetInfo.h" 16#include "clang/Basic/Builtins.h" 17#include "clang/Basic/Diagnostic.h" 18#include "clang/Basic/LangOptions.h" 19#include "clang/Basic/MacroBuilder.h" 20#include "clang/Basic/TargetBuiltins.h" 21#include "clang/Basic/TargetOptions.h" 22#include "llvm/ADT/APFloat.h" 23#include "llvm/ADT/OwningPtr.h" 24#include "llvm/ADT/STLExtras.h" 25#include "llvm/ADT/StringRef.h" 26#include "llvm/ADT/StringSwitch.h" 27#include "llvm/ADT/Triple.h" 28#include "llvm/MC/MCSectionMachO.h" 29#include "llvm/Support/ErrorHandling.h" 30#include "llvm/Type.h" 31#include <algorithm> 32using namespace clang; 33 34//===----------------------------------------------------------------------===// 35// Common code shared among targets. 36//===----------------------------------------------------------------------===// 37 38/// DefineStd - Define a macro name and standard variants. For example if 39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40/// when in GNU mode. 41static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55} 56 57//===----------------------------------------------------------------------===// 58// Defines specific to certain operating systems. 59//===----------------------------------------------------------------------===// 60 61namespace { 62template<typename TgtInfo> 63class OSTargetInfo : public TgtInfo { 64protected: 65 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 66 MacroBuilder &Builder) const=0; 67public: 68 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 69 virtual void getTargetDefines(const LangOptions &Opts, 70 MacroBuilder &Builder) const { 71 TgtInfo::getTargetDefines(Opts, Builder); 72 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 73 } 74 75}; 76} // end anonymous namespace 77 78 79static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 80 const llvm::Triple &Triple, 81 StringRef &PlatformName, 82 VersionTuple &PlatformMinVersion) { 83 Builder.defineMacro("__APPLE_CC__", "5621"); 84 Builder.defineMacro("__APPLE__"); 85 Builder.defineMacro("__MACH__"); 86 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 87 88 if (!Opts.ObjCAutoRefCount) { 89 // __weak is always defined, for use in blocks and with objc pointers. 90 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 91 92 // Darwin defines __strong even in C mode (just to nothing). 93 if (Opts.getGC() != LangOptions::NonGC) 94 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 95 else 96 Builder.defineMacro("__strong", ""); 97 98 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 99 // allow this in C, since one might have block pointers in structs that 100 // are used in pure C code and in Objective-C ARC. 101 Builder.defineMacro("__unsafe_unretained", ""); 102 103 // The Objective-C bridged cast keywords are defined to nothing in non-ARC 104 // mode; then they become normal, C-style casts. 105 Builder.defineMacro("__bridge", ""); 106 Builder.defineMacro("__bridge_transfer", ""); 107 Builder.defineMacro("__bridge_retained", ""); 108 Builder.defineMacro("__bridge_retain", ""); 109 } 110 111 if (Opts.Static) 112 Builder.defineMacro("__STATIC__"); 113 else 114 Builder.defineMacro("__DYNAMIC__"); 115 116 if (Opts.POSIXThreads) 117 Builder.defineMacro("_REENTRANT"); 118 119 // Get the platform type and version number from the triple. 120 unsigned Maj, Min, Rev; 121 122 // If no version was given, default to to 10.4.0, for simplifying tests. 123 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") { 124 PlatformName = "macosx"; 125 Min = Rev = 0; 126 Maj = 8; 127 } else { 128 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]", 129 // "-osxNNN", and "-iosNNN"). 130 131 if (Triple.getOS() == llvm::Triple::Darwin) { 132 // For historical reasons that make little sense, the version passed here 133 // is the "darwin" version, which drops the 10 and offsets by 4. 134 Triple.getOSVersion(Maj, Min, Rev); 135 136 if (Triple.getEnvironmentName() == "iphoneos") { 137 PlatformName = "ios"; 138 } else { 139 PlatformName = "macosx"; 140 Rev = Min; 141 Min = Maj - 4; 142 Maj = 10; 143 } 144 } else { 145 Triple.getOSVersion(Maj, Min, Rev); 146 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 147 } 148 } 149 150 // If -ccc-host-triple arch-pc-win32-macho option specified, we're 151 // generating code for Win32 ABI. No need to emit 152 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 153 if (PlatformName == "win32") { 154 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 155 return; 156 } 157 158 // Set the appropriate OS version define. 159 if (PlatformName == "ios") { 160 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 161 char Str[6]; 162 Str[0] = '0' + Maj; 163 Str[1] = '0' + (Min / 10); 164 Str[2] = '0' + (Min % 10); 165 Str[3] = '0' + (Rev / 10); 166 Str[4] = '0' + (Rev % 10); 167 Str[5] = '\0'; 168 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 169 } else { 170 // Note that the Driver allows versions which aren't representable in the 171 // define (because we only get a single digit for the minor and micro 172 // revision numbers). So, we limit them to the maximum representable 173 // version. 174 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 175 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 176 char Str[5]; 177 Str[0] = '0' + (Maj / 10); 178 Str[1] = '0' + (Maj % 10); 179 Str[2] = '0' + std::min(Min, 9U); 180 Str[3] = '0' + std::min(Rev, 9U); 181 Str[4] = '\0'; 182 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 183 } 184 185 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 186} 187 188namespace { 189template<typename Target> 190class DarwinTargetInfo : public OSTargetInfo<Target> { 191protected: 192 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 193 MacroBuilder &Builder) const { 194 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 195 this->PlatformMinVersion); 196 } 197 198public: 199 DarwinTargetInfo(const std::string& triple) : 200 OSTargetInfo<Target>(triple) { 201 llvm::Triple T = llvm::Triple(triple); 202 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 203 this->MCountName = "\01mcount"; 204 } 205 206 virtual std::string isValidSectionSpecifier(StringRef SR) const { 207 // Let MCSectionMachO validate this. 208 StringRef Segment, Section; 209 unsigned TAA, StubSize; 210 bool HasTAA; 211 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 212 TAA, HasTAA, StubSize); 213 } 214 215 virtual const char *getStaticInitSectionSpecifier() const { 216 // FIXME: We should return 0 when building kexts. 217 return "__TEXT,__StaticInit,regular,pure_instructions"; 218 } 219 220}; 221 222 223// DragonFlyBSD Target 224template<typename Target> 225class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 226protected: 227 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 228 MacroBuilder &Builder) const { 229 // DragonFly defines; list based off of gcc output 230 Builder.defineMacro("__DragonFly__"); 231 Builder.defineMacro("__DragonFly_cc_version", "100001"); 232 Builder.defineMacro("__ELF__"); 233 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 234 Builder.defineMacro("__tune_i386__"); 235 DefineStd(Builder, "unix", Opts); 236 } 237public: 238 DragonFlyBSDTargetInfo(const std::string &triple) 239 : OSTargetInfo<Target>(triple) {} 240}; 241 242// FreeBSD Target 243template<typename Target> 244class FreeBSDTargetInfo : public OSTargetInfo<Target> { 245protected: 246 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 247 MacroBuilder &Builder) const { 248 // FreeBSD defines; list based off of gcc output 249 250 unsigned Release = Triple.getOSMajorVersion(); 251 if (Release == 0U) 252 Release = 8; 253 254 Builder.defineMacro("__FreeBSD__", Twine(Release)); 255 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U)); 256 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 257 DefineStd(Builder, "unix", Opts); 258 Builder.defineMacro("__ELF__"); 259 } 260public: 261 FreeBSDTargetInfo(const std::string &triple) 262 : OSTargetInfo<Target>(triple) { 263 this->UserLabelPrefix = ""; 264 265 llvm::Triple Triple(triple); 266 switch (Triple.getArch()) { 267 default: 268 case llvm::Triple::x86: 269 case llvm::Triple::x86_64: 270 this->MCountName = ".mcount"; 271 break; 272 case llvm::Triple::mips: 273 case llvm::Triple::mipsel: 274 case llvm::Triple::ppc: 275 case llvm::Triple::ppc64: 276 this->MCountName = "_mcount"; 277 break; 278 case llvm::Triple::arm: 279 this->MCountName = "__mcount"; 280 break; 281 } 282 283 } 284}; 285 286// Minix Target 287template<typename Target> 288class MinixTargetInfo : public OSTargetInfo<Target> { 289protected: 290 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 291 MacroBuilder &Builder) const { 292 // Minix defines 293 294 Builder.defineMacro("__minix", "3"); 295 Builder.defineMacro("_EM_WSIZE", "4"); 296 Builder.defineMacro("_EM_PSIZE", "4"); 297 Builder.defineMacro("_EM_SSIZE", "2"); 298 Builder.defineMacro("_EM_LSIZE", "4"); 299 Builder.defineMacro("_EM_FSIZE", "4"); 300 Builder.defineMacro("_EM_DSIZE", "8"); 301 DefineStd(Builder, "unix", Opts); 302 } 303public: 304 MinixTargetInfo(const std::string &triple) 305 : OSTargetInfo<Target>(triple) { 306 this->UserLabelPrefix = ""; 307 } 308}; 309 310// Linux target 311template<typename Target> 312class LinuxTargetInfo : public OSTargetInfo<Target> { 313protected: 314 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 315 MacroBuilder &Builder) const { 316 // Linux defines; list based off of gcc output 317 DefineStd(Builder, "unix", Opts); 318 DefineStd(Builder, "linux", Opts); 319 Builder.defineMacro("__gnu_linux__"); 320 Builder.defineMacro("__ELF__"); 321 if (Opts.POSIXThreads) 322 Builder.defineMacro("_REENTRANT"); 323 if (Opts.CPlusPlus) 324 Builder.defineMacro("_GNU_SOURCE"); 325 } 326public: 327 LinuxTargetInfo(const std::string& triple) 328 : OSTargetInfo<Target>(triple) { 329 this->UserLabelPrefix = ""; 330 this->WIntType = TargetInfo::UnsignedInt; 331 } 332 333 virtual const char *getStaticInitSectionSpecifier() const { 334 return ".text.startup"; 335 } 336}; 337 338// NetBSD Target 339template<typename Target> 340class NetBSDTargetInfo : public OSTargetInfo<Target> { 341protected: 342 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 343 MacroBuilder &Builder) const { 344 // NetBSD defines; list based off of gcc output 345 Builder.defineMacro("__NetBSD__"); 346 Builder.defineMacro("__unix__"); 347 Builder.defineMacro("__ELF__"); 348 if (Opts.POSIXThreads) 349 Builder.defineMacro("_POSIX_THREADS"); 350 } 351public: 352 NetBSDTargetInfo(const std::string &triple) 353 : OSTargetInfo<Target>(triple) { 354 this->UserLabelPrefix = ""; 355 } 356}; 357 358// OpenBSD Target 359template<typename Target> 360class OpenBSDTargetInfo : public OSTargetInfo<Target> { 361protected: 362 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 363 MacroBuilder &Builder) const { 364 // OpenBSD defines; list based off of gcc output 365 366 Builder.defineMacro("__OpenBSD__"); 367 DefineStd(Builder, "unix", Opts); 368 Builder.defineMacro("__ELF__"); 369 if (Opts.POSIXThreads) 370 Builder.defineMacro("_POSIX_THREADS"); 371 } 372public: 373 OpenBSDTargetInfo(const std::string &triple) 374 : OSTargetInfo<Target>(triple) {} 375}; 376 377// PSP Target 378template<typename Target> 379class PSPTargetInfo : public OSTargetInfo<Target> { 380protected: 381 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 382 MacroBuilder &Builder) const { 383 // PSP defines; list based on the output of the pspdev gcc toolchain. 384 Builder.defineMacro("PSP"); 385 Builder.defineMacro("_PSP"); 386 Builder.defineMacro("__psp__"); 387 Builder.defineMacro("__ELF__"); 388 } 389public: 390 PSPTargetInfo(const std::string& triple) 391 : OSTargetInfo<Target>(triple) { 392 this->UserLabelPrefix = ""; 393 } 394}; 395 396// PS3 PPU Target 397template<typename Target> 398class PS3PPUTargetInfo : public OSTargetInfo<Target> { 399protected: 400 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 401 MacroBuilder &Builder) const { 402 // PS3 PPU defines. 403 Builder.defineMacro("__PPC__"); 404 Builder.defineMacro("__PPU__"); 405 Builder.defineMacro("__CELLOS_LV2__"); 406 Builder.defineMacro("__ELF__"); 407 Builder.defineMacro("__LP32__"); 408 Builder.defineMacro("_ARCH_PPC64"); 409 Builder.defineMacro("__powerpc64__"); 410 } 411public: 412 PS3PPUTargetInfo(const std::string& triple) 413 : OSTargetInfo<Target>(triple) { 414 this->UserLabelPrefix = ""; 415 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32; 416 this->IntMaxType = TargetInfo::SignedLongLong; 417 this->UIntMaxType = TargetInfo::UnsignedLongLong; 418 this->Int64Type = TargetInfo::SignedLongLong; 419 this->SizeType = TargetInfo::UnsignedInt; 420 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 421 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 422 } 423}; 424 425// FIXME: Need a real SPU target. 426// PS3 SPU Target 427template<typename Target> 428class PS3SPUTargetInfo : public OSTargetInfo<Target> { 429protected: 430 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 431 MacroBuilder &Builder) const { 432 // PS3 PPU defines. 433 Builder.defineMacro("__SPU__"); 434 Builder.defineMacro("__ELF__"); 435 } 436public: 437 PS3SPUTargetInfo(const std::string& triple) 438 : OSTargetInfo<Target>(triple) { 439 this->UserLabelPrefix = ""; 440 } 441}; 442 443// AuroraUX target 444template<typename Target> 445class AuroraUXTargetInfo : public OSTargetInfo<Target> { 446protected: 447 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 448 MacroBuilder &Builder) const { 449 DefineStd(Builder, "sun", Opts); 450 DefineStd(Builder, "unix", Opts); 451 Builder.defineMacro("__ELF__"); 452 Builder.defineMacro("__svr4__"); 453 Builder.defineMacro("__SVR4"); 454 } 455public: 456 AuroraUXTargetInfo(const std::string& triple) 457 : OSTargetInfo<Target>(triple) { 458 this->UserLabelPrefix = ""; 459 this->WCharType = this->SignedLong; 460 // FIXME: WIntType should be SignedLong 461 } 462}; 463 464// Solaris target 465template<typename Target> 466class SolarisTargetInfo : public OSTargetInfo<Target> { 467protected: 468 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 469 MacroBuilder &Builder) const { 470 DefineStd(Builder, "sun", Opts); 471 DefineStd(Builder, "unix", Opts); 472 Builder.defineMacro("__ELF__"); 473 Builder.defineMacro("__svr4__"); 474 Builder.defineMacro("__SVR4"); 475 } 476public: 477 SolarisTargetInfo(const std::string& triple) 478 : OSTargetInfo<Target>(triple) { 479 this->UserLabelPrefix = ""; 480 this->WCharType = this->SignedLong; 481 // FIXME: WIntType should be SignedLong 482 } 483}; 484 485// Windows target 486template<typename Target> 487class WindowsTargetInfo : public OSTargetInfo<Target> { 488protected: 489 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 490 MacroBuilder &Builder) const { 491 Builder.defineMacro("_WIN32"); 492 } 493 void getVisualStudioDefines(const LangOptions &Opts, 494 MacroBuilder &Builder) const { 495 if (Opts.CPlusPlus) { 496 if (Opts.RTTI) 497 Builder.defineMacro("_CPPRTTI"); 498 499 if (Opts.Exceptions) 500 Builder.defineMacro("_CPPUNWIND"); 501 } 502 503 if (!Opts.CharIsSigned) 504 Builder.defineMacro("_CHAR_UNSIGNED"); 505 506 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 507 // but it works for now. 508 if (Opts.POSIXThreads) 509 Builder.defineMacro("_MT"); 510 511 if (Opts.MSCVersion != 0) 512 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 513 514 if (Opts.MicrosoftExt) { 515 Builder.defineMacro("_MSC_EXTENSIONS"); 516 517 if (Opts.CPlusPlus0x) { 518 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 519 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 520 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 521 } 522 } 523 524 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 525 } 526 527public: 528 WindowsTargetInfo(const std::string &triple) 529 : OSTargetInfo<Target>(triple) {} 530}; 531 532} // end anonymous namespace. 533 534//===----------------------------------------------------------------------===// 535// Specific target implementations. 536//===----------------------------------------------------------------------===// 537 538namespace { 539// PPC abstract base class 540class PPCTargetInfo : public TargetInfo { 541 static const Builtin::Info BuiltinInfo[]; 542 static const char * const GCCRegNames[]; 543 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 544public: 545 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 546 547 virtual void getTargetBuiltins(const Builtin::Info *&Records, 548 unsigned &NumRecords) const { 549 Records = BuiltinInfo; 550 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 551 } 552 553 virtual void getTargetDefines(const LangOptions &Opts, 554 MacroBuilder &Builder) const; 555 556 virtual void getGCCRegNames(const char * const *&Names, 557 unsigned &NumNames) const; 558 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 559 unsigned &NumAliases) const; 560 virtual bool validateAsmConstraint(const char *&Name, 561 TargetInfo::ConstraintInfo &Info) const { 562 switch (*Name) { 563 default: return false; 564 case 'O': // Zero 565 break; 566 case 'b': // Base register 567 case 'f': // Floating point register 568 Info.setAllowsRegister(); 569 break; 570 // FIXME: The following are added to allow parsing. 571 // I just took a guess at what the actions should be. 572 // Also, is more specific checking needed? I.e. specific registers? 573 case 'd': // Floating point register (containing 64-bit value) 574 case 'v': // Altivec vector register 575 Info.setAllowsRegister(); 576 break; 577 case 'w': 578 switch (Name[1]) { 579 case 'd':// VSX vector register to hold vector double data 580 case 'f':// VSX vector register to hold vector float data 581 case 's':// VSX vector register to hold scalar float data 582 case 'a':// Any VSX register 583 break; 584 default: 585 return false; 586 } 587 Info.setAllowsRegister(); 588 Name++; // Skip over 'w'. 589 break; 590 case 'h': // `MQ', `CTR', or `LINK' register 591 case 'q': // `MQ' register 592 case 'c': // `CTR' register 593 case 'l': // `LINK' register 594 case 'x': // `CR' register (condition register) number 0 595 case 'y': // `CR' register (condition register) 596 case 'z': // `XER[CA]' carry bit (part of the XER register) 597 Info.setAllowsRegister(); 598 break; 599 case 'I': // Signed 16-bit constant 600 case 'J': // Unsigned 16-bit constant shifted left 16 bits 601 // (use `L' instead for SImode constants) 602 case 'K': // Unsigned 16-bit constant 603 case 'L': // Signed 16-bit constant shifted left 16 bits 604 case 'M': // Constant larger than 31 605 case 'N': // Exact power of 2 606 case 'P': // Constant whose negation is a signed 16-bit constant 607 case 'G': // Floating point constant that can be loaded into a 608 // register with one instruction per word 609 case 'H': // Integer/Floating point constant that can be loaded 610 // into a register using three instructions 611 break; 612 case 'm': // Memory operand. Note that on PowerPC targets, m can 613 // include addresses that update the base register. It 614 // is therefore only safe to use `m' in an asm statement 615 // if that asm statement accesses the operand exactly once. 616 // The asm statement must also use `%U<opno>' as a 617 // placeholder for the "update" flag in the corresponding 618 // load or store instruction. For example: 619 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 620 // is correct but: 621 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 622 // is not. Use es rather than m if you don't want the base 623 // register to be updated. 624 case 'e': 625 if (Name[1] != 's') 626 return false; 627 // es: A "stable" memory operand; that is, one which does not 628 // include any automodification of the base register. Unlike 629 // `m', this constraint can be used in asm statements that 630 // might access the operand several times, or that might not 631 // access it at all. 632 Info.setAllowsMemory(); 633 Name++; // Skip over 'e'. 634 break; 635 case 'Q': // Memory operand that is an offset from a register (it is 636 // usually better to use `m' or `es' in asm statements) 637 case 'Z': // Memory operand that is an indexed or indirect from a 638 // register (it is usually better to use `m' or `es' in 639 // asm statements) 640 Info.setAllowsMemory(); 641 Info.setAllowsRegister(); 642 break; 643 case 'R': // AIX TOC entry 644 case 'a': // Address operand that is an indexed or indirect from a 645 // register (`p' is preferable for asm statements) 646 case 'S': // Constant suitable as a 64-bit mask operand 647 case 'T': // Constant suitable as a 32-bit mask operand 648 case 'U': // System V Release 4 small data area reference 649 case 't': // AND masks that can be performed by two rldic{l, r} 650 // instructions 651 case 'W': // Vector constant that does not require memory 652 case 'j': // Vector constant that is all zeros. 653 break; 654 // End FIXME. 655 } 656 return true; 657 } 658 virtual const char *getClobbers() const { 659 return ""; 660 } 661}; 662 663const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 664#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 665#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 666 ALL_LANGUAGES }, 667#include "clang/Basic/BuiltinsPPC.def" 668}; 669 670 671/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 672/// #defines that are not tied to a specific subtarget. 673void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 674 MacroBuilder &Builder) const { 675 // Target identification. 676 Builder.defineMacro("__ppc__"); 677 Builder.defineMacro("_ARCH_PPC"); 678 Builder.defineMacro("__powerpc__"); 679 Builder.defineMacro("__POWERPC__"); 680 if (PointerWidth == 64) { 681 Builder.defineMacro("_ARCH_PPC64"); 682 Builder.defineMacro("_LP64"); 683 Builder.defineMacro("__LP64__"); 684 Builder.defineMacro("__powerpc64__"); 685 Builder.defineMacro("__ppc64__"); 686 } else { 687 Builder.defineMacro("__ppc__"); 688 } 689 690 // Target properties. 691 if (getTriple().getOS() != llvm::Triple::NetBSD) 692 Builder.defineMacro("_BIG_ENDIAN"); 693 Builder.defineMacro("__BIG_ENDIAN__"); 694 695 // Subtarget options. 696 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 697 Builder.defineMacro("__REGISTER_PREFIX__", ""); 698 699 // FIXME: Should be controlled by command line option. 700 Builder.defineMacro("__LONG_DOUBLE_128__"); 701 702 if (Opts.AltiVec) { 703 Builder.defineMacro("__VEC__", "10206"); 704 Builder.defineMacro("__ALTIVEC__"); 705 } 706} 707 708 709const char * const PPCTargetInfo::GCCRegNames[] = { 710 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 711 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 712 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 713 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 714 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 715 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 716 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 717 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 718 "mq", "lr", "ctr", "ap", 719 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 720 "xer", 721 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 722 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 723 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 724 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 725 "vrsave", "vscr", 726 "spe_acc", "spefscr", 727 "sfp" 728}; 729 730void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 731 unsigned &NumNames) const { 732 Names = GCCRegNames; 733 NumNames = llvm::array_lengthof(GCCRegNames); 734} 735 736const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 737 // While some of these aliases do map to different registers 738 // they still share the same register name. 739 { { "0" }, "r0" }, 740 { { "1"}, "r1" }, 741 { { "2" }, "r2" }, 742 { { "3" }, "r3" }, 743 { { "4" }, "r4" }, 744 { { "5" }, "r5" }, 745 { { "6" }, "r6" }, 746 { { "7" }, "r7" }, 747 { { "8" }, "r8" }, 748 { { "9" }, "r9" }, 749 { { "10" }, "r10" }, 750 { { "11" }, "r11" }, 751 { { "12" }, "r12" }, 752 { { "13" }, "r13" }, 753 { { "14" }, "r14" }, 754 { { "15" }, "r15" }, 755 { { "16" }, "r16" }, 756 { { "17" }, "r17" }, 757 { { "18" }, "r18" }, 758 { { "19" }, "r19" }, 759 { { "20" }, "r20" }, 760 { { "21" }, "r21" }, 761 { { "22" }, "r22" }, 762 { { "23" }, "r23" }, 763 { { "24" }, "r24" }, 764 { { "25" }, "r25" }, 765 { { "26" }, "r26" }, 766 { { "27" }, "r27" }, 767 { { "28" }, "r28" }, 768 { { "29" }, "r29" }, 769 { { "30" }, "r30" }, 770 { { "31" }, "r31" }, 771 { { "fr0" }, "f0" }, 772 { { "fr1" }, "f1" }, 773 { { "fr2" }, "f2" }, 774 { { "fr3" }, "f3" }, 775 { { "fr4" }, "f4" }, 776 { { "fr5" }, "f5" }, 777 { { "fr6" }, "f6" }, 778 { { "fr7" }, "f7" }, 779 { { "fr8" }, "f8" }, 780 { { "fr9" }, "f9" }, 781 { { "fr10" }, "f10" }, 782 { { "fr11" }, "f11" }, 783 { { "fr12" }, "f12" }, 784 { { "fr13" }, "f13" }, 785 { { "fr14" }, "f14" }, 786 { { "fr15" }, "f15" }, 787 { { "fr16" }, "f16" }, 788 { { "fr17" }, "f17" }, 789 { { "fr18" }, "f18" }, 790 { { "fr19" }, "f19" }, 791 { { "fr20" }, "f20" }, 792 { { "fr21" }, "f21" }, 793 { { "fr22" }, "f22" }, 794 { { "fr23" }, "f23" }, 795 { { "fr24" }, "f24" }, 796 { { "fr25" }, "f25" }, 797 { { "fr26" }, "f26" }, 798 { { "fr27" }, "f27" }, 799 { { "fr28" }, "f28" }, 800 { { "fr29" }, "f29" }, 801 { { "fr30" }, "f30" }, 802 { { "fr31" }, "f31" }, 803 { { "cc" }, "cr0" }, 804}; 805 806void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 807 unsigned &NumAliases) const { 808 Aliases = GCCRegAliases; 809 NumAliases = llvm::array_lengthof(GCCRegAliases); 810} 811} // end anonymous namespace. 812 813namespace { 814class PPC32TargetInfo : public PPCTargetInfo { 815public: 816 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 817 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 818 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 819 820 switch (getTriple().getOS()) { 821 case llvm::Triple::FreeBSD: 822 case llvm::Triple::NetBSD: 823 SizeType = UnsignedInt; 824 break; 825 default: 826 break; 827 } 828 } 829 830 virtual const char *getVAListDeclaration() const { 831 // This is the ELF definition, and is overridden by the Darwin sub-target 832 return "typedef struct __va_list_tag {" 833 " unsigned char gpr;" 834 " unsigned char fpr;" 835 " unsigned short reserved;" 836 " void* overflow_arg_area;" 837 " void* reg_save_area;" 838 "} __builtin_va_list[1];"; 839 } 840}; 841} // end anonymous namespace. 842 843namespace { 844class PPC64TargetInfo : public PPCTargetInfo { 845public: 846 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 847 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 848 IntMaxType = SignedLong; 849 UIntMaxType = UnsignedLong; 850 Int64Type = SignedLong; 851 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 852 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 853 } 854 virtual const char *getVAListDeclaration() const { 855 return "typedef char* __builtin_va_list;"; 856 } 857}; 858} // end anonymous namespace. 859 860 861namespace { 862class DarwinPPC32TargetInfo : 863 public DarwinTargetInfo<PPC32TargetInfo> { 864public: 865 DarwinPPC32TargetInfo(const std::string& triple) 866 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 867 HasAlignMac68kSupport = true; 868 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 869 } 870 virtual const char *getVAListDeclaration() const { 871 return "typedef char* __builtin_va_list;"; 872 } 873}; 874 875class DarwinPPC64TargetInfo : 876 public DarwinTargetInfo<PPC64TargetInfo> { 877public: 878 DarwinPPC64TargetInfo(const std::string& triple) 879 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 880 HasAlignMac68kSupport = true; 881 } 882}; 883} // end anonymous namespace. 884 885namespace { 886 static const unsigned PTXAddrSpaceMap[] = { 887 0, // opencl_global 888 4, // opencl_local 889 1 // opencl_constant 890 }; 891 class PTXTargetInfo : public TargetInfo { 892 static const char * const GCCRegNames[]; 893 static const Builtin::Info BuiltinInfo[]; 894 std::vector<llvm::StringRef> AvailableFeatures; 895 public: 896 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 897 TLSSupported = false; 898 LongWidth = LongAlign = 64; 899 AddrSpaceMap = &PTXAddrSpaceMap; 900 // Define available target features 901 // These must be defined in sorted order! 902 AvailableFeatures.push_back("compute10"); 903 AvailableFeatures.push_back("compute11"); 904 AvailableFeatures.push_back("compute12"); 905 AvailableFeatures.push_back("compute13"); 906 AvailableFeatures.push_back("compute20"); 907 AvailableFeatures.push_back("double"); 908 AvailableFeatures.push_back("no-fma"); 909 AvailableFeatures.push_back("ptx20"); 910 AvailableFeatures.push_back("ptx21"); 911 AvailableFeatures.push_back("ptx22"); 912 AvailableFeatures.push_back("ptx23"); 913 AvailableFeatures.push_back("sm10"); 914 AvailableFeatures.push_back("sm11"); 915 AvailableFeatures.push_back("sm12"); 916 AvailableFeatures.push_back("sm13"); 917 AvailableFeatures.push_back("sm20"); 918 AvailableFeatures.push_back("sm21"); 919 AvailableFeatures.push_back("sm22"); 920 AvailableFeatures.push_back("sm23"); 921 } 922 virtual void getTargetDefines(const LangOptions &Opts, 923 MacroBuilder &Builder) const { 924 Builder.defineMacro("__PTX__"); 925 } 926 virtual void getTargetBuiltins(const Builtin::Info *&Records, 927 unsigned &NumRecords) const { 928 Records = BuiltinInfo; 929 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 930 } 931 932 virtual void getGCCRegNames(const char * const *&Names, 933 unsigned &NumNames) const; 934 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 935 unsigned &NumAliases) const { 936 // No aliases. 937 Aliases = 0; 938 NumAliases = 0; 939 } 940 virtual bool validateAsmConstraint(const char *&Name, 941 TargetInfo::ConstraintInfo &info) const { 942 // FIXME: implement 943 return true; 944 } 945 virtual const char *getClobbers() const { 946 // FIXME: Is this really right? 947 return ""; 948 } 949 virtual const char *getVAListDeclaration() const { 950 // FIXME: implement 951 return "typedef char* __builtin_va_list;"; 952 } 953 954 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 955 const std::string &Name, 956 bool Enabled) const; 957 }; 958 959 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 960#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 961#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 962 ALL_LANGUAGES }, 963#include "clang/Basic/BuiltinsPTX.def" 964 }; 965 966 const char * const PTXTargetInfo::GCCRegNames[] = { 967 "r0" 968 }; 969 970 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 971 unsigned &NumNames) const { 972 Names = GCCRegNames; 973 NumNames = llvm::array_lengthof(GCCRegNames); 974 } 975 976 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 977 const std::string &Name, 978 bool Enabled) const { 979 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 980 Name)) { 981 Features[Name] = Enabled; 982 return true; 983 } else { 984 return false; 985 } 986 } 987 988 class PTX32TargetInfo : public PTXTargetInfo { 989 public: 990 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 991 PointerWidth = PointerAlign = 32; 992 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 993 DescriptionString 994 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 995 } 996 }; 997 998 class PTX64TargetInfo : public PTXTargetInfo { 999 public: 1000 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1001 PointerWidth = PointerAlign = 64; 1002 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1003 DescriptionString 1004 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 1005 } 1006 }; 1007} 1008 1009namespace { 1010// MBlaze abstract base class 1011class MBlazeTargetInfo : public TargetInfo { 1012 static const char * const GCCRegNames[]; 1013 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1014 1015public: 1016 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1017 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1018 } 1019 1020 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1021 unsigned &NumRecords) const { 1022 // FIXME: Implement. 1023 Records = 0; 1024 NumRecords = 0; 1025 } 1026 1027 virtual void getTargetDefines(const LangOptions &Opts, 1028 MacroBuilder &Builder) const; 1029 1030 virtual const char *getVAListDeclaration() const { 1031 return "typedef char* __builtin_va_list;"; 1032 } 1033 virtual const char *getTargetPrefix() const { 1034 return "mblaze"; 1035 } 1036 virtual void getGCCRegNames(const char * const *&Names, 1037 unsigned &NumNames) const; 1038 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1039 unsigned &NumAliases) const; 1040 virtual bool validateAsmConstraint(const char *&Name, 1041 TargetInfo::ConstraintInfo &Info) const { 1042 switch (*Name) { 1043 default: return false; 1044 case 'O': // Zero 1045 return true; 1046 case 'b': // Base register 1047 case 'f': // Floating point register 1048 Info.setAllowsRegister(); 1049 return true; 1050 } 1051 } 1052 virtual const char *getClobbers() const { 1053 return ""; 1054 } 1055}; 1056 1057/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1058/// #defines that are not tied to a specific subtarget. 1059void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1060 MacroBuilder &Builder) const { 1061 // Target identification. 1062 Builder.defineMacro("__microblaze__"); 1063 Builder.defineMacro("_ARCH_MICROBLAZE"); 1064 Builder.defineMacro("__MICROBLAZE__"); 1065 1066 // Target properties. 1067 Builder.defineMacro("_BIG_ENDIAN"); 1068 Builder.defineMacro("__BIG_ENDIAN__"); 1069 1070 // Subtarget options. 1071 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1072} 1073 1074 1075const char * const MBlazeTargetInfo::GCCRegNames[] = { 1076 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1077 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1078 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1079 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1080 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1081 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1082 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1083 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1084 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1085 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1086}; 1087 1088void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1089 unsigned &NumNames) const { 1090 Names = GCCRegNames; 1091 NumNames = llvm::array_lengthof(GCCRegNames); 1092} 1093 1094const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1095 { {"f0"}, "r0" }, 1096 { {"f1"}, "r1" }, 1097 { {"f2"}, "r2" }, 1098 { {"f3"}, "r3" }, 1099 { {"f4"}, "r4" }, 1100 { {"f5"}, "r5" }, 1101 { {"f6"}, "r6" }, 1102 { {"f7"}, "r7" }, 1103 { {"f8"}, "r8" }, 1104 { {"f9"}, "r9" }, 1105 { {"f10"}, "r10" }, 1106 { {"f11"}, "r11" }, 1107 { {"f12"}, "r12" }, 1108 { {"f13"}, "r13" }, 1109 { {"f14"}, "r14" }, 1110 { {"f15"}, "r15" }, 1111 { {"f16"}, "r16" }, 1112 { {"f17"}, "r17" }, 1113 { {"f18"}, "r18" }, 1114 { {"f19"}, "r19" }, 1115 { {"f20"}, "r20" }, 1116 { {"f21"}, "r21" }, 1117 { {"f22"}, "r22" }, 1118 { {"f23"}, "r23" }, 1119 { {"f24"}, "r24" }, 1120 { {"f25"}, "r25" }, 1121 { {"f26"}, "r26" }, 1122 { {"f27"}, "r27" }, 1123 { {"f28"}, "r28" }, 1124 { {"f29"}, "r29" }, 1125 { {"f30"}, "r30" }, 1126 { {"f31"}, "r31" }, 1127}; 1128 1129void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1130 unsigned &NumAliases) const { 1131 Aliases = GCCRegAliases; 1132 NumAliases = llvm::array_lengthof(GCCRegAliases); 1133} 1134} // end anonymous namespace. 1135 1136namespace { 1137// Namespace for x86 abstract base class 1138const Builtin::Info BuiltinInfo[] = { 1139#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1140#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1141 ALL_LANGUAGES }, 1142#include "clang/Basic/BuiltinsX86.def" 1143}; 1144 1145static const char* const GCCRegNames[] = { 1146 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1147 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1148 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1149 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1150 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1151 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1152 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1153}; 1154 1155const TargetInfo::AddlRegName AddlRegNames[] = { 1156 { { "al", "ah", "eax", "rax" }, 0 }, 1157 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1158 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1159 { { "dl", "dh", "edx", "rdx" }, 1 }, 1160 { { "esi", "rsi" }, 4 }, 1161 { { "edi", "rdi" }, 5 }, 1162 { { "esp", "rsp" }, 7 }, 1163 { { "ebp", "rbp" }, 6 }, 1164}; 1165 1166// X86 target abstract base class; x86-32 and x86-64 are very close, so 1167// most of the implementation can be shared. 1168class X86TargetInfo : public TargetInfo { 1169 enum X86SSEEnum { 1170 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 1171 } SSELevel; 1172 enum MMX3DNowEnum { 1173 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1174 } MMX3DNowLevel; 1175 1176 bool HasAES; 1177 bool HasAVX; 1178 1179 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1180 /// 1181 /// Each enumeration represents a particular CPU supported by Clang. These 1182 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1183 enum CPUKind { 1184 CK_Generic, 1185 1186 /// \name i386 1187 /// i386-generation processors. 1188 //@{ 1189 CK_i386, 1190 //@} 1191 1192 /// \name i486 1193 /// i486-generation processors. 1194 //@{ 1195 CK_i486, 1196 CK_WinChipC6, 1197 CK_WinChip2, 1198 CK_C3, 1199 //@} 1200 1201 /// \name i586 1202 /// i586-generation processors, P5 microarchitecture based. 1203 //@{ 1204 CK_i586, 1205 CK_Pentium, 1206 CK_PentiumMMX, 1207 //@} 1208 1209 /// \name i686 1210 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1211 //@{ 1212 CK_i686, 1213 CK_PentiumPro, 1214 CK_Pentium2, 1215 CK_Pentium3, 1216 CK_Pentium3M, 1217 CK_PentiumM, 1218 CK_C3_2, 1219 1220 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1221 /// Clang however has some logic to suport this. 1222 // FIXME: Warn, deprecate, and potentially remove this. 1223 CK_Yonah, 1224 //@} 1225 1226 /// \name Netburst 1227 /// Netburst microarchitecture based processors. 1228 //@{ 1229 CK_Pentium4, 1230 CK_Pentium4M, 1231 CK_Prescott, 1232 CK_Nocona, 1233 //@} 1234 1235 /// \name Core 1236 /// Core microarchitecture based processors. 1237 //@{ 1238 CK_Core2, 1239 1240 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1241 /// codename which GCC no longer accepts as an option to -march, but Clang 1242 /// has some logic for recognizing it. 1243 // FIXME: Warn, deprecate, and potentially remove this. 1244 CK_Penryn, 1245 //@} 1246 1247 /// \name Atom 1248 /// Atom processors 1249 //@{ 1250 CK_Atom, 1251 //@} 1252 1253 /// \name Nehalem 1254 /// Nehalem microarchitecture based processors. 1255 //@{ 1256 CK_Corei7, 1257 CK_Corei7AVX, 1258 CK_CoreAVXi, 1259 //@} 1260 1261 /// \name K6 1262 /// K6 architecture processors. 1263 //@{ 1264 CK_K6, 1265 CK_K6_2, 1266 CK_K6_3, 1267 //@} 1268 1269 /// \name K7 1270 /// K7 architecture processors. 1271 //@{ 1272 CK_Athlon, 1273 CK_AthlonThunderbird, 1274 CK_Athlon4, 1275 CK_AthlonXP, 1276 CK_AthlonMP, 1277 //@} 1278 1279 /// \name K8 1280 /// K8 architecture processors. 1281 //@{ 1282 CK_Athlon64, 1283 CK_Athlon64SSE3, 1284 CK_AthlonFX, 1285 CK_K8, 1286 CK_K8SSE3, 1287 CK_Opteron, 1288 CK_OpteronSSE3, 1289 CK_AMDFAM10, 1290 1291 /// This specification is deprecated and will be removed in the future. 1292 /// Users should prefer \see CK_K8. 1293 // FIXME: Warn on this when the CPU is set to it. 1294 CK_x86_64, 1295 //@} 1296 1297 /// \name Geode 1298 /// Geode processors. 1299 //@{ 1300 CK_Geode 1301 //@} 1302 } CPU; 1303 1304public: 1305 X86TargetInfo(const std::string& triple) 1306 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1307 HasAES(false), HasAVX(false), CPU(CK_Generic) { 1308 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1309 } 1310 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1311 unsigned &NumRecords) const { 1312 Records = BuiltinInfo; 1313 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1314 } 1315 virtual void getGCCRegNames(const char * const *&Names, 1316 unsigned &NumNames) const { 1317 Names = GCCRegNames; 1318 NumNames = llvm::array_lengthof(GCCRegNames); 1319 } 1320 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1321 unsigned &NumAliases) const { 1322 Aliases = 0; 1323 NumAliases = 0; 1324 } 1325 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1326 unsigned &NumNames) const { 1327 Names = AddlRegNames; 1328 NumNames = llvm::array_lengthof(AddlRegNames); 1329 } 1330 virtual bool validateAsmConstraint(const char *&Name, 1331 TargetInfo::ConstraintInfo &info) const; 1332 virtual std::string convertConstraint(const char *&Constraint) const; 1333 virtual const char *getClobbers() const { 1334 return "~{dirflag},~{fpsr},~{flags}"; 1335 } 1336 virtual void getTargetDefines(const LangOptions &Opts, 1337 MacroBuilder &Builder) const; 1338 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1339 const std::string &Name, 1340 bool Enabled) const; 1341 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1342 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1343 virtual const char* getABI() const { 1344 return MMX3DNowLevel == NoMMX3DNow ? "no-mmx" : ""; 1345 } 1346 virtual bool setCPU(const std::string &Name) { 1347 CPU = llvm::StringSwitch<CPUKind>(Name) 1348 .Case("i386", CK_i386) 1349 .Case("i486", CK_i486) 1350 .Case("winchip-c6", CK_WinChipC6) 1351 .Case("winchip2", CK_WinChip2) 1352 .Case("c3", CK_C3) 1353 .Case("i586", CK_i586) 1354 .Case("pentium", CK_Pentium) 1355 .Case("pentium-mmx", CK_PentiumMMX) 1356 .Case("i686", CK_i686) 1357 .Case("pentiumpro", CK_PentiumPro) 1358 .Case("pentium2", CK_Pentium2) 1359 .Case("pentium3", CK_Pentium3) 1360 .Case("pentium3m", CK_Pentium3M) 1361 .Case("pentium-m", CK_PentiumM) 1362 .Case("c3-2", CK_C3_2) 1363 .Case("yonah", CK_Yonah) 1364 .Case("pentium4", CK_Pentium4) 1365 .Case("pentium4m", CK_Pentium4M) 1366 .Case("prescott", CK_Prescott) 1367 .Case("nocona", CK_Nocona) 1368 .Case("core2", CK_Core2) 1369 .Case("penryn", CK_Penryn) 1370 .Case("atom", CK_Atom) 1371 .Case("corei7", CK_Corei7) 1372 .Case("corei7-avx", CK_Corei7AVX) 1373 .Case("core-avx-i", CK_CoreAVXi) 1374 .Case("k6", CK_K6) 1375 .Case("k6-2", CK_K6_2) 1376 .Case("k6-3", CK_K6_3) 1377 .Case("athlon", CK_Athlon) 1378 .Case("athlon-tbird", CK_AthlonThunderbird) 1379 .Case("athlon-4", CK_Athlon4) 1380 .Case("athlon-xp", CK_AthlonXP) 1381 .Case("athlon-mp", CK_AthlonMP) 1382 .Case("athlon64", CK_Athlon64) 1383 .Case("athlon64-sse3", CK_Athlon64SSE3) 1384 .Case("athlon-fx", CK_AthlonFX) 1385 .Case("k8", CK_K8) 1386 .Case("k8-sse3", CK_K8SSE3) 1387 .Case("opteron", CK_Opteron) 1388 .Case("opteron-sse3", CK_OpteronSSE3) 1389 .Case("amdfam10", CK_AMDFAM10) 1390 .Case("x86-64", CK_x86_64) 1391 .Case("geode", CK_Geode) 1392 .Default(CK_Generic); 1393 1394 // Perform any per-CPU checks necessary to determine if this CPU is 1395 // acceptable. 1396 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1397 // invalid without explaining *why*. 1398 switch (CPU) { 1399 case CK_Generic: 1400 // No processor selected! 1401 return false; 1402 1403 case CK_i386: 1404 case CK_i486: 1405 case CK_WinChipC6: 1406 case CK_WinChip2: 1407 case CK_C3: 1408 case CK_i586: 1409 case CK_Pentium: 1410 case CK_PentiumMMX: 1411 case CK_i686: 1412 case CK_PentiumPro: 1413 case CK_Pentium2: 1414 case CK_Pentium3: 1415 case CK_Pentium3M: 1416 case CK_PentiumM: 1417 case CK_Yonah: 1418 case CK_C3_2: 1419 case CK_Pentium4: 1420 case CK_Pentium4M: 1421 case CK_Prescott: 1422 case CK_K6: 1423 case CK_K6_2: 1424 case CK_K6_3: 1425 case CK_Athlon: 1426 case CK_AthlonThunderbird: 1427 case CK_Athlon4: 1428 case CK_AthlonXP: 1429 case CK_AthlonMP: 1430 case CK_Geode: 1431 // Only accept certain architectures when compiling in 32-bit mode. 1432 if (PointerWidth != 32) 1433 return false; 1434 1435 // Fallthrough 1436 case CK_Nocona: 1437 case CK_Core2: 1438 case CK_Penryn: 1439 case CK_Atom: 1440 case CK_Corei7: 1441 case CK_Corei7AVX: 1442 case CK_CoreAVXi: 1443 case CK_Athlon64: 1444 case CK_Athlon64SSE3: 1445 case CK_AthlonFX: 1446 case CK_K8: 1447 case CK_K8SSE3: 1448 case CK_Opteron: 1449 case CK_OpteronSSE3: 1450 case CK_AMDFAM10: 1451 case CK_x86_64: 1452 return true; 1453 } 1454 llvm_unreachable("Unhandled CPU kind"); 1455 } 1456}; 1457 1458void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1459 // FIXME: This should not be here. 1460 Features["3dnow"] = false; 1461 Features["3dnowa"] = false; 1462 Features["mmx"] = false; 1463 Features["sse"] = false; 1464 Features["sse2"] = false; 1465 Features["sse3"] = false; 1466 Features["ssse3"] = false; 1467 Features["sse41"] = false; 1468 Features["sse42"] = false; 1469 Features["sse4a"] = false; 1470 Features["aes"] = false; 1471 Features["avx"] = false; 1472 1473 // FIXME: This *really* should not be here. 1474 1475 // X86_64 always has SSE2. 1476 if (PointerWidth == 64) 1477 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1478 1479 switch (CPU) { 1480 case CK_Generic: 1481 case CK_i386: 1482 case CK_i486: 1483 case CK_i586: 1484 case CK_Pentium: 1485 case CK_i686: 1486 case CK_PentiumPro: 1487 break; 1488 case CK_PentiumMMX: 1489 case CK_Pentium2: 1490 setFeatureEnabled(Features, "mmx", true); 1491 break; 1492 case CK_Pentium3: 1493 case CK_Pentium3M: 1494 setFeatureEnabled(Features, "mmx", true); 1495 setFeatureEnabled(Features, "sse", true); 1496 break; 1497 case CK_PentiumM: 1498 case CK_Pentium4: 1499 case CK_Pentium4M: 1500 case CK_x86_64: 1501 setFeatureEnabled(Features, "mmx", true); 1502 setFeatureEnabled(Features, "sse2", true); 1503 break; 1504 case CK_Yonah: 1505 case CK_Prescott: 1506 case CK_Nocona: 1507 setFeatureEnabled(Features, "mmx", true); 1508 setFeatureEnabled(Features, "sse3", true); 1509 break; 1510 case CK_Core2: 1511 setFeatureEnabled(Features, "mmx", true); 1512 setFeatureEnabled(Features, "ssse3", true); 1513 break; 1514 case CK_Penryn: 1515 setFeatureEnabled(Features, "mmx", true); 1516 setFeatureEnabled(Features, "sse4", true); 1517 Features["sse42"] = false; 1518 break; 1519 case CK_Atom: 1520 setFeatureEnabled(Features, "mmx", true); 1521 setFeatureEnabled(Features, "ssse3", true); 1522 break; 1523 case CK_Corei7: 1524 setFeatureEnabled(Features, "mmx", true); 1525 setFeatureEnabled(Features, "sse4", true); 1526 setFeatureEnabled(Features, "aes", true); 1527 break; 1528 case CK_Corei7AVX: 1529 case CK_CoreAVXi: 1530 setFeatureEnabled(Features, "mmx", true); 1531 setFeatureEnabled(Features, "sse4", true); 1532 setFeatureEnabled(Features, "aes", true); 1533 //setFeatureEnabled(Features, "avx", true); 1534 break; 1535 case CK_K6: 1536 case CK_WinChipC6: 1537 setFeatureEnabled(Features, "mmx", true); 1538 break; 1539 case CK_K6_2: 1540 case CK_K6_3: 1541 case CK_WinChip2: 1542 case CK_C3: 1543 setFeatureEnabled(Features, "3dnow", true); 1544 break; 1545 case CK_Athlon: 1546 case CK_AthlonThunderbird: 1547 case CK_Geode: 1548 setFeatureEnabled(Features, "3dnowa", true); 1549 break; 1550 case CK_Athlon4: 1551 case CK_AthlonXP: 1552 case CK_AthlonMP: 1553 setFeatureEnabled(Features, "sse", true); 1554 setFeatureEnabled(Features, "3dnowa", true); 1555 break; 1556 case CK_K8: 1557 case CK_Opteron: 1558 case CK_Athlon64: 1559 case CK_AthlonFX: 1560 setFeatureEnabled(Features, "sse2", true); 1561 setFeatureEnabled(Features, "3dnowa", true); 1562 break; 1563 case CK_K8SSE3: 1564 case CK_OpteronSSE3: 1565 case CK_Athlon64SSE3: 1566 setFeatureEnabled(Features, "sse3", true); 1567 setFeatureEnabled(Features, "3dnowa", true); 1568 break; 1569 case CK_AMDFAM10: 1570 setFeatureEnabled(Features, "sse3", true); 1571 setFeatureEnabled(Features, "sse4a", true); 1572 setFeatureEnabled(Features, "3dnowa", true); 1573 break; 1574 case CK_C3_2: 1575 setFeatureEnabled(Features, "mmx", true); 1576 setFeatureEnabled(Features, "sse", true); 1577 break; 1578 } 1579} 1580 1581bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1582 const std::string &Name, 1583 bool Enabled) const { 1584 // FIXME: This *really* should not be here. We need some way of translating 1585 // options into llvm subtarget features. 1586 if (!Features.count(Name) && 1587 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1588 return false; 1589 1590 if (Enabled) { 1591 if (Name == "mmx") 1592 Features["mmx"] = true; 1593 else if (Name == "sse") 1594 Features["sse"] = true; 1595 else if (Name == "sse2") 1596 Features["sse"] = Features["sse2"] = true; 1597 else if (Name == "sse3") 1598 Features["sse"] = Features["sse2"] = Features["sse3"] = true; 1599 else if (Name == "ssse3") 1600 Features["sse"] = Features["sse2"] = Features["sse3"] = 1601 Features["ssse3"] = true; 1602 else if (Name == "sse4" || Name == "sse4.2") 1603 Features["sse"] = Features["sse2"] = Features["sse3"] = 1604 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1605 else if (Name == "sse4.1") 1606 Features["sse"] = Features["sse2"] = Features["sse3"] = 1607 Features["ssse3"] = Features["sse41"] = true; 1608 else if (Name == "3dnow") 1609 Features["mmx"] = Features["3dnow"] = true; 1610 else if (Name == "3dnowa") 1611 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1612 else if (Name == "aes") 1613 Features["aes"] = true; 1614 else if (Name == "avx") 1615 Features["avx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1616 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1617 else if (Name == "sse4a") 1618 Features["sse4a"] = true; 1619 } else { 1620 if (Name == "mmx") 1621 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1622 else if (Name == "sse") 1623 Features["sse"] = Features["sse2"] = Features["sse3"] = 1624 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1625 else if (Name == "sse2") 1626 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1627 Features["sse41"] = Features["sse42"] = false; 1628 else if (Name == "sse3") 1629 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1630 Features["sse42"] = false; 1631 else if (Name == "ssse3") 1632 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1633 else if (Name == "sse4" || Name == "sse4.1") 1634 Features["sse41"] = Features["sse42"] = false; 1635 else if (Name == "sse4.2") 1636 Features["sse42"] = false; 1637 else if (Name == "3dnow") 1638 Features["3dnow"] = Features["3dnowa"] = false; 1639 else if (Name == "3dnowa") 1640 Features["3dnowa"] = false; 1641 else if (Name == "aes") 1642 Features["aes"] = false; 1643 else if (Name == "avx") 1644 Features["avx"] = false; 1645 else if (Name == "sse4a") 1646 Features["sse4a"] = false; 1647 } 1648 1649 return true; 1650} 1651 1652/// HandleTargetOptions - Perform initialization based on the user 1653/// configured set of features. 1654void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1655 // Remember the maximum enabled sselevel. 1656 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1657 // Ignore disabled features. 1658 if (Features[i][0] == '-') 1659 continue; 1660 1661 if (Features[i].substr(1) == "aes") { 1662 HasAES = true; 1663 continue; 1664 } 1665 1666 // FIXME: Not sure yet how to treat AVX in regard to SSE levels. 1667 // For now let it be enabled together with other SSE levels. 1668 if (Features[i].substr(1) == "avx") { 1669 HasAVX = true; 1670 continue; 1671 } 1672 1673 assert(Features[i][0] == '+' && "Invalid target feature!"); 1674 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1675 .Case("sse42", SSE42) 1676 .Case("sse41", SSE41) 1677 .Case("ssse3", SSSE3) 1678 .Case("sse3", SSE3) 1679 .Case("sse2", SSE2) 1680 .Case("sse", SSE1) 1681 .Default(NoSSE); 1682 SSELevel = std::max(SSELevel, Level); 1683 1684 MMX3DNowEnum ThreeDNowLevel = 1685 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1)) 1686 .Case("3dnowa", AMD3DNowAthlon) 1687 .Case("3dnow", AMD3DNow) 1688 .Case("mmx", MMX) 1689 .Default(NoMMX3DNow); 1690 1691 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1692 } 1693 1694 // Don't tell the backend if we're turning off mmx; it will end up disabling 1695 // SSE, which we don't want. 1696 std::vector<std::string>::iterator it; 1697 it = std::find(Features.begin(), Features.end(), "-mmx"); 1698 if (it != Features.end()) 1699 Features.erase(it); 1700} 1701 1702/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1703/// definitions for this particular subtarget. 1704void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1705 MacroBuilder &Builder) const { 1706 // Target identification. 1707 if (PointerWidth == 64) { 1708 Builder.defineMacro("_LP64"); 1709 Builder.defineMacro("__LP64__"); 1710 Builder.defineMacro("__amd64__"); 1711 Builder.defineMacro("__amd64"); 1712 Builder.defineMacro("__x86_64"); 1713 Builder.defineMacro("__x86_64__"); 1714 } else { 1715 DefineStd(Builder, "i386", Opts); 1716 } 1717 1718 // Subtarget options. 1719 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 1720 // truly should be based on -mtune options. 1721 switch (CPU) { 1722 case CK_Generic: 1723 break; 1724 case CK_i386: 1725 // The rest are coming from the i386 define above. 1726 Builder.defineMacro("__tune_i386__"); 1727 break; 1728 case CK_i486: 1729 case CK_WinChipC6: 1730 case CK_WinChip2: 1731 case CK_C3: 1732 Builder.defineMacro("__i486"); 1733 Builder.defineMacro("__i486__"); 1734 Builder.defineMacro("__tune_i486__"); 1735 break; 1736 case CK_PentiumMMX: 1737 Builder.defineMacro("__pentium_mmx__"); 1738 Builder.defineMacro("__tune_pentium_mmx__"); 1739 // Fallthrough 1740 case CK_i586: 1741 case CK_Pentium: 1742 Builder.defineMacro("__i586"); 1743 Builder.defineMacro("__i586__"); 1744 Builder.defineMacro("__tune_i586__"); 1745 Builder.defineMacro("__pentium"); 1746 Builder.defineMacro("__pentium__"); 1747 Builder.defineMacro("__tune_pentium__"); 1748 break; 1749 case CK_Pentium3: 1750 case CK_Pentium3M: 1751 case CK_PentiumM: 1752 Builder.defineMacro("__tune_pentium3__"); 1753 // Fallthrough 1754 case CK_Pentium2: 1755 case CK_C3_2: 1756 Builder.defineMacro("__tune_pentium2__"); 1757 // Fallthrough 1758 case CK_PentiumPro: 1759 Builder.defineMacro("__tune_i686__"); 1760 Builder.defineMacro("__tune_pentiumpro__"); 1761 // Fallthrough 1762 case CK_i686: 1763 Builder.defineMacro("__i686"); 1764 Builder.defineMacro("__i686__"); 1765 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 1766 Builder.defineMacro("__pentiumpro"); 1767 Builder.defineMacro("__pentiumpro__"); 1768 break; 1769 case CK_Pentium4: 1770 case CK_Pentium4M: 1771 Builder.defineMacro("__pentium4"); 1772 Builder.defineMacro("__pentium4__"); 1773 Builder.defineMacro("__tune_pentium4__"); 1774 break; 1775 case CK_Yonah: 1776 case CK_Prescott: 1777 case CK_Nocona: 1778 Builder.defineMacro("__nocona"); 1779 Builder.defineMacro("__nocona__"); 1780 Builder.defineMacro("__tune_nocona__"); 1781 break; 1782 case CK_Core2: 1783 case CK_Penryn: 1784 Builder.defineMacro("__core2"); 1785 Builder.defineMacro("__core2__"); 1786 Builder.defineMacro("__tune_core2__"); 1787 break; 1788 case CK_Atom: 1789 Builder.defineMacro("__atom"); 1790 Builder.defineMacro("__atom__"); 1791 Builder.defineMacro("__tune_atom__"); 1792 break; 1793 case CK_Corei7: 1794 case CK_Corei7AVX: 1795 case CK_CoreAVXi: 1796 Builder.defineMacro("__corei7"); 1797 Builder.defineMacro("__corei7__"); 1798 Builder.defineMacro("__tune_corei7__"); 1799 break; 1800 case CK_K6_2: 1801 Builder.defineMacro("__k6_2__"); 1802 Builder.defineMacro("__tune_k6_2__"); 1803 // Fallthrough 1804 case CK_K6_3: 1805 if (CPU != CK_K6_2) { // In case of fallthrough 1806 // FIXME: GCC may be enabling these in cases where some other k6 1807 // architecture is specified but -m3dnow is explicitly provided. The 1808 // exact semantics need to be determined and emulated here. 1809 Builder.defineMacro("__k6_3__"); 1810 Builder.defineMacro("__tune_k6_3__"); 1811 } 1812 // Fallthrough 1813 case CK_K6: 1814 Builder.defineMacro("__k6"); 1815 Builder.defineMacro("__k6__"); 1816 Builder.defineMacro("__tune_k6__"); 1817 break; 1818 case CK_Athlon: 1819 case CK_AthlonThunderbird: 1820 case CK_Athlon4: 1821 case CK_AthlonXP: 1822 case CK_AthlonMP: 1823 Builder.defineMacro("__athlon"); 1824 Builder.defineMacro("__athlon__"); 1825 Builder.defineMacro("__tune_athlon__"); 1826 if (SSELevel != NoSSE) { 1827 Builder.defineMacro("__athlon_sse__"); 1828 Builder.defineMacro("__tune_athlon_sse__"); 1829 } 1830 break; 1831 case CK_K8: 1832 case CK_K8SSE3: 1833 case CK_x86_64: 1834 case CK_Opteron: 1835 case CK_OpteronSSE3: 1836 case CK_Athlon64: 1837 case CK_Athlon64SSE3: 1838 case CK_AthlonFX: 1839 Builder.defineMacro("__k8"); 1840 Builder.defineMacro("__k8__"); 1841 Builder.defineMacro("__tune_k8__"); 1842 break; 1843 case CK_AMDFAM10: 1844 Builder.defineMacro("__amdfam10"); 1845 Builder.defineMacro("__amdfam10__"); 1846 Builder.defineMacro("__tune_amdfam10__"); 1847 break; 1848 case CK_Geode: 1849 Builder.defineMacro("__geode"); 1850 Builder.defineMacro("__geode__"); 1851 Builder.defineMacro("__tune_geode__"); 1852 break; 1853 } 1854 1855 // Target properties. 1856 Builder.defineMacro("__LITTLE_ENDIAN__"); 1857 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1858 1859 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1860 // functions in glibc header files that use FP Stack inline asm which the 1861 // backend can't deal with (PR879). 1862 Builder.defineMacro("__NO_MATH_INLINES"); 1863 1864 if (HasAES) 1865 Builder.defineMacro("__AES__"); 1866 1867 if (HasAVX) 1868 Builder.defineMacro("__AVX__"); 1869 1870 // Each case falls through to the previous one here. 1871 switch (SSELevel) { 1872 case SSE42: 1873 Builder.defineMacro("__SSE4_2__"); 1874 case SSE41: 1875 Builder.defineMacro("__SSE4_1__"); 1876 case SSSE3: 1877 Builder.defineMacro("__SSSE3__"); 1878 case SSE3: 1879 Builder.defineMacro("__SSE3__"); 1880 case SSE2: 1881 Builder.defineMacro("__SSE2__"); 1882 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 1883 case SSE1: 1884 Builder.defineMacro("__SSE__"); 1885 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 1886 case NoSSE: 1887 break; 1888 } 1889 1890 if (Opts.MicrosoftExt && PointerWidth == 32) { 1891 switch (SSELevel) { 1892 case SSE42: 1893 case SSE41: 1894 case SSSE3: 1895 case SSE3: 1896 case SSE2: 1897 Builder.defineMacro("_M_IX86_FP", Twine(2)); 1898 break; 1899 case SSE1: 1900 Builder.defineMacro("_M_IX86_FP", Twine(1)); 1901 break; 1902 default: 1903 Builder.defineMacro("_M_IX86_FP", Twine(0)); 1904 } 1905 } 1906 1907 // Each case falls through to the previous one here. 1908 switch (MMX3DNowLevel) { 1909 case AMD3DNowAthlon: 1910 Builder.defineMacro("__3dNOW_A__"); 1911 case AMD3DNow: 1912 Builder.defineMacro("__3dNOW__"); 1913 case MMX: 1914 Builder.defineMacro("__MMX__"); 1915 case NoMMX3DNow: 1916 break; 1917 } 1918} 1919 1920 1921bool 1922X86TargetInfo::validateAsmConstraint(const char *&Name, 1923 TargetInfo::ConstraintInfo &Info) const { 1924 switch (*Name) { 1925 default: return false; 1926 case 'Y': // first letter of a pair: 1927 switch (*(Name+1)) { 1928 default: return false; 1929 case '0': // First SSE register. 1930 case 't': // Any SSE register, when SSE2 is enabled. 1931 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 1932 case 'm': // any MMX register, when inter-unit moves enabled. 1933 break; // falls through to setAllowsRegister. 1934 } 1935 case 'a': // eax. 1936 case 'b': // ebx. 1937 case 'c': // ecx. 1938 case 'd': // edx. 1939 case 'S': // esi. 1940 case 'D': // edi. 1941 case 'A': // edx:eax. 1942 case 'f': // any x87 floating point stack register. 1943 case 't': // top of floating point stack. 1944 case 'u': // second from top of floating point stack. 1945 case 'q': // Any register accessible as [r]l: a, b, c, and d. 1946 case 'y': // Any MMX register. 1947 case 'x': // Any SSE register. 1948 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 1949 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 1950 case 'l': // "Index" registers: any general register that can be used as an 1951 // index in a base+index memory access. 1952 Info.setAllowsRegister(); 1953 return true; 1954 case 'C': // SSE floating point constant. 1955 case 'G': // x87 floating point constant. 1956 case 'e': // 32-bit signed integer constant for use with zero-extending 1957 // x86_64 instructions. 1958 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 1959 // x86_64 instructions. 1960 return true; 1961 } 1962 return false; 1963} 1964 1965 1966std::string 1967X86TargetInfo::convertConstraint(const char *&Constraint) const { 1968 switch (*Constraint) { 1969 case 'a': return std::string("{ax}"); 1970 case 'b': return std::string("{bx}"); 1971 case 'c': return std::string("{cx}"); 1972 case 'd': return std::string("{dx}"); 1973 case 'S': return std::string("{si}"); 1974 case 'D': return std::string("{di}"); 1975 case 'p': // address 1976 return std::string("im"); 1977 case 't': // top of floating point stack. 1978 return std::string("{st}"); 1979 case 'u': // second from top of floating point stack. 1980 return std::string("{st(1)}"); // second from top of floating point stack. 1981 default: 1982 return std::string(1, *Constraint); 1983 } 1984} 1985} // end anonymous namespace 1986 1987namespace { 1988// X86-32 generic target 1989class X86_32TargetInfo : public X86TargetInfo { 1990public: 1991 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 1992 DoubleAlign = LongLongAlign = 32; 1993 LongDoubleWidth = 96; 1994 LongDoubleAlign = 32; 1995 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1996 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 1997 "a0:0:64-f80:32:32-n8:16:32-S128"; 1998 SizeType = UnsignedInt; 1999 PtrDiffType = SignedInt; 2000 IntPtrType = SignedInt; 2001 RegParmMax = 3; 2002 2003 // Use fpret for all types. 2004 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 2005 (1 << TargetInfo::Double) | 2006 (1 << TargetInfo::LongDouble)); 2007 2008 // x86-32 has atomics up to 8 bytes 2009 // FIXME: Check that we actually have cmpxchg8b before setting 2010 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) 2011 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 2012 } 2013 virtual const char *getVAListDeclaration() const { 2014 return "typedef char* __builtin_va_list;"; 2015 } 2016 2017 int getEHDataRegisterNumber(unsigned RegNo) const { 2018 if (RegNo == 0) return 0; 2019 if (RegNo == 1) return 2; 2020 return -1; 2021 } 2022}; 2023} // end anonymous namespace 2024 2025namespace { 2026class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2027public: 2028 OpenBSDI386TargetInfo(const std::string& triple) : 2029 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2030 SizeType = UnsignedLong; 2031 IntPtrType = SignedLong; 2032 PtrDiffType = SignedLong; 2033 } 2034}; 2035} // end anonymous namespace 2036 2037namespace { 2038class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2039public: 2040 DarwinI386TargetInfo(const std::string& triple) : 2041 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2042 LongDoubleWidth = 128; 2043 LongDoubleAlign = 128; 2044 SizeType = UnsignedLong; 2045 IntPtrType = SignedLong; 2046 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2047 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2048 "a0:0:64-f80:128:128-n8:16:32-S128"; 2049 HasAlignMac68kSupport = true; 2050 } 2051 2052}; 2053} // end anonymous namespace 2054 2055namespace { 2056// x86-32 Windows target 2057class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2058public: 2059 WindowsX86_32TargetInfo(const std::string& triple) 2060 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2061 TLSSupported = false; 2062 WCharType = UnsignedShort; 2063 DoubleAlign = LongLongAlign = 64; 2064 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2065 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2066 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2067 } 2068 virtual void getTargetDefines(const LangOptions &Opts, 2069 MacroBuilder &Builder) const { 2070 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2071 } 2072}; 2073} // end anonymous namespace 2074 2075namespace { 2076 2077// x86-32 Windows Visual Studio target 2078class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2079public: 2080 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2081 : WindowsX86_32TargetInfo(triple) { 2082 LongDoubleWidth = LongDoubleAlign = 64; 2083 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2084 } 2085 virtual void getTargetDefines(const LangOptions &Opts, 2086 MacroBuilder &Builder) const { 2087 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2088 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2089 // The value of the following reflects processor type. 2090 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2091 // We lost the original triple, so we use the default. 2092 Builder.defineMacro("_M_IX86", "600"); 2093 } 2094}; 2095} // end anonymous namespace 2096 2097namespace { 2098// x86-32 MinGW target 2099class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2100public: 2101 MinGWX86_32TargetInfo(const std::string& triple) 2102 : WindowsX86_32TargetInfo(triple) { 2103 } 2104 virtual void getTargetDefines(const LangOptions &Opts, 2105 MacroBuilder &Builder) const { 2106 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2107 DefineStd(Builder, "WIN32", Opts); 2108 DefineStd(Builder, "WINNT", Opts); 2109 Builder.defineMacro("_X86_"); 2110 Builder.defineMacro("__MSVCRT__"); 2111 Builder.defineMacro("__MINGW32__"); 2112 2113 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2114 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2115 if (Opts.MicrosoftExt) 2116 // Provide "as-is" __declspec. 2117 Builder.defineMacro("__declspec", "__declspec"); 2118 else 2119 // Provide alias of __attribute__ like mingw32-gcc. 2120 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2121 } 2122}; 2123} // end anonymous namespace 2124 2125namespace { 2126// x86-32 Cygwin target 2127class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2128public: 2129 CygwinX86_32TargetInfo(const std::string& triple) 2130 : X86_32TargetInfo(triple) { 2131 TLSSupported = false; 2132 WCharType = UnsignedShort; 2133 DoubleAlign = LongLongAlign = 64; 2134 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2135 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2136 "a0:0:64-f80:32:32-n8:16:32-S32"; 2137 } 2138 virtual void getTargetDefines(const LangOptions &Opts, 2139 MacroBuilder &Builder) const { 2140 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2141 Builder.defineMacro("__CYGWIN__"); 2142 Builder.defineMacro("__CYGWIN32__"); 2143 DefineStd(Builder, "unix", Opts); 2144 if (Opts.CPlusPlus) 2145 Builder.defineMacro("_GNU_SOURCE"); 2146 } 2147}; 2148} // end anonymous namespace 2149 2150namespace { 2151// x86-32 Haiku target 2152class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2153public: 2154 HaikuX86_32TargetInfo(const std::string& triple) 2155 : X86_32TargetInfo(triple) { 2156 SizeType = UnsignedLong; 2157 IntPtrType = SignedLong; 2158 PtrDiffType = SignedLong; 2159 this->UserLabelPrefix = ""; 2160 } 2161 virtual void getTargetDefines(const LangOptions &Opts, 2162 MacroBuilder &Builder) const { 2163 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2164 Builder.defineMacro("__INTEL__"); 2165 Builder.defineMacro("__HAIKU__"); 2166 } 2167}; 2168} // end anonymous namespace 2169 2170// RTEMS Target 2171template<typename Target> 2172class RTEMSTargetInfo : public OSTargetInfo<Target> { 2173protected: 2174 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2175 MacroBuilder &Builder) const { 2176 // RTEMS defines; list based off of gcc output 2177 2178 Builder.defineMacro("__rtems__"); 2179 Builder.defineMacro("__ELF__"); 2180 } 2181public: 2182 RTEMSTargetInfo(const std::string &triple) 2183 : OSTargetInfo<Target>(triple) { 2184 this->UserLabelPrefix = ""; 2185 2186 llvm::Triple Triple(triple); 2187 switch (Triple.getArch()) { 2188 default: 2189 case llvm::Triple::x86: 2190 // this->MCountName = ".mcount"; 2191 break; 2192 case llvm::Triple::mips: 2193 case llvm::Triple::mipsel: 2194 case llvm::Triple::ppc: 2195 case llvm::Triple::ppc64: 2196 // this->MCountName = "_mcount"; 2197 break; 2198 case llvm::Triple::arm: 2199 // this->MCountName = "__mcount"; 2200 break; 2201 } 2202 2203 } 2204}; 2205 2206namespace { 2207// x86-32 RTEMS target 2208class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2209public: 2210 RTEMSX86_32TargetInfo(const std::string& triple) 2211 : X86_32TargetInfo(triple) { 2212 SizeType = UnsignedLong; 2213 IntPtrType = SignedLong; 2214 PtrDiffType = SignedLong; 2215 this->UserLabelPrefix = ""; 2216 } 2217 virtual void getTargetDefines(const LangOptions &Opts, 2218 MacroBuilder &Builder) const { 2219 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2220 Builder.defineMacro("__INTEL__"); 2221 Builder.defineMacro("__rtems__"); 2222 } 2223}; 2224} // end anonymous namespace 2225 2226namespace { 2227// x86-64 generic target 2228class X86_64TargetInfo : public X86TargetInfo { 2229public: 2230 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2231 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2232 LongDoubleWidth = 128; 2233 LongDoubleAlign = 128; 2234 LargeArrayMinWidth = 128; 2235 LargeArrayAlign = 128; 2236 IntMaxType = SignedLong; 2237 UIntMaxType = UnsignedLong; 2238 Int64Type = SignedLong; 2239 RegParmMax = 6; 2240 2241 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2242 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2243 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2244 2245 // Use fpret only for long double. 2246 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2247 2248 // Use fp2ret for _Complex long double. 2249 ComplexLongDoubleUsesFP2Ret = true; 2250 2251 // x86-64 has atomics up to 16 bytes. 2252 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128 2253 // on CPUs with cmpxchg16b 2254 MaxAtomicPromoteWidth = 128; 2255 MaxAtomicInlineWidth = 64; 2256 } 2257 virtual const char *getVAListDeclaration() const { 2258 return "typedef struct __va_list_tag {" 2259 " unsigned gp_offset;" 2260 " unsigned fp_offset;" 2261 " void* overflow_arg_area;" 2262 " void* reg_save_area;" 2263 "} __va_list_tag;" 2264 "typedef __va_list_tag __builtin_va_list[1];"; 2265 } 2266 2267 int getEHDataRegisterNumber(unsigned RegNo) const { 2268 if (RegNo == 0) return 0; 2269 if (RegNo == 1) return 1; 2270 return -1; 2271 } 2272}; 2273} // end anonymous namespace 2274 2275namespace { 2276// x86-64 Windows target 2277class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2278public: 2279 WindowsX86_64TargetInfo(const std::string& triple) 2280 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2281 TLSSupported = false; 2282 WCharType = UnsignedShort; 2283 LongWidth = LongAlign = 32; 2284 DoubleAlign = LongLongAlign = 64; 2285 IntMaxType = SignedLongLong; 2286 UIntMaxType = UnsignedLongLong; 2287 Int64Type = SignedLongLong; 2288 SizeType = UnsignedLongLong; 2289 PtrDiffType = SignedLongLong; 2290 IntPtrType = SignedLongLong; 2291 this->UserLabelPrefix = ""; 2292 } 2293 virtual void getTargetDefines(const LangOptions &Opts, 2294 MacroBuilder &Builder) const { 2295 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2296 Builder.defineMacro("_WIN64"); 2297 } 2298 virtual const char *getVAListDeclaration() const { 2299 return "typedef char* __builtin_va_list;"; 2300 } 2301}; 2302} // end anonymous namespace 2303 2304namespace { 2305// x86-64 Windows Visual Studio target 2306class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2307public: 2308 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2309 : WindowsX86_64TargetInfo(triple) { 2310 LongDoubleWidth = LongDoubleAlign = 64; 2311 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2312 } 2313 virtual void getTargetDefines(const LangOptions &Opts, 2314 MacroBuilder &Builder) const { 2315 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2316 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2317 Builder.defineMacro("_M_X64"); 2318 Builder.defineMacro("_M_AMD64"); 2319 } 2320}; 2321} // end anonymous namespace 2322 2323namespace { 2324// x86-64 MinGW target 2325class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2326public: 2327 MinGWX86_64TargetInfo(const std::string& triple) 2328 : WindowsX86_64TargetInfo(triple) { 2329 } 2330 virtual void getTargetDefines(const LangOptions &Opts, 2331 MacroBuilder &Builder) const { 2332 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2333 DefineStd(Builder, "WIN64", Opts); 2334 Builder.defineMacro("__MSVCRT__"); 2335 Builder.defineMacro("__MINGW32__"); 2336 Builder.defineMacro("__MINGW64__"); 2337 2338 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2339 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2340 if (Opts.MicrosoftExt) 2341 // Provide "as-is" __declspec. 2342 Builder.defineMacro("__declspec", "__declspec"); 2343 else 2344 // Provide alias of __attribute__ like mingw32-gcc. 2345 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2346 } 2347}; 2348} // end anonymous namespace 2349 2350namespace { 2351class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2352public: 2353 DarwinX86_64TargetInfo(const std::string& triple) 2354 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2355 Int64Type = SignedLongLong; 2356 } 2357}; 2358} // end anonymous namespace 2359 2360namespace { 2361class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2362public: 2363 OpenBSDX86_64TargetInfo(const std::string& triple) 2364 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2365 IntMaxType = SignedLongLong; 2366 UIntMaxType = UnsignedLongLong; 2367 Int64Type = SignedLongLong; 2368 } 2369}; 2370} // end anonymous namespace 2371 2372namespace { 2373class ARMTargetInfo : public TargetInfo { 2374 // Possible FPU choices. 2375 enum FPUMode { 2376 NoFPU, 2377 VFP2FPU, 2378 VFP3FPU, 2379 NeonFPU 2380 }; 2381 2382 static bool FPUModeIsVFP(FPUMode Mode) { 2383 return Mode >= VFP2FPU && Mode <= NeonFPU; 2384 } 2385 2386 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2387 static const char * const GCCRegNames[]; 2388 2389 std::string ABI, CPU; 2390 2391 unsigned FPU : 3; 2392 2393 unsigned IsThumb : 1; 2394 2395 // Initialized via features. 2396 unsigned SoftFloat : 1; 2397 unsigned SoftFloatABI : 1; 2398 2399 static const Builtin::Info BuiltinInfo[]; 2400 2401public: 2402 ARMTargetInfo(const std::string &TripleStr) 2403 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2404 { 2405 SizeType = UnsignedInt; 2406 PtrDiffType = SignedInt; 2407 2408 // {} in inline assembly are neon specifiers, not assembly variant 2409 // specifiers. 2410 NoAsmVariants = true; 2411 2412 // FIXME: Should we just treat this as a feature? 2413 IsThumb = getTriple().getArchName().startswith("thumb"); 2414 if (IsThumb) { 2415 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2416 // so set preferred for small types to 32. 2417 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2418 "i64:64:64-f32:32:32-f64:64:64-" 2419 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2420 } else { 2421 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2422 "i64:64:64-f32:32:32-f64:64:64-" 2423 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2424 } 2425 2426 // ARM targets default to using the ARM C++ ABI. 2427 CXXABI = CXXABI_ARM; 2428 2429 // ARM has atomics up to 8 bytes 2430 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e 2431 MaxAtomicPromoteWidth = 64; 2432 } 2433 virtual const char *getABI() const { return ABI.c_str(); } 2434 virtual bool setABI(const std::string &Name) { 2435 ABI = Name; 2436 2437 // The defaults (above) are for AAPCS, check if we need to change them. 2438 // 2439 // FIXME: We need support for -meabi... we could just mangle it into the 2440 // name. 2441 if (Name == "apcs-gnu") { 2442 DoubleAlign = LongLongAlign = LongDoubleAlign = 32; 2443 SizeType = UnsignedLong; 2444 2445 // Do not respect the alignment of bit-field types when laying out 2446 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2447 UseBitFieldTypeAlignment = false; 2448 2449 /// Do force alignment of members that follow zero length bitfields. If 2450 /// the alignment of the zero-length bitfield is greater than the member 2451 /// that follows it, `bar', `bar' will be aligned as the type of the 2452 /// zero length bitfield. 2453 UseZeroLengthBitfieldAlignment = true; 2454 2455 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2456 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2457 /// gcc. 2458 ZeroLengthBitfieldBoundary = 32; 2459 2460 if (IsThumb) { 2461 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2462 // so set preferred for small types to 32. 2463 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2464 "i64:32:64-f32:32:32-f64:32:64-" 2465 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2466 } else { 2467 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2468 "i64:32:64-f32:32:32-f64:32:64-" 2469 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2470 } 2471 2472 // FIXME: Override "preferred align" for double and long long. 2473 } else if (Name == "aapcs") { 2474 // FIXME: Enumerated types are variable width in straight AAPCS. 2475 } else if (Name == "aapcs-linux") { 2476 ; 2477 } else 2478 return false; 2479 2480 return true; 2481 } 2482 2483 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2484 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2485 Features["vfp2"] = true; 2486 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2487 Features["neon"] = true; 2488 } 2489 2490 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2491 const std::string &Name, 2492 bool Enabled) const { 2493 if (Name == "soft-float" || Name == "soft-float-abi" || 2494 Name == "vfp2" || Name == "vfp3" || Name == "neon") { 2495 Features[Name] = Enabled; 2496 } else 2497 return false; 2498 2499 return true; 2500 } 2501 2502 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2503 FPU = NoFPU; 2504 SoftFloat = SoftFloatABI = false; 2505 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2506 if (Features[i] == "+soft-float") 2507 SoftFloat = true; 2508 else if (Features[i] == "+soft-float-abi") 2509 SoftFloatABI = true; 2510 else if (Features[i] == "+vfp2") 2511 FPU = VFP2FPU; 2512 else if (Features[i] == "+vfp3") 2513 FPU = VFP3FPU; 2514 else if (Features[i] == "+neon") 2515 FPU = NeonFPU; 2516 } 2517 2518 // Remove front-end specific options which the backend handles differently. 2519 std::vector<std::string>::iterator it; 2520 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2521 if (it != Features.end()) 2522 Features.erase(it); 2523 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2524 if (it != Features.end()) 2525 Features.erase(it); 2526 } 2527 2528 static const char *getCPUDefineSuffix(StringRef Name) { 2529 return llvm::StringSwitch<const char*>(Name) 2530 .Cases("arm8", "arm810", "4") 2531 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2532 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2533 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2534 .Case("ep9312", "4T") 2535 .Cases("arm10tdmi", "arm1020t", "5T") 2536 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2537 .Case("arm926ej-s", "5TEJ") 2538 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2539 .Cases("xscale", "iwmmxt", "5TE") 2540 .Case("arm1136j-s", "6J") 2541 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2542 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2543 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2544 .Cases("cortex-a8", "cortex-a9", "7A") 2545 .Case("cortex-m3", "7M") 2546 .Case("cortex-m0", "6M") 2547 .Default(0); 2548 } 2549 virtual bool setCPU(const std::string &Name) { 2550 if (!getCPUDefineSuffix(Name)) 2551 return false; 2552 2553 CPU = Name; 2554 return true; 2555 } 2556 virtual void getTargetDefines(const LangOptions &Opts, 2557 MacroBuilder &Builder) const { 2558 // Target identification. 2559 Builder.defineMacro("__arm"); 2560 Builder.defineMacro("__arm__"); 2561 2562 // Target properties. 2563 Builder.defineMacro("__ARMEL__"); 2564 Builder.defineMacro("__LITTLE_ENDIAN__"); 2565 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2566 2567 StringRef CPUArch = getCPUDefineSuffix(CPU); 2568 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2569 2570 // Subtarget options. 2571 2572 // FIXME: It's more complicated than this and we don't really support 2573 // interworking. 2574 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2575 Builder.defineMacro("__THUMB_INTERWORK__"); 2576 2577 if (ABI == "aapcs" || ABI == "aapcs-linux") 2578 Builder.defineMacro("__ARM_EABI__"); 2579 2580 if (SoftFloat) 2581 Builder.defineMacro("__SOFTFP__"); 2582 2583 if (CPU == "xscale") 2584 Builder.defineMacro("__XSCALE__"); 2585 2586 bool IsARMv7 = CPUArch.startswith("7"); 2587 if (IsThumb) { 2588 Builder.defineMacro("__THUMBEL__"); 2589 Builder.defineMacro("__thumb__"); 2590 if (CPUArch == "6T2" || IsARMv7) 2591 Builder.defineMacro("__thumb2__"); 2592 } 2593 2594 // Note, this is always on in gcc, even though it doesn't make sense. 2595 Builder.defineMacro("__APCS_32__"); 2596 2597 if (FPUModeIsVFP((FPUMode) FPU)) 2598 Builder.defineMacro("__VFP_FP__"); 2599 2600 // This only gets set when Neon instructions are actually available, unlike 2601 // the VFP define, hence the soft float and arch check. This is subtly 2602 // different from gcc, we follow the intent which was that it should be set 2603 // when Neon instructions are actually available. 2604 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2605 Builder.defineMacro("__ARM_NEON__"); 2606 } 2607 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2608 unsigned &NumRecords) const { 2609 Records = BuiltinInfo; 2610 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2611 } 2612 virtual const char *getVAListDeclaration() const { 2613 return "typedef void* __builtin_va_list;"; 2614 } 2615 virtual void getGCCRegNames(const char * const *&Names, 2616 unsigned &NumNames) const; 2617 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2618 unsigned &NumAliases) const; 2619 virtual bool validateAsmConstraint(const char *&Name, 2620 TargetInfo::ConstraintInfo &Info) const { 2621 // FIXME: Check if this is complete 2622 switch (*Name) { 2623 default: 2624 case 'l': // r0-r7 2625 case 'h': // r8-r15 2626 case 'w': // VFP Floating point register single precision 2627 case 'P': // VFP Floating point register double precision 2628 Info.setAllowsRegister(); 2629 return true; 2630 case 'Q': // A memory address that is a single base register. 2631 Info.setAllowsMemory(); 2632 return true; 2633 case 'U': // a memory reference... 2634 switch (Name[1]) { 2635 case 'q': // ...ARMV4 ldrsb 2636 case 'v': // ...VFP load/store (reg+constant offset) 2637 case 'y': // ...iWMMXt load/store 2638 case 't': // address valid for load/store opaque types wider 2639 // than 128-bits 2640 case 'n': // valid address for Neon doubleword vector load/store 2641 case 'm': // valid address for Neon element and structure load/store 2642 case 's': // valid address for non-offset loads/stores of quad-word 2643 // values in four ARM registers 2644 Info.setAllowsMemory(); 2645 Name++; 2646 return true; 2647 } 2648 } 2649 return false; 2650 } 2651 virtual std::string convertConstraint(const char *&Constraint) const { 2652 std::string R; 2653 switch (*Constraint) { 2654 case 'U': // Two-character constraint; add "^" hint for later parsing. 2655 R = std::string("^") + std::string(Constraint, 2); 2656 Constraint++; 2657 break; 2658 case 'p': // 'p' should be translated to 'r' by default. 2659 R = std::string("r"); 2660 break; 2661 default: 2662 return std::string(1, *Constraint); 2663 } 2664 return R; 2665 } 2666 virtual const char *getClobbers() const { 2667 // FIXME: Is this really right? 2668 return ""; 2669 } 2670}; 2671 2672const char * const ARMTargetInfo::GCCRegNames[] = { 2673 // Integer registers 2674 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2675 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2676 2677 // Float registers 2678 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2679 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2680 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2681 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2682 2683 // Double registers 2684 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2685 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2686 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2687 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2688 2689 // Quad registers 2690 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2691 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2692}; 2693 2694void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2695 unsigned &NumNames) const { 2696 Names = GCCRegNames; 2697 NumNames = llvm::array_lengthof(GCCRegNames); 2698} 2699 2700const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2701 { { "a1" }, "r0" }, 2702 { { "a2" }, "r1" }, 2703 { { "a3" }, "r2" }, 2704 { { "a4" }, "r3" }, 2705 { { "v1" }, "r4" }, 2706 { { "v2" }, "r5" }, 2707 { { "v3" }, "r6" }, 2708 { { "v4" }, "r7" }, 2709 { { "v5" }, "r8" }, 2710 { { "v6", "rfp" }, "r9" }, 2711 { { "sl" }, "r10" }, 2712 { { "fp" }, "r11" }, 2713 { { "ip" }, "r12" }, 2714 { { "r13" }, "sp" }, 2715 { { "r14" }, "lr" }, 2716 { { "r15" }, "pc" }, 2717 // The S, D and Q registers overlap, but aren't really aliases; we 2718 // don't want to substitute one of these for a different-sized one. 2719}; 2720 2721void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2722 unsigned &NumAliases) const { 2723 Aliases = GCCRegAliases; 2724 NumAliases = llvm::array_lengthof(GCCRegAliases); 2725} 2726 2727const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2728#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2729#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2730 ALL_LANGUAGES }, 2731#include "clang/Basic/BuiltinsARM.def" 2732}; 2733} // end anonymous namespace. 2734 2735 2736namespace { 2737class DarwinARMTargetInfo : 2738 public DarwinTargetInfo<ARMTargetInfo> { 2739protected: 2740 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2741 MacroBuilder &Builder) const { 2742 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2743 } 2744 2745public: 2746 DarwinARMTargetInfo(const std::string& triple) 2747 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2748 HasAlignMac68kSupport = true; 2749 // iOS always has 64-bit atomic instructions. 2750 // FIXME: This should be based off of the target features in ARMTargetInfo. 2751 MaxAtomicInlineWidth = 64; 2752 } 2753}; 2754} // end anonymous namespace. 2755 2756namespace { 2757class SparcV8TargetInfo : public TargetInfo { 2758 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2759 static const char * const GCCRegNames[]; 2760 bool SoftFloat; 2761public: 2762 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 2763 // FIXME: Support Sparc quad-precision long double? 2764 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2765 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2766 } 2767 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2768 const std::string &Name, 2769 bool Enabled) const { 2770 if (Name == "soft-float") 2771 Features[Name] = Enabled; 2772 else 2773 return false; 2774 2775 return true; 2776 } 2777 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2778 SoftFloat = false; 2779 for (unsigned i = 0, e = Features.size(); i != e; ++i) 2780 if (Features[i] == "+soft-float") 2781 SoftFloat = true; 2782 } 2783 virtual void getTargetDefines(const LangOptions &Opts, 2784 MacroBuilder &Builder) const { 2785 DefineStd(Builder, "sparc", Opts); 2786 Builder.defineMacro("__sparcv8"); 2787 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2788 2789 if (SoftFloat) 2790 Builder.defineMacro("SOFT_FLOAT", "1"); 2791 } 2792 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2793 unsigned &NumRecords) const { 2794 // FIXME: Implement! 2795 } 2796 virtual const char *getVAListDeclaration() const { 2797 return "typedef void* __builtin_va_list;"; 2798 } 2799 virtual void getGCCRegNames(const char * const *&Names, 2800 unsigned &NumNames) const; 2801 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2802 unsigned &NumAliases) const; 2803 virtual bool validateAsmConstraint(const char *&Name, 2804 TargetInfo::ConstraintInfo &info) const { 2805 // FIXME: Implement! 2806 return false; 2807 } 2808 virtual const char *getClobbers() const { 2809 // FIXME: Implement! 2810 return ""; 2811 } 2812}; 2813 2814const char * const SparcV8TargetInfo::GCCRegNames[] = { 2815 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2816 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 2817 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 2818 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 2819}; 2820 2821void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 2822 unsigned &NumNames) const { 2823 Names = GCCRegNames; 2824 NumNames = llvm::array_lengthof(GCCRegNames); 2825} 2826 2827const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 2828 { { "g0" }, "r0" }, 2829 { { "g1" }, "r1" }, 2830 { { "g2" }, "r2" }, 2831 { { "g3" }, "r3" }, 2832 { { "g4" }, "r4" }, 2833 { { "g5" }, "r5" }, 2834 { { "g6" }, "r6" }, 2835 { { "g7" }, "r7" }, 2836 { { "o0" }, "r8" }, 2837 { { "o1" }, "r9" }, 2838 { { "o2" }, "r10" }, 2839 { { "o3" }, "r11" }, 2840 { { "o4" }, "r12" }, 2841 { { "o5" }, "r13" }, 2842 { { "o6", "sp" }, "r14" }, 2843 { { "o7" }, "r15" }, 2844 { { "l0" }, "r16" }, 2845 { { "l1" }, "r17" }, 2846 { { "l2" }, "r18" }, 2847 { { "l3" }, "r19" }, 2848 { { "l4" }, "r20" }, 2849 { { "l5" }, "r21" }, 2850 { { "l6" }, "r22" }, 2851 { { "l7" }, "r23" }, 2852 { { "i0" }, "r24" }, 2853 { { "i1" }, "r25" }, 2854 { { "i2" }, "r26" }, 2855 { { "i3" }, "r27" }, 2856 { { "i4" }, "r28" }, 2857 { { "i5" }, "r29" }, 2858 { { "i6", "fp" }, "r30" }, 2859 { { "i7" }, "r31" }, 2860}; 2861 2862void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2863 unsigned &NumAliases) const { 2864 Aliases = GCCRegAliases; 2865 NumAliases = llvm::array_lengthof(GCCRegAliases); 2866} 2867} // end anonymous namespace. 2868 2869namespace { 2870class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 2871public: 2872 AuroraUXSparcV8TargetInfo(const std::string& triple) : 2873 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 2874 SizeType = UnsignedInt; 2875 PtrDiffType = SignedInt; 2876 } 2877}; 2878class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 2879public: 2880 SolarisSparcV8TargetInfo(const std::string& triple) : 2881 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 2882 SizeType = UnsignedInt; 2883 PtrDiffType = SignedInt; 2884 } 2885}; 2886} // end anonymous namespace. 2887 2888namespace { 2889 class MSP430TargetInfo : public TargetInfo { 2890 static const char * const GCCRegNames[]; 2891 public: 2892 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 2893 TLSSupported = false; 2894 IntWidth = 16; IntAlign = 16; 2895 LongWidth = 32; LongLongWidth = 64; 2896 LongAlign = LongLongAlign = 16; 2897 PointerWidth = 16; PointerAlign = 16; 2898 SizeType = UnsignedInt; 2899 IntMaxType = SignedLong; 2900 UIntMaxType = UnsignedLong; 2901 IntPtrType = SignedShort; 2902 PtrDiffType = SignedInt; 2903 SigAtomicType = SignedLong; 2904 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 2905 } 2906 virtual void getTargetDefines(const LangOptions &Opts, 2907 MacroBuilder &Builder) const { 2908 Builder.defineMacro("MSP430"); 2909 Builder.defineMacro("__MSP430__"); 2910 // FIXME: defines for different 'flavours' of MCU 2911 } 2912 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2913 unsigned &NumRecords) const { 2914 // FIXME: Implement. 2915 Records = 0; 2916 NumRecords = 0; 2917 } 2918 virtual void getGCCRegNames(const char * const *&Names, 2919 unsigned &NumNames) const; 2920 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2921 unsigned &NumAliases) const { 2922 // No aliases. 2923 Aliases = 0; 2924 NumAliases = 0; 2925 } 2926 virtual bool validateAsmConstraint(const char *&Name, 2927 TargetInfo::ConstraintInfo &info) const { 2928 // No target constraints for now. 2929 return false; 2930 } 2931 virtual const char *getClobbers() const { 2932 // FIXME: Is this really right? 2933 return ""; 2934 } 2935 virtual const char *getVAListDeclaration() const { 2936 // FIXME: implement 2937 return "typedef char* __builtin_va_list;"; 2938 } 2939 }; 2940 2941 const char * const MSP430TargetInfo::GCCRegNames[] = { 2942 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2943 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2944 }; 2945 2946 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 2947 unsigned &NumNames) const { 2948 Names = GCCRegNames; 2949 NumNames = llvm::array_lengthof(GCCRegNames); 2950 } 2951} 2952 2953namespace { 2954 2955 // LLVM and Clang cannot be used directly to output native binaries for 2956 // target, but is used to compile C code to llvm bitcode with correct 2957 // type and alignment information. 2958 // 2959 // TCE uses the llvm bitcode as input and uses it for generating customized 2960 // target processor and program binary. TCE co-design environment is 2961 // publicly available in http://tce.cs.tut.fi 2962 2963 static const unsigned TCEOpenCLAddrSpaceMap[] = { 2964 3, // opencl_global 2965 4, // opencl_local 2966 5 // opencl_constant 2967 }; 2968 2969 class TCETargetInfo : public TargetInfo{ 2970 public: 2971 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 2972 TLSSupported = false; 2973 IntWidth = 32; 2974 LongWidth = LongLongWidth = 32; 2975 PointerWidth = 32; 2976 IntAlign = 32; 2977 LongAlign = LongLongAlign = 32; 2978 PointerAlign = 32; 2979 SizeType = UnsignedInt; 2980 IntMaxType = SignedLong; 2981 UIntMaxType = UnsignedLong; 2982 IntPtrType = SignedInt; 2983 PtrDiffType = SignedInt; 2984 FloatWidth = 32; 2985 FloatAlign = 32; 2986 DoubleWidth = 32; 2987 DoubleAlign = 32; 2988 LongDoubleWidth = 32; 2989 LongDoubleAlign = 32; 2990 FloatFormat = &llvm::APFloat::IEEEsingle; 2991 DoubleFormat = &llvm::APFloat::IEEEsingle; 2992 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 2993 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 2994 "i16:16:32-i32:32:32-i64:32:32-" 2995 "f32:32:32-f64:32:32-v64:32:32-" 2996 "v128:32:32-a0:0:32-n32"; 2997 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 2998 } 2999 3000 virtual void getTargetDefines(const LangOptions &Opts, 3001 MacroBuilder &Builder) const { 3002 DefineStd(Builder, "tce", Opts); 3003 Builder.defineMacro("__TCE__"); 3004 Builder.defineMacro("__TCE_V1__"); 3005 } 3006 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3007 unsigned &NumRecords) const {} 3008 virtual const char *getClobbers() const { 3009 return ""; 3010 } 3011 virtual const char *getVAListDeclaration() const { 3012 return "typedef void* __builtin_va_list;"; 3013 } 3014 virtual void getGCCRegNames(const char * const *&Names, 3015 unsigned &NumNames) const {} 3016 virtual bool validateAsmConstraint(const char *&Name, 3017 TargetInfo::ConstraintInfo &info) const { 3018 return true; 3019 } 3020 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3021 unsigned &NumAliases) const {} 3022 }; 3023} 3024 3025namespace { 3026class MipsTargetInfoBase : public TargetInfo { 3027 std::string CPU; 3028protected: 3029 std::string ABI; 3030public: 3031 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr) 3032 : TargetInfo(triple), ABI(ABIStr) {} 3033 virtual const char *getABI() const { return ABI.c_str(); } 3034 virtual bool setABI(const std::string &Name) = 0; 3035 virtual bool setCPU(const std::string &Name) { 3036 CPU = Name; 3037 return true; 3038 } 3039 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3040 Features[ABI] = true; 3041 Features[CPU] = true; 3042 } 3043 virtual void getArchDefines(const LangOptions &Opts, 3044 MacroBuilder &Builder) const = 0; 3045 virtual void getTargetDefines(const LangOptions &Opts, 3046 MacroBuilder &Builder) const = 0; 3047 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3048 unsigned &NumRecords) const { 3049 // FIXME: Implement! 3050 } 3051 virtual const char *getVAListDeclaration() const { 3052 return "typedef void* __builtin_va_list;"; 3053 } 3054 virtual void getGCCRegNames(const char * const *&Names, 3055 unsigned &NumNames) const { 3056 static const char * const GCCRegNames[] = { 3057 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3058 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3059 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3060 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 3061 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3062 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3063 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3064 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3065 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3066 "$fcc5","$fcc6","$fcc7" 3067 }; 3068 Names = GCCRegNames; 3069 NumNames = llvm::array_lengthof(GCCRegNames); 3070 } 3071 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3072 unsigned &NumAliases) const = 0; 3073 virtual bool validateAsmConstraint(const char *&Name, 3074 TargetInfo::ConstraintInfo &Info) const { 3075 switch (*Name) { 3076 default: 3077 return false; 3078 3079 case 'r': // CPU registers. 3080 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3081 case 'y': // Equivalent to "r", backwards compatibility only. 3082 case 'f': // floating-point registers. 3083 Info.setAllowsRegister(); 3084 return true; 3085 } 3086 return false; 3087 } 3088 3089 virtual const char *getClobbers() const { 3090 // FIXME: Implement! 3091 return ""; 3092 } 3093}; 3094 3095class Mips32TargetInfoBase : public MipsTargetInfoBase { 3096public: 3097 Mips32TargetInfoBase(const std::string& triple) : 3098 MipsTargetInfoBase(triple, "o32") { 3099 SizeType = UnsignedInt; 3100 PtrDiffType = SignedInt; 3101 } 3102 virtual bool setABI(const std::string &Name) { 3103 if ((Name == "o32") || (Name == "eabi")) { 3104 ABI = Name; 3105 return true; 3106 } else 3107 return false; 3108 } 3109 virtual void getArchDefines(const LangOptions &Opts, 3110 MacroBuilder &Builder) const { 3111 if (ABI == "o32") { 3112 Builder.defineMacro("__mips_o32"); 3113 Builder.defineMacro("_ABIO32", "1"); 3114 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3115 } 3116 else if (ABI == "eabi") 3117 Builder.defineMacro("__mips_eabi"); 3118 else 3119 llvm_unreachable("Invalid ABI for Mips32."); 3120 } 3121 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3122 unsigned &NumAliases) const { 3123 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3124 { { "at" }, "$1" }, 3125 { { "v0" }, "$2" }, 3126 { { "v1" }, "$3" }, 3127 { { "a0" }, "$4" }, 3128 { { "a1" }, "$5" }, 3129 { { "a2" }, "$6" }, 3130 { { "a3" }, "$7" }, 3131 { { "t0" }, "$8" }, 3132 { { "t1" }, "$9" }, 3133 { { "t2" }, "$10" }, 3134 { { "t3" }, "$11" }, 3135 { { "t4" }, "$12" }, 3136 { { "t5" }, "$13" }, 3137 { { "t6" }, "$14" }, 3138 { { "t7" }, "$15" }, 3139 { { "s0" }, "$16" }, 3140 { { "s1" }, "$17" }, 3141 { { "s2" }, "$18" }, 3142 { { "s3" }, "$19" }, 3143 { { "s4" }, "$20" }, 3144 { { "s5" }, "$21" }, 3145 { { "s6" }, "$22" }, 3146 { { "s7" }, "$23" }, 3147 { { "t8" }, "$24" }, 3148 { { "t9" }, "$25" }, 3149 { { "k0" }, "$26" }, 3150 { { "k1" }, "$27" }, 3151 { { "gp" }, "$28" }, 3152 { { "sp" }, "$29" }, 3153 { { "fp" }, "$30" }, 3154 { { "ra" }, "$31" } 3155 }; 3156 Aliases = GCCRegAliases; 3157 NumAliases = llvm::array_lengthof(GCCRegAliases); 3158 } 3159}; 3160 3161class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3162public: 3163 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3164 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3165 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3166 } 3167 virtual void getTargetDefines(const LangOptions &Opts, 3168 MacroBuilder &Builder) const { 3169 DefineStd(Builder, "mips", Opts); 3170 Builder.defineMacro("_mips"); 3171 DefineStd(Builder, "MIPSEB", Opts); 3172 Builder.defineMacro("_MIPSEB"); 3173 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3174 getArchDefines(Opts, Builder); 3175 } 3176}; 3177 3178class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3179public: 3180 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3181 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3182 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3183 } 3184 virtual void getTargetDefines(const LangOptions &Opts, 3185 MacroBuilder &Builder) const { 3186 DefineStd(Builder, "mips", Opts); 3187 Builder.defineMacro("_mips"); 3188 DefineStd(Builder, "MIPSEL", Opts); 3189 Builder.defineMacro("_MIPSEL"); 3190 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3191 getArchDefines(Opts, Builder); 3192 } 3193}; 3194 3195class Mips64TargetInfoBase : public MipsTargetInfoBase { 3196 virtual void SetDescriptionString(const std::string &Name) = 0; 3197public: 3198 Mips64TargetInfoBase(const std::string& triple) : 3199 MipsTargetInfoBase(triple, "n64") { 3200 LongWidth = LongAlign = 64; 3201 PointerWidth = PointerAlign = 64; 3202 LongDoubleWidth = LongDoubleAlign = 128; 3203 LongDoubleFormat = &llvm::APFloat::IEEEquad; 3204 } 3205 virtual bool setABI(const std::string &Name) { 3206 SetDescriptionString(Name); 3207 3208 if (Name != "n32" && Name != "n64") 3209 return false; 3210 3211 ABI = Name; 3212 3213 if (Name == "n32") { 3214 LongWidth = LongAlign = 32; 3215 PointerWidth = PointerAlign = 32; 3216 } 3217 3218 return true; 3219 } 3220 virtual void getArchDefines(const LangOptions &Opts, 3221 MacroBuilder &Builder) const { 3222 if (ABI == "n32") { 3223 Builder.defineMacro("__mips_n32"); 3224 Builder.defineMacro("_ABIN32", "2"); 3225 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3226 } 3227 else if (ABI == "n64") { 3228 Builder.defineMacro("__mips_n64"); 3229 Builder.defineMacro("_ABI64", "3"); 3230 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3231 } 3232 else 3233 llvm_unreachable("Invalid ABI for Mips64."); 3234 } 3235 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3236 unsigned &NumAliases) const { 3237 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3238 { { "at" }, "$1" }, 3239 { { "v0" }, "$2" }, 3240 { { "v1" }, "$3" }, 3241 { { "a0" }, "$4" }, 3242 { { "a1" }, "$5" }, 3243 { { "a2" }, "$6" }, 3244 { { "a3" }, "$7" }, 3245 { { "a4" }, "$8" }, 3246 { { "a5" }, "$9" }, 3247 { { "a6" }, "$10" }, 3248 { { "a7" }, "$11" }, 3249 { { "t0" }, "$12" }, 3250 { { "t1" }, "$13" }, 3251 { { "t2" }, "$14" }, 3252 { { "t3" }, "$15" }, 3253 { { "s0" }, "$16" }, 3254 { { "s1" }, "$17" }, 3255 { { "s2" }, "$18" }, 3256 { { "s3" }, "$19" }, 3257 { { "s4" }, "$20" }, 3258 { { "s5" }, "$21" }, 3259 { { "s6" }, "$22" }, 3260 { { "s7" }, "$23" }, 3261 { { "t8" }, "$24" }, 3262 { { "t9" }, "$25" }, 3263 { { "k0" }, "$26" }, 3264 { { "k1" }, "$27" }, 3265 { { "gp" }, "$28" }, 3266 { { "sp" }, "$29" }, 3267 { { "fp" }, "$30" }, 3268 { { "ra" }, "$31" } 3269 }; 3270 Aliases = GCCRegAliases; 3271 NumAliases = llvm::array_lengthof(GCCRegAliases); 3272 } 3273}; 3274 3275class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3276 virtual void SetDescriptionString(const std::string &Name) { 3277 // Change DescriptionString only if ABI is n32. 3278 if (Name == "n32") 3279 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3280 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3281 "v64:64:64-n32"; 3282 } 3283public: 3284 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3285 // Default ABI is n64. 3286 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3287 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3288 "v64:64:64-n32"; 3289 } 3290 virtual void getTargetDefines(const LangOptions &Opts, 3291 MacroBuilder &Builder) const { 3292 DefineStd(Builder, "mips", Opts); 3293 Builder.defineMacro("_mips"); 3294 DefineStd(Builder, "MIPSEB", Opts); 3295 Builder.defineMacro("_MIPSEB"); 3296 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3297 getArchDefines(Opts, Builder); 3298 } 3299}; 3300 3301class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3302 virtual void SetDescriptionString(const std::string &Name) { 3303 // Change DescriptionString only if ABI is n32. 3304 if (Name == "n32") 3305 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3306 "i64:64:64-f32:32:32-f64:64:64-f128:128:128" 3307 "-v64:64:64-n32"; 3308 } 3309public: 3310 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3311 // Default ABI is n64. 3312 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3313 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3314 "v64:64:64-n32"; 3315 } 3316 virtual void getTargetDefines(const LangOptions &Opts, 3317 MacroBuilder &Builder) const { 3318 DefineStd(Builder, "mips", Opts); 3319 Builder.defineMacro("_mips"); 3320 DefineStd(Builder, "MIPSEL", Opts); 3321 Builder.defineMacro("_MIPSEL"); 3322 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3323 getArchDefines(Opts, Builder); 3324 } 3325}; 3326} // end anonymous namespace. 3327 3328namespace { 3329class PNaClTargetInfo : public TargetInfo { 3330public: 3331 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3332 this->UserLabelPrefix = ""; 3333 this->LongAlign = 32; 3334 this->LongWidth = 32; 3335 this->PointerAlign = 32; 3336 this->PointerWidth = 32; 3337 this->IntMaxType = TargetInfo::SignedLongLong; 3338 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3339 this->Int64Type = TargetInfo::SignedLongLong; 3340 this->DoubleAlign = 64; 3341 this->LongDoubleWidth = 64; 3342 this->LongDoubleAlign = 64; 3343 this->SizeType = TargetInfo::UnsignedInt; 3344 this->PtrDiffType = TargetInfo::SignedInt; 3345 this->IntPtrType = TargetInfo::SignedInt; 3346 this->RegParmMax = 2; 3347 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3348 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3349 } 3350 3351 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3352 } 3353 virtual void getArchDefines(const LangOptions &Opts, 3354 MacroBuilder &Builder) const { 3355 Builder.defineMacro("__le32__"); 3356 Builder.defineMacro("__pnacl__"); 3357 } 3358 virtual void getTargetDefines(const LangOptions &Opts, 3359 MacroBuilder &Builder) const { 3360 DefineStd(Builder, "unix", Opts); 3361 Builder.defineMacro("__ELF__"); 3362 if (Opts.POSIXThreads) 3363 Builder.defineMacro("_REENTRANT"); 3364 if (Opts.CPlusPlus) 3365 Builder.defineMacro("_GNU_SOURCE"); 3366 3367 Builder.defineMacro("__native_client__"); 3368 getArchDefines(Opts, Builder); 3369 } 3370 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3371 unsigned &NumRecords) const { 3372 } 3373 virtual const char *getVAListDeclaration() const { 3374 return "typedef int __builtin_va_list[4];"; 3375 } 3376 virtual void getGCCRegNames(const char * const *&Names, 3377 unsigned &NumNames) const; 3378 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3379 unsigned &NumAliases) const; 3380 virtual bool validateAsmConstraint(const char *&Name, 3381 TargetInfo::ConstraintInfo &Info) const { 3382 return false; 3383 } 3384 3385 virtual const char *getClobbers() const { 3386 return ""; 3387 } 3388}; 3389 3390void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 3391 unsigned &NumNames) const { 3392 Names = NULL; 3393 NumNames = 0; 3394} 3395 3396void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3397 unsigned &NumAliases) const { 3398 Aliases = NULL; 3399 NumAliases = 0; 3400} 3401} // end anonymous namespace. 3402 3403 3404//===----------------------------------------------------------------------===// 3405// Driver code 3406//===----------------------------------------------------------------------===// 3407 3408static TargetInfo *AllocateTarget(const std::string &T) { 3409 llvm::Triple Triple(T); 3410 llvm::Triple::OSType os = Triple.getOS(); 3411 3412 switch (Triple.getArch()) { 3413 default: 3414 return NULL; 3415 3416 case llvm::Triple::arm: 3417 case llvm::Triple::thumb: 3418 if (Triple.isOSDarwin()) 3419 return new DarwinARMTargetInfo(T); 3420 3421 switch (os) { 3422 case llvm::Triple::Linux: 3423 return new LinuxTargetInfo<ARMTargetInfo>(T); 3424 case llvm::Triple::FreeBSD: 3425 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 3426 case llvm::Triple::NetBSD: 3427 return new NetBSDTargetInfo<ARMTargetInfo>(T); 3428 case llvm::Triple::RTEMS: 3429 return new RTEMSTargetInfo<ARMTargetInfo>(T); 3430 default: 3431 return new ARMTargetInfo(T); 3432 } 3433 3434 case llvm::Triple::msp430: 3435 return new MSP430TargetInfo(T); 3436 3437 case llvm::Triple::mips: 3438 switch (os) { 3439 case llvm::Triple::Linux: 3440 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 3441 case llvm::Triple::RTEMS: 3442 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 3443 case llvm::Triple::FreeBSD: 3444 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 3445 case llvm::Triple::NetBSD: 3446 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 3447 default: 3448 return new Mips32EBTargetInfo(T); 3449 } 3450 3451 case llvm::Triple::mipsel: 3452 switch (os) { 3453 case llvm::Triple::Linux: 3454 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 3455 case llvm::Triple::RTEMS: 3456 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 3457 case llvm::Triple::FreeBSD: 3458 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 3459 case llvm::Triple::NetBSD: 3460 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 3461 default: 3462 return new Mips32ELTargetInfo(T); 3463 } 3464 3465 case llvm::Triple::mips64: 3466 switch (os) { 3467 case llvm::Triple::Linux: 3468 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 3469 case llvm::Triple::RTEMS: 3470 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 3471 case llvm::Triple::FreeBSD: 3472 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 3473 case llvm::Triple::NetBSD: 3474 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 3475 default: 3476 return new Mips64EBTargetInfo(T); 3477 } 3478 3479 case llvm::Triple::mips64el: 3480 switch (os) { 3481 case llvm::Triple::Linux: 3482 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 3483 case llvm::Triple::RTEMS: 3484 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 3485 case llvm::Triple::FreeBSD: 3486 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 3487 case llvm::Triple::NetBSD: 3488 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 3489 default: 3490 return new Mips64ELTargetInfo(T); 3491 } 3492 3493 case llvm::Triple::le32: 3494 switch (os) { 3495 case llvm::Triple::NativeClient: 3496 return new PNaClTargetInfo(T); 3497 default: 3498 return NULL; 3499 } 3500 3501 case llvm::Triple::ppc: 3502 if (Triple.isOSDarwin()) 3503 return new DarwinPPC32TargetInfo(T); 3504 switch (os) { 3505 case llvm::Triple::Linux: 3506 return new LinuxTargetInfo<PPC32TargetInfo>(T); 3507 case llvm::Triple::FreeBSD: 3508 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 3509 case llvm::Triple::NetBSD: 3510 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 3511 case llvm::Triple::RTEMS: 3512 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 3513 default: 3514 return new PPC32TargetInfo(T); 3515 } 3516 3517 case llvm::Triple::ppc64: 3518 if (Triple.isOSDarwin()) 3519 return new DarwinPPC64TargetInfo(T); 3520 switch (os) { 3521 case llvm::Triple::Linux: 3522 return new LinuxTargetInfo<PPC64TargetInfo>(T); 3523 case llvm::Triple::Lv2: 3524 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 3525 case llvm::Triple::FreeBSD: 3526 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 3527 case llvm::Triple::NetBSD: 3528 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 3529 default: 3530 return new PPC64TargetInfo(T); 3531 } 3532 3533 case llvm::Triple::ptx32: 3534 return new PTX32TargetInfo(T); 3535 case llvm::Triple::ptx64: 3536 return new PTX64TargetInfo(T); 3537 3538 case llvm::Triple::mblaze: 3539 return new MBlazeTargetInfo(T); 3540 3541 case llvm::Triple::sparc: 3542 switch (os) { 3543 case llvm::Triple::Linux: 3544 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 3545 case llvm::Triple::AuroraUX: 3546 return new AuroraUXSparcV8TargetInfo(T); 3547 case llvm::Triple::Solaris: 3548 return new SolarisSparcV8TargetInfo(T); 3549 case llvm::Triple::NetBSD: 3550 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 3551 case llvm::Triple::RTEMS: 3552 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 3553 default: 3554 return new SparcV8TargetInfo(T); 3555 } 3556 3557 // FIXME: Need a real SPU target. 3558 case llvm::Triple::cellspu: 3559 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 3560 3561 case llvm::Triple::tce: 3562 return new TCETargetInfo(T); 3563 3564 case llvm::Triple::x86: 3565 if (Triple.isOSDarwin()) 3566 return new DarwinI386TargetInfo(T); 3567 3568 switch (os) { 3569 case llvm::Triple::AuroraUX: 3570 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 3571 case llvm::Triple::Linux: 3572 return new LinuxTargetInfo<X86_32TargetInfo>(T); 3573 case llvm::Triple::DragonFly: 3574 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 3575 case llvm::Triple::NetBSD: 3576 return new NetBSDTargetInfo<X86_32TargetInfo>(T); 3577 case llvm::Triple::OpenBSD: 3578 return new OpenBSDI386TargetInfo(T); 3579 case llvm::Triple::FreeBSD: 3580 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 3581 case llvm::Triple::Minix: 3582 return new MinixTargetInfo<X86_32TargetInfo>(T); 3583 case llvm::Triple::Solaris: 3584 return new SolarisTargetInfo<X86_32TargetInfo>(T); 3585 case llvm::Triple::Cygwin: 3586 return new CygwinX86_32TargetInfo(T); 3587 case llvm::Triple::MinGW32: 3588 return new MinGWX86_32TargetInfo(T); 3589 case llvm::Triple::Win32: 3590 return new VisualStudioWindowsX86_32TargetInfo(T); 3591 case llvm::Triple::Haiku: 3592 return new HaikuX86_32TargetInfo(T); 3593 case llvm::Triple::RTEMS: 3594 return new RTEMSX86_32TargetInfo(T); 3595 default: 3596 return new X86_32TargetInfo(T); 3597 } 3598 3599 case llvm::Triple::x86_64: 3600 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 3601 return new DarwinX86_64TargetInfo(T); 3602 3603 switch (os) { 3604 case llvm::Triple::AuroraUX: 3605 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 3606 case llvm::Triple::Linux: 3607 return new LinuxTargetInfo<X86_64TargetInfo>(T); 3608 case llvm::Triple::DragonFly: 3609 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 3610 case llvm::Triple::NetBSD: 3611 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 3612 case llvm::Triple::OpenBSD: 3613 return new OpenBSDX86_64TargetInfo(T); 3614 case llvm::Triple::FreeBSD: 3615 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 3616 case llvm::Triple::Solaris: 3617 return new SolarisTargetInfo<X86_64TargetInfo>(T); 3618 case llvm::Triple::MinGW32: 3619 return new MinGWX86_64TargetInfo(T); 3620 case llvm::Triple::Win32: // This is what Triple.h supports now. 3621 return new VisualStudioWindowsX86_64TargetInfo(T); 3622 default: 3623 return new X86_64TargetInfo(T); 3624 } 3625 } 3626} 3627 3628/// CreateTargetInfo - Return the target info object for the specified target 3629/// triple. 3630TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 3631 TargetOptions &Opts) { 3632 llvm::Triple Triple(Opts.Triple); 3633 3634 // Construct the target 3635 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 3636 if (!Target) { 3637 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 3638 return 0; 3639 } 3640 3641 // Set the target CPU if specified. 3642 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 3643 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 3644 return 0; 3645 } 3646 3647 // Set the target ABI if specified. 3648 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 3649 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 3650 return 0; 3651 } 3652 3653 // Set the target C++ ABI. 3654 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 3655 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 3656 return 0; 3657 } 3658 3659 // Compute the default target features, we need the target to handle this 3660 // because features may have dependencies on one another. 3661 llvm::StringMap<bool> Features; 3662 Target->getDefaultFeatures(Features); 3663 3664 // Apply the user specified deltas. 3665 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 3666 ie = Opts.Features.end(); it != ie; ++it) { 3667 const char *Name = it->c_str(); 3668 3669 // Apply the feature via the target. 3670 if ((Name[0] != '-' && Name[0] != '+') || 3671 !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) { 3672 Diags.Report(diag::err_target_invalid_feature) << Name; 3673 return 0; 3674 } 3675 } 3676 3677 // Add the features to the compile options. 3678 // 3679 // FIXME: If we are completely confident that we have the right set, we only 3680 // need to pass the minuses. 3681 Opts.Features.clear(); 3682 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 3683 ie = Features.end(); it != ie; ++it) 3684 Opts.Features.push_back(std::string(it->second ? "+" : "-") + 3685 it->first().str()); 3686 Target->HandleTargetFeatures(Opts.Features); 3687 3688 return Target.take(); 3689} 3690