Targets.cpp revision 2ae950726990c09f790931edcf9e6763851ee077 
1//===--- Targets.cpp - Implement -arch option and targets -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements construction of a TargetInfo object from a
11// target triple.
12//
13//===----------------------------------------------------------------------===//
14
15#include "clang/Basic/TargetInfo.h"
16#include "clang/Basic/Builtins.h"
17#include "clang/Basic/Diagnostic.h"
18#include "clang/Basic/LangOptions.h"
19#include "clang/Basic/MacroBuilder.h"
20#include "clang/Basic/TargetBuiltins.h"
21#include "clang/Basic/TargetOptions.h"
22#include "llvm/ADT/APFloat.h"
23#include "llvm/ADT/OwningPtr.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/ADT/StringSwitch.h"
27#include "llvm/ADT/Triple.h"
28#include "llvm/MC/MCSectionMachO.h"
29#include "llvm/Support/ErrorHandling.h"
30#include "llvm/Type.h"
31#include <algorithm>
32using namespace clang;
33
34//===----------------------------------------------------------------------===//
35//  Common code shared among targets.
36//===----------------------------------------------------------------------===//
37
38/// DefineStd - Define a macro name and standard variants.  For example if
39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
40/// when in GNU mode.
41static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42                      const LangOptions &Opts) {
43  assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44
45  // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46  // in the user's namespace.
47  if (Opts.GNUMode)
48    Builder.defineMacro(MacroName);
49
50  // Define __unix.
51  Builder.defineMacro("__" + MacroName);
52
53  // Define __unix__.
54  Builder.defineMacro("__" + MacroName + "__");
55}
56
57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
58                            bool Tuning = true) {
59  Builder.defineMacro("__" + CPUName);
60  Builder.defineMacro("__" + CPUName + "__");
61  if (Tuning)
62    Builder.defineMacro("__tune_" + CPUName + "__");
63}
64
65//===----------------------------------------------------------------------===//
66// Defines specific to certain operating systems.
67//===----------------------------------------------------------------------===//
68
69namespace {
70template<typename TgtInfo>
71class OSTargetInfo : public TgtInfo {
72protected:
73  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74                            MacroBuilder &Builder) const=0;
75public:
76  OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77  virtual void getTargetDefines(const LangOptions &Opts,
78                                MacroBuilder &Builder) const {
79    TgtInfo::getTargetDefines(Opts, Builder);
80    getOSDefines(Opts, TgtInfo::getTriple(), Builder);
81  }
82
83};
84} // end anonymous namespace
85
86
87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88                             const llvm::Triple &Triple,
89                             StringRef &PlatformName,
90                             VersionTuple &PlatformMinVersion) {
91  Builder.defineMacro("__APPLE_CC__", "5621");
92  Builder.defineMacro("__APPLE__");
93  Builder.defineMacro("__MACH__");
94  Builder.defineMacro("OBJC_NEW_PROPERTIES");
95
96  if (!Opts.ObjCAutoRefCount) {
97    // __weak is always defined, for use in blocks and with objc pointers.
98    Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
99
100    // Darwin defines __strong even in C mode (just to nothing).
101    if (Opts.getGC() != LangOptions::NonGC)
102      Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
103    else
104      Builder.defineMacro("__strong", "");
105
106    // __unsafe_unretained is defined to nothing in non-ARC mode. We even
107    // allow this in C, since one might have block pointers in structs that
108    // are used in pure C code and in Objective-C ARC.
109    Builder.defineMacro("__unsafe_unretained", "");
110  }
111
112  if (Opts.Static)
113    Builder.defineMacro("__STATIC__");
114  else
115    Builder.defineMacro("__DYNAMIC__");
116
117  if (Opts.POSIXThreads)
118    Builder.defineMacro("_REENTRANT");
119
120  // Get the platform type and version number from the triple.
121  unsigned Maj, Min, Rev;
122  if (Triple.isMacOSX()) {
123    Triple.getMacOSXVersion(Maj, Min, Rev);
124    PlatformName = "macosx";
125  } else {
126    Triple.getOSVersion(Maj, Min, Rev);
127    PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
128  }
129
130  // If -target arch-pc-win32-macho option specified, we're
131  // generating code for Win32 ABI. No need to emit
132  // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
133  if (PlatformName == "win32") {
134    PlatformMinVersion = VersionTuple(Maj, Min, Rev);
135    return;
136  }
137
138  // Set the appropriate OS version define.
139  if (Triple.getOS() == llvm::Triple::IOS) {
140    assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
141    char Str[6];
142    Str[0] = '0' + Maj;
143    Str[1] = '0' + (Min / 10);
144    Str[2] = '0' + (Min % 10);
145    Str[3] = '0' + (Rev / 10);
146    Str[4] = '0' + (Rev % 10);
147    Str[5] = '\0';
148    Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
149  } else {
150    // Note that the Driver allows versions which aren't representable in the
151    // define (because we only get a single digit for the minor and micro
152    // revision numbers). So, we limit them to the maximum representable
153    // version.
154    assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
155    assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
156    char Str[5];
157    Str[0] = '0' + (Maj / 10);
158    Str[1] = '0' + (Maj % 10);
159    Str[2] = '0' + std::min(Min, 9U);
160    Str[3] = '0' + std::min(Rev, 9U);
161    Str[4] = '\0';
162    Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
163  }
164
165  PlatformMinVersion = VersionTuple(Maj, Min, Rev);
166}
167
168namespace {
169template<typename Target>
170class DarwinTargetInfo : public OSTargetInfo<Target> {
171protected:
172  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
173                            MacroBuilder &Builder) const {
174    getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
175                     this->PlatformMinVersion);
176  }
177
178public:
179  DarwinTargetInfo(const std::string& triple) :
180    OSTargetInfo<Target>(triple) {
181      llvm::Triple T = llvm::Triple(triple);
182      this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
183      this->MCountName = "\01mcount";
184    }
185
186  virtual std::string isValidSectionSpecifier(StringRef SR) const {
187    // Let MCSectionMachO validate this.
188    StringRef Segment, Section;
189    unsigned TAA, StubSize;
190    bool HasTAA;
191    return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
192                                                       TAA, HasTAA, StubSize);
193  }
194
195  virtual const char *getStaticInitSectionSpecifier() const {
196    // FIXME: We should return 0 when building kexts.
197    return "__TEXT,__StaticInit,regular,pure_instructions";
198  }
199
200  /// Darwin does not support protected visibility.  Darwin's "default"
201  /// is very similar to ELF's "protected";  Darwin requires a "weak"
202  /// attribute on declarations that can be dynamically replaced.
203  virtual bool hasProtectedVisibility() const {
204    return false;
205  }
206};
207
208
209// DragonFlyBSD Target
210template<typename Target>
211class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
212protected:
213  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
214                            MacroBuilder &Builder) const {
215    // DragonFly defines; list based off of gcc output
216    Builder.defineMacro("__DragonFly__");
217    Builder.defineMacro("__DragonFly_cc_version", "100001");
218    Builder.defineMacro("__ELF__");
219    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
220    Builder.defineMacro("__tune_i386__");
221    DefineStd(Builder, "unix", Opts);
222  }
223public:
224  DragonFlyBSDTargetInfo(const std::string &triple)
225    : OSTargetInfo<Target>(triple) {
226      this->UserLabelPrefix = "";
227
228      llvm::Triple Triple(triple);
229      switch (Triple.getArch()) {
230        default:
231        case llvm::Triple::x86:
232        case llvm::Triple::x86_64:
233          this->MCountName = ".mcount";
234          break;
235      }
236  }
237};
238
239// FreeBSD Target
240template<typename Target>
241class FreeBSDTargetInfo : public OSTargetInfo<Target> {
242protected:
243  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
244                            MacroBuilder &Builder) const {
245    // FreeBSD defines; list based off of gcc output
246
247    unsigned Release = Triple.getOSMajorVersion();
248    if (Release == 0U)
249      Release = 8;
250
251    Builder.defineMacro("__FreeBSD__", Twine(Release));
252    Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
253    Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
254    DefineStd(Builder, "unix", Opts);
255    Builder.defineMacro("__ELF__");
256  }
257public:
258  FreeBSDTargetInfo(const std::string &triple)
259    : OSTargetInfo<Target>(triple) {
260      this->UserLabelPrefix = "";
261
262      llvm::Triple Triple(triple);
263      switch (Triple.getArch()) {
264        default:
265        case llvm::Triple::x86:
266        case llvm::Triple::x86_64:
267          this->MCountName = ".mcount";
268          break;
269        case llvm::Triple::mips:
270        case llvm::Triple::mipsel:
271        case llvm::Triple::ppc:
272        case llvm::Triple::ppc64:
273          this->MCountName = "_mcount";
274          break;
275        case llvm::Triple::arm:
276          this->MCountName = "__mcount";
277          break;
278      }
279
280    }
281};
282
283// Minix Target
284template<typename Target>
285class MinixTargetInfo : public OSTargetInfo<Target> {
286protected:
287  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
288                            MacroBuilder &Builder) const {
289    // Minix defines
290
291    Builder.defineMacro("__minix", "3");
292    Builder.defineMacro("_EM_WSIZE", "4");
293    Builder.defineMacro("_EM_PSIZE", "4");
294    Builder.defineMacro("_EM_SSIZE", "2");
295    Builder.defineMacro("_EM_LSIZE", "4");
296    Builder.defineMacro("_EM_FSIZE", "4");
297    Builder.defineMacro("_EM_DSIZE", "8");
298    Builder.defineMacro("__ELF__");
299    DefineStd(Builder, "unix", Opts);
300  }
301public:
302  MinixTargetInfo(const std::string &triple)
303    : OSTargetInfo<Target>(triple) {
304      this->UserLabelPrefix = "";
305    }
306};
307
308// Linux target
309template<typename Target>
310class LinuxTargetInfo : public OSTargetInfo<Target> {
311protected:
312  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
313                            MacroBuilder &Builder) const {
314    // Linux defines; list based off of gcc output
315    DefineStd(Builder, "unix", Opts);
316    DefineStd(Builder, "linux", Opts);
317    Builder.defineMacro("__gnu_linux__");
318    Builder.defineMacro("__ELF__");
319    if (Triple.getEnvironment() == llvm::Triple::ANDROIDEABI)
320      Builder.defineMacro("__ANDROID__", "1");
321    if (Opts.POSIXThreads)
322      Builder.defineMacro("_REENTRANT");
323    if (Opts.CPlusPlus)
324      Builder.defineMacro("_GNU_SOURCE");
325  }
326public:
327  LinuxTargetInfo(const std::string& triple)
328    : OSTargetInfo<Target>(triple) {
329    this->UserLabelPrefix = "";
330    this->WIntType = TargetInfo::UnsignedInt;
331  }
332
333  virtual const char *getStaticInitSectionSpecifier() const {
334    return ".text.startup";
335  }
336};
337
338// NetBSD Target
339template<typename Target>
340class NetBSDTargetInfo : public OSTargetInfo<Target> {
341protected:
342  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
343                            MacroBuilder &Builder) const {
344    // NetBSD defines; list based off of gcc output
345    Builder.defineMacro("__NetBSD__");
346    Builder.defineMacro("__unix__");
347    Builder.defineMacro("__ELF__");
348    if (Opts.POSIXThreads)
349      Builder.defineMacro("_POSIX_THREADS");
350  }
351public:
352  NetBSDTargetInfo(const std::string &triple)
353    : OSTargetInfo<Target>(triple) {
354      this->UserLabelPrefix = "";
355    }
356};
357
358// OpenBSD Target
359template<typename Target>
360class OpenBSDTargetInfo : public OSTargetInfo<Target> {
361protected:
362  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
363                            MacroBuilder &Builder) const {
364    // OpenBSD defines; list based off of gcc output
365
366    Builder.defineMacro("__OpenBSD__");
367    DefineStd(Builder, "unix", Opts);
368    Builder.defineMacro("__ELF__");
369    if (Opts.POSIXThreads)
370      Builder.defineMacro("_REENTRANT");
371  }
372public:
373  OpenBSDTargetInfo(const std::string &triple)
374    : OSTargetInfo<Target>(triple) {
375      this->UserLabelPrefix = "";
376
377      llvm::Triple Triple(triple);
378      switch (Triple.getArch()) {
379        default:
380        case llvm::Triple::x86:
381        case llvm::Triple::x86_64:
382        case llvm::Triple::arm:
383	case llvm::Triple::sparc:
384          this->MCountName = "__mcount";
385          break;
386        case llvm::Triple::mips64:
387        case llvm::Triple::mips64el:
388        case llvm::Triple::ppc:
389	case llvm::Triple::sparcv9:
390          this->MCountName = "_mcount";
391          break;
392      }
393  }
394};
395
396// PSP Target
397template<typename Target>
398class PSPTargetInfo : public OSTargetInfo<Target> {
399protected:
400  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
401                            MacroBuilder &Builder) const {
402    // PSP defines; list based on the output of the pspdev gcc toolchain.
403    Builder.defineMacro("PSP");
404    Builder.defineMacro("_PSP");
405    Builder.defineMacro("__psp__");
406    Builder.defineMacro("__ELF__");
407  }
408public:
409  PSPTargetInfo(const std::string& triple)
410    : OSTargetInfo<Target>(triple) {
411    this->UserLabelPrefix = "";
412  }
413};
414
415// PS3 PPU Target
416template<typename Target>
417class PS3PPUTargetInfo : public OSTargetInfo<Target> {
418protected:
419  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
420                            MacroBuilder &Builder) const {
421    // PS3 PPU defines.
422    Builder.defineMacro("__PPC__");
423    Builder.defineMacro("__PPU__");
424    Builder.defineMacro("__CELLOS_LV2__");
425    Builder.defineMacro("__ELF__");
426    Builder.defineMacro("__LP32__");
427    Builder.defineMacro("_ARCH_PPC64");
428    Builder.defineMacro("__powerpc64__");
429  }
430public:
431  PS3PPUTargetInfo(const std::string& triple)
432    : OSTargetInfo<Target>(triple) {
433    this->UserLabelPrefix = "";
434    this->LongWidth = this->LongAlign = 32;
435    this->PointerWidth = this->PointerAlign = 32;
436    this->IntMaxType = TargetInfo::SignedLongLong;
437    this->UIntMaxType = TargetInfo::UnsignedLongLong;
438    this->Int64Type = TargetInfo::SignedLongLong;
439    this->SizeType = TargetInfo::UnsignedInt;
440    this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
441                              "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
442  }
443};
444
445// FIXME: Need a real SPU target.
446// PS3 SPU Target
447template<typename Target>
448class PS3SPUTargetInfo : public OSTargetInfo<Target> {
449protected:
450  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
451                            MacroBuilder &Builder) const {
452    // PS3 PPU defines.
453    Builder.defineMacro("__SPU__");
454    Builder.defineMacro("__ELF__");
455  }
456public:
457  PS3SPUTargetInfo(const std::string& triple)
458    : OSTargetInfo<Target>(triple) {
459    this->UserLabelPrefix = "";
460  }
461};
462
463// AuroraUX target
464template<typename Target>
465class AuroraUXTargetInfo : public OSTargetInfo<Target> {
466protected:
467  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
468                            MacroBuilder &Builder) const {
469    DefineStd(Builder, "sun", Opts);
470    DefineStd(Builder, "unix", Opts);
471    Builder.defineMacro("__ELF__");
472    Builder.defineMacro("__svr4__");
473    Builder.defineMacro("__SVR4");
474  }
475public:
476  AuroraUXTargetInfo(const std::string& triple)
477    : OSTargetInfo<Target>(triple) {
478    this->UserLabelPrefix = "";
479    this->WCharType = this->SignedLong;
480    // FIXME: WIntType should be SignedLong
481  }
482};
483
484// Solaris target
485template<typename Target>
486class SolarisTargetInfo : public OSTargetInfo<Target> {
487protected:
488  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
489                            MacroBuilder &Builder) const {
490    DefineStd(Builder, "sun", Opts);
491    DefineStd(Builder, "unix", Opts);
492    Builder.defineMacro("__ELF__");
493    Builder.defineMacro("__svr4__");
494    Builder.defineMacro("__SVR4");
495    // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and
496    // newer, but to 500 for everything else.  feature_test.h has a check to
497    // ensure that you are not using C99 with an old version of X/Open or C89
498    // with a new version.
499    if (Opts.C99 || Opts.C11)
500      Builder.defineMacro("_XOPEN_SOURCE", "600");
501    else
502      Builder.defineMacro("_XOPEN_SOURCE", "500");
503    if (Opts.CPlusPlus)
504      Builder.defineMacro("__C99FEATURES__");
505    Builder.defineMacro("_LARGEFILE_SOURCE");
506    Builder.defineMacro("_LARGEFILE64_SOURCE");
507    Builder.defineMacro("__EXTENSIONS__");
508    Builder.defineMacro("_REENTRANT");
509  }
510public:
511  SolarisTargetInfo(const std::string& triple)
512    : OSTargetInfo<Target>(triple) {
513    this->UserLabelPrefix = "";
514    this->WCharType = this->SignedInt;
515    // FIXME: WIntType should be SignedLong
516  }
517};
518
519// Windows target
520template<typename Target>
521class WindowsTargetInfo : public OSTargetInfo<Target> {
522protected:
523  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
524                            MacroBuilder &Builder) const {
525    Builder.defineMacro("_WIN32");
526  }
527  void getVisualStudioDefines(const LangOptions &Opts,
528                              MacroBuilder &Builder) const {
529    if (Opts.CPlusPlus) {
530      if (Opts.RTTI)
531        Builder.defineMacro("_CPPRTTI");
532
533      if (Opts.Exceptions)
534        Builder.defineMacro("_CPPUNWIND");
535    }
536
537    if (!Opts.CharIsSigned)
538      Builder.defineMacro("_CHAR_UNSIGNED");
539
540    // FIXME: POSIXThreads isn't exactly the option this should be defined for,
541    //        but it works for now.
542    if (Opts.POSIXThreads)
543      Builder.defineMacro("_MT");
544
545    if (Opts.MSCVersion != 0)
546      Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
547
548    if (Opts.MicrosoftExt) {
549      Builder.defineMacro("_MSC_EXTENSIONS");
550
551      if (Opts.CPlusPlus0x) {
552        Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
553        Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
554        Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
555      }
556    }
557
558    Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
559  }
560
561public:
562  WindowsTargetInfo(const std::string &triple)
563    : OSTargetInfo<Target>(triple) {}
564};
565
566} // end anonymous namespace.
567
568//===----------------------------------------------------------------------===//
569// Specific target implementations.
570//===----------------------------------------------------------------------===//
571
572namespace {
573// PPC abstract base class
574class PPCTargetInfo : public TargetInfo {
575  static const Builtin::Info BuiltinInfo[];
576  static const char * const GCCRegNames[];
577  static const TargetInfo::GCCRegAlias GCCRegAliases[];
578public:
579  PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
580    LongDoubleWidth = LongDoubleAlign = 128;
581    LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
582  }
583
584  virtual void getTargetBuiltins(const Builtin::Info *&Records,
585                                 unsigned &NumRecords) const {
586    Records = BuiltinInfo;
587    NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
588  }
589
590  virtual bool isCLZForZeroUndef() const { return false; }
591
592  virtual void getTargetDefines(const LangOptions &Opts,
593                                MacroBuilder &Builder) const;
594
595  virtual bool hasFeature(StringRef Feature) const;
596
597  virtual void getGCCRegNames(const char * const *&Names,
598                              unsigned &NumNames) const;
599  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
600                                unsigned &NumAliases) const;
601  virtual bool validateAsmConstraint(const char *&Name,
602                                     TargetInfo::ConstraintInfo &Info) const {
603    switch (*Name) {
604    default: return false;
605    case 'O': // Zero
606      break;
607    case 'b': // Base register
608    case 'f': // Floating point register
609      Info.setAllowsRegister();
610      break;
611    // FIXME: The following are added to allow parsing.
612    // I just took a guess at what the actions should be.
613    // Also, is more specific checking needed?  I.e. specific registers?
614    case 'd': // Floating point register (containing 64-bit value)
615    case 'v': // Altivec vector register
616      Info.setAllowsRegister();
617      break;
618    case 'w':
619      switch (Name[1]) {
620        case 'd':// VSX vector register to hold vector double data
621        case 'f':// VSX vector register to hold vector float data
622        case 's':// VSX vector register to hold scalar float data
623        case 'a':// Any VSX register
624          break;
625        default:
626          return false;
627      }
628      Info.setAllowsRegister();
629      Name++; // Skip over 'w'.
630      break;
631    case 'h': // `MQ', `CTR', or `LINK' register
632    case 'q': // `MQ' register
633    case 'c': // `CTR' register
634    case 'l': // `LINK' register
635    case 'x': // `CR' register (condition register) number 0
636    case 'y': // `CR' register (condition register)
637    case 'z': // `XER[CA]' carry bit (part of the XER register)
638      Info.setAllowsRegister();
639      break;
640    case 'I': // Signed 16-bit constant
641    case 'J': // Unsigned 16-bit constant shifted left 16 bits
642              //  (use `L' instead for SImode constants)
643    case 'K': // Unsigned 16-bit constant
644    case 'L': // Signed 16-bit constant shifted left 16 bits
645    case 'M': // Constant larger than 31
646    case 'N': // Exact power of 2
647    case 'P': // Constant whose negation is a signed 16-bit constant
648    case 'G': // Floating point constant that can be loaded into a
649              // register with one instruction per word
650    case 'H': // Integer/Floating point constant that can be loaded
651              // into a register using three instructions
652      break;
653    case 'm': // Memory operand. Note that on PowerPC targets, m can
654              // include addresses that update the base register. It
655              // is therefore only safe to use `m' in an asm statement
656              // if that asm statement accesses the operand exactly once.
657              // The asm statement must also use `%U<opno>' as a
658              // placeholder for the "update" flag in the corresponding
659              // load or store instruction. For example:
660              // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
661              // is correct but:
662              // asm ("st %1,%0" : "=m" (mem) : "r" (val));
663              // is not. Use es rather than m if you don't want the base
664              // register to be updated.
665    case 'e':
666      if (Name[1] != 's')
667          return false;
668              // es: A "stable" memory operand; that is, one which does not
669              // include any automodification of the base register. Unlike
670              // `m', this constraint can be used in asm statements that
671              // might access the operand several times, or that might not
672              // access it at all.
673      Info.setAllowsMemory();
674      Name++; // Skip over 'e'.
675      break;
676    case 'Q': // Memory operand that is an offset from a register (it is
677              // usually better to use `m' or `es' in asm statements)
678    case 'Z': // Memory operand that is an indexed or indirect from a
679              // register (it is usually better to use `m' or `es' in
680              // asm statements)
681      Info.setAllowsMemory();
682      Info.setAllowsRegister();
683      break;
684    case 'R': // AIX TOC entry
685    case 'a': // Address operand that is an indexed or indirect from a
686              // register (`p' is preferable for asm statements)
687    case 'S': // Constant suitable as a 64-bit mask operand
688    case 'T': // Constant suitable as a 32-bit mask operand
689    case 'U': // System V Release 4 small data area reference
690    case 't': // AND masks that can be performed by two rldic{l, r}
691              // instructions
692    case 'W': // Vector constant that does not require memory
693    case 'j': // Vector constant that is all zeros.
694      break;
695    // End FIXME.
696    }
697    return true;
698  }
699  virtual const char *getClobbers() const {
700    return "";
701  }
702};
703
704const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
705#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
706#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
707                                              ALL_LANGUAGES },
708#include "clang/Basic/BuiltinsPPC.def"
709};
710
711
712/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
713/// #defines that are not tied to a specific subtarget.
714void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
715                                     MacroBuilder &Builder) const {
716  // Target identification.
717  Builder.defineMacro("__ppc__");
718  Builder.defineMacro("_ARCH_PPC");
719  Builder.defineMacro("__powerpc__");
720  Builder.defineMacro("__POWERPC__");
721  if (PointerWidth == 64) {
722    Builder.defineMacro("_ARCH_PPC64");
723    Builder.defineMacro("_LP64");
724    Builder.defineMacro("__LP64__");
725    Builder.defineMacro("__powerpc64__");
726    Builder.defineMacro("__ppc64__");
727  } else {
728    Builder.defineMacro("__ppc__");
729  }
730
731  // Target properties.
732  if (getTriple().getOS() != llvm::Triple::NetBSD)
733    Builder.defineMacro("_BIG_ENDIAN");
734  Builder.defineMacro("__BIG_ENDIAN__");
735
736  // Subtarget options.
737  Builder.defineMacro("__NATURAL_ALIGNMENT__");
738  Builder.defineMacro("__REGISTER_PREFIX__", "");
739
740  // FIXME: Should be controlled by command line option.
741  Builder.defineMacro("__LONG_DOUBLE_128__");
742
743  if (Opts.AltiVec) {
744    Builder.defineMacro("__VEC__", "10206");
745    Builder.defineMacro("__ALTIVEC__");
746  }
747}
748
749bool PPCTargetInfo::hasFeature(StringRef Feature) const {
750  return Feature == "powerpc";
751}
752
753
754const char * const PPCTargetInfo::GCCRegNames[] = {
755  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
756  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
757  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
758  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
759  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
760  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
761  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
762  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
763  "mq", "lr", "ctr", "ap",
764  "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
765  "xer",
766  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
767  "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
768  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
769  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
770  "vrsave", "vscr",
771  "spe_acc", "spefscr",
772  "sfp"
773};
774
775void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
776                                   unsigned &NumNames) const {
777  Names = GCCRegNames;
778  NumNames = llvm::array_lengthof(GCCRegNames);
779}
780
781const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
782  // While some of these aliases do map to different registers
783  // they still share the same register name.
784  { { "0" }, "r0" },
785  { { "1"}, "r1" },
786  { { "2" }, "r2" },
787  { { "3" }, "r3" },
788  { { "4" }, "r4" },
789  { { "5" }, "r5" },
790  { { "6" }, "r6" },
791  { { "7" }, "r7" },
792  { { "8" }, "r8" },
793  { { "9" }, "r9" },
794  { { "10" }, "r10" },
795  { { "11" }, "r11" },
796  { { "12" }, "r12" },
797  { { "13" }, "r13" },
798  { { "14" }, "r14" },
799  { { "15" }, "r15" },
800  { { "16" }, "r16" },
801  { { "17" }, "r17" },
802  { { "18" }, "r18" },
803  { { "19" }, "r19" },
804  { { "20" }, "r20" },
805  { { "21" }, "r21" },
806  { { "22" }, "r22" },
807  { { "23" }, "r23" },
808  { { "24" }, "r24" },
809  { { "25" }, "r25" },
810  { { "26" }, "r26" },
811  { { "27" }, "r27" },
812  { { "28" }, "r28" },
813  { { "29" }, "r29" },
814  { { "30" }, "r30" },
815  { { "31" }, "r31" },
816  { { "fr0" }, "f0" },
817  { { "fr1" }, "f1" },
818  { { "fr2" }, "f2" },
819  { { "fr3" }, "f3" },
820  { { "fr4" }, "f4" },
821  { { "fr5" }, "f5" },
822  { { "fr6" }, "f6" },
823  { { "fr7" }, "f7" },
824  { { "fr8" }, "f8" },
825  { { "fr9" }, "f9" },
826  { { "fr10" }, "f10" },
827  { { "fr11" }, "f11" },
828  { { "fr12" }, "f12" },
829  { { "fr13" }, "f13" },
830  { { "fr14" }, "f14" },
831  { { "fr15" }, "f15" },
832  { { "fr16" }, "f16" },
833  { { "fr17" }, "f17" },
834  { { "fr18" }, "f18" },
835  { { "fr19" }, "f19" },
836  { { "fr20" }, "f20" },
837  { { "fr21" }, "f21" },
838  { { "fr22" }, "f22" },
839  { { "fr23" }, "f23" },
840  { { "fr24" }, "f24" },
841  { { "fr25" }, "f25" },
842  { { "fr26" }, "f26" },
843  { { "fr27" }, "f27" },
844  { { "fr28" }, "f28" },
845  { { "fr29" }, "f29" },
846  { { "fr30" }, "f30" },
847  { { "fr31" }, "f31" },
848  { { "cc" }, "cr0" },
849};
850
851void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
852                                     unsigned &NumAliases) const {
853  Aliases = GCCRegAliases;
854  NumAliases = llvm::array_lengthof(GCCRegAliases);
855}
856} // end anonymous namespace.
857
858namespace {
859class PPC32TargetInfo : public PPCTargetInfo {
860public:
861  PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
862    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
863                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
864
865    switch (getTriple().getOS()) {
866    case llvm::Triple::Linux:
867    case llvm::Triple::FreeBSD:
868    case llvm::Triple::NetBSD:
869      SizeType = UnsignedInt;
870      PtrDiffType = SignedInt;
871      IntPtrType = SignedInt;
872      break;
873    default:
874      break;
875    }
876
877    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
878      LongDoubleWidth = LongDoubleAlign = 64;
879      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
880    }
881  }
882
883  virtual const char *getVAListDeclaration() const {
884    // This is the ELF definition, and is overridden by the Darwin sub-target
885    return "typedef struct __va_list_tag {"
886           "  unsigned char gpr;"
887           "  unsigned char fpr;"
888           "  unsigned short reserved;"
889           "  void* overflow_arg_area;"
890           "  void* reg_save_area;"
891           "} __builtin_va_list[1];";
892  }
893};
894} // end anonymous namespace.
895
896namespace {
897class PPC64TargetInfo : public PPCTargetInfo {
898public:
899  PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
900    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
901    IntMaxType = SignedLong;
902    UIntMaxType = UnsignedLong;
903    Int64Type = SignedLong;
904    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
905                        "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
906
907    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
908      LongDoubleWidth = LongDoubleAlign = 64;
909      LongDoubleFormat = &llvm::APFloat::IEEEdouble;
910    }
911  }
912  virtual const char *getVAListDeclaration() const {
913    return "typedef char* __builtin_va_list;";
914  }
915};
916} // end anonymous namespace.
917
918
919namespace {
920class DarwinPPC32TargetInfo :
921  public DarwinTargetInfo<PPC32TargetInfo> {
922public:
923  DarwinPPC32TargetInfo(const std::string& triple)
924    : DarwinTargetInfo<PPC32TargetInfo>(triple) {
925    HasAlignMac68kSupport = true;
926    BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
927    LongLongAlign = 32;
928    SuitableAlign = 128;
929    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
930                        "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
931  }
932  virtual const char *getVAListDeclaration() const {
933    return "typedef char* __builtin_va_list;";
934  }
935};
936
937class DarwinPPC64TargetInfo :
938  public DarwinTargetInfo<PPC64TargetInfo> {
939public:
940  DarwinPPC64TargetInfo(const std::string& triple)
941    : DarwinTargetInfo<PPC64TargetInfo>(triple) {
942    HasAlignMac68kSupport = true;
943    SuitableAlign = 128;
944  }
945};
946} // end anonymous namespace.
947
948namespace {
949  static const unsigned NVPTXAddrSpaceMap[] = {
950    1,    // opencl_global
951    3,    // opencl_local
952    4,    // opencl_constant
953    1,    // cuda_device
954    4,    // cuda_constant
955    3,    // cuda_shared
956  };
957  class NVPTXTargetInfo : public TargetInfo {
958    static const char * const GCCRegNames[];
959    static const Builtin::Info BuiltinInfo[];
960    std::vector<llvm::StringRef> AvailableFeatures;
961  public:
962    NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
963      BigEndian = false;
964      TLSSupported = false;
965      LongWidth = LongAlign = 64;
966      AddrSpaceMap = &NVPTXAddrSpaceMap;
967      // Define available target features
968      // These must be defined in sorted order!
969    }
970    virtual void getTargetDefines(const LangOptions &Opts,
971                                  MacroBuilder &Builder) const {
972      Builder.defineMacro("__PTX__");
973      Builder.defineMacro("__NVPTX__");
974    }
975    virtual void getTargetBuiltins(const Builtin::Info *&Records,
976                                   unsigned &NumRecords) const {
977      Records = BuiltinInfo;
978      NumRecords = clang::NVPTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
979    }
980    virtual bool hasFeature(StringRef Feature) const {
981      return Feature == "ptx" || Feature == "nvptx";
982    }
983
984    virtual void getGCCRegNames(const char * const *&Names,
985                                unsigned &NumNames) const;
986    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
987                                  unsigned &NumAliases) const {
988      // No aliases.
989      Aliases = 0;
990      NumAliases = 0;
991    }
992    virtual bool validateAsmConstraint(const char *&Name,
993                                       TargetInfo::ConstraintInfo &info) const {
994      // FIXME: implement
995      return true;
996    }
997    virtual const char *getClobbers() const {
998      // FIXME: Is this really right?
999      return "";
1000    }
1001    virtual const char *getVAListDeclaration() const {
1002      // FIXME: implement
1003      return "typedef char* __builtin_va_list;";
1004    }
1005    virtual bool setCPU(const std::string &Name) {
1006      return Name == "sm_10" || Name == "sm_13" || Name == "sm_20";
1007    }
1008    virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1009                                   StringRef Name,
1010                                   bool Enabled) const;
1011  };
1012
1013  const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = {
1014#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1015#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1016                                              ALL_LANGUAGES },
1017#include "clang/Basic/BuiltinsNVPTX.def"
1018  };
1019
1020  const char * const NVPTXTargetInfo::GCCRegNames[] = {
1021    "r0"
1022  };
1023
1024  void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names,
1025                                     unsigned &NumNames) const {
1026    Names = GCCRegNames;
1027    NumNames = llvm::array_lengthof(GCCRegNames);
1028  }
1029
1030  bool NVPTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1031                                          StringRef Name,
1032                                          bool Enabled) const {
1033    if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1034                          Name)) {
1035      Features[Name] = Enabled;
1036      return true;
1037    } else {
1038      return false;
1039    }
1040  }
1041
1042  class NVPTX32TargetInfo : public NVPTXTargetInfo {
1043  public:
1044    NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1045      PointerWidth = PointerAlign = 32;
1046      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1047      DescriptionString
1048        = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1049          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1050          "n16:32:64";
1051  }
1052  };
1053
1054  class NVPTX64TargetInfo : public NVPTXTargetInfo {
1055  public:
1056    NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1057      PointerWidth = PointerAlign = 64;
1058      SizeType     = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1059      DescriptionString
1060        = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1061          "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1062          "n16:32:64";
1063  }
1064  };
1065}
1066
1067namespace {
1068// MBlaze abstract base class
1069class MBlazeTargetInfo : public TargetInfo {
1070  static const char * const GCCRegNames[];
1071  static const TargetInfo::GCCRegAlias GCCRegAliases[];
1072
1073public:
1074  MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1075    DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1076  }
1077
1078  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1079                                 unsigned &NumRecords) const {
1080    // FIXME: Implement.
1081    Records = 0;
1082    NumRecords = 0;
1083  }
1084
1085  virtual void getTargetDefines(const LangOptions &Opts,
1086                                MacroBuilder &Builder) const;
1087
1088  virtual bool hasFeature(StringRef Feature) const {
1089    return Feature == "mblaze";
1090  }
1091
1092  virtual const char *getVAListDeclaration() const {
1093    return "typedef char* __builtin_va_list;";
1094  }
1095  virtual const char *getTargetPrefix() const {
1096    return "mblaze";
1097  }
1098  virtual void getGCCRegNames(const char * const *&Names,
1099                              unsigned &NumNames) const;
1100  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1101                                unsigned &NumAliases) const;
1102  virtual bool validateAsmConstraint(const char *&Name,
1103                                     TargetInfo::ConstraintInfo &Info) const {
1104    switch (*Name) {
1105    default: return false;
1106    case 'O': // Zero
1107      return true;
1108    case 'b': // Base register
1109    case 'f': // Floating point register
1110      Info.setAllowsRegister();
1111      return true;
1112    }
1113  }
1114  virtual const char *getClobbers() const {
1115    return "";
1116  }
1117};
1118
1119/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1120/// #defines that are not tied to a specific subtarget.
1121void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1122                                     MacroBuilder &Builder) const {
1123  // Target identification.
1124  Builder.defineMacro("__microblaze__");
1125  Builder.defineMacro("_ARCH_MICROBLAZE");
1126  Builder.defineMacro("__MICROBLAZE__");
1127
1128  // Target properties.
1129  Builder.defineMacro("_BIG_ENDIAN");
1130  Builder.defineMacro("__BIG_ENDIAN__");
1131
1132  // Subtarget options.
1133  Builder.defineMacro("__REGISTER_PREFIX__", "");
1134}
1135
1136
1137const char * const MBlazeTargetInfo::GCCRegNames[] = {
1138  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
1139  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
1140  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
1141  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
1142  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
1143  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1144  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1145  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1146  "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1147  "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
1148};
1149
1150void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1151                                   unsigned &NumNames) const {
1152  Names = GCCRegNames;
1153  NumNames = llvm::array_lengthof(GCCRegNames);
1154}
1155
1156const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1157  { {"f0"},  "r0" },
1158  { {"f1"},  "r1" },
1159  { {"f2"},  "r2" },
1160  { {"f3"},  "r3" },
1161  { {"f4"},  "r4" },
1162  { {"f5"},  "r5" },
1163  { {"f6"},  "r6" },
1164  { {"f7"},  "r7" },
1165  { {"f8"},  "r8" },
1166  { {"f9"},  "r9" },
1167  { {"f10"}, "r10" },
1168  { {"f11"}, "r11" },
1169  { {"f12"}, "r12" },
1170  { {"f13"}, "r13" },
1171  { {"f14"}, "r14" },
1172  { {"f15"}, "r15" },
1173  { {"f16"}, "r16" },
1174  { {"f17"}, "r17" },
1175  { {"f18"}, "r18" },
1176  { {"f19"}, "r19" },
1177  { {"f20"}, "r20" },
1178  { {"f21"}, "r21" },
1179  { {"f22"}, "r22" },
1180  { {"f23"}, "r23" },
1181  { {"f24"}, "r24" },
1182  { {"f25"}, "r25" },
1183  { {"f26"}, "r26" },
1184  { {"f27"}, "r27" },
1185  { {"f28"}, "r28" },
1186  { {"f29"}, "r29" },
1187  { {"f30"}, "r30" },
1188  { {"f31"}, "r31" },
1189};
1190
1191void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1192                                     unsigned &NumAliases) const {
1193  Aliases = GCCRegAliases;
1194  NumAliases = llvm::array_lengthof(GCCRegAliases);
1195}
1196} // end anonymous namespace.
1197
1198namespace {
1199// Namespace for x86 abstract base class
1200const Builtin::Info BuiltinInfo[] = {
1201#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1202#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1203                                              ALL_LANGUAGES },
1204#include "clang/Basic/BuiltinsX86.def"
1205};
1206
1207static const char* const GCCRegNames[] = {
1208  "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1209  "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1210  "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1211  "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1212  "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1213  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1214  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1215  "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1216  "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1217};
1218
1219const TargetInfo::AddlRegName AddlRegNames[] = {
1220  { { "al", "ah", "eax", "rax" }, 0 },
1221  { { "bl", "bh", "ebx", "rbx" }, 3 },
1222  { { "cl", "ch", "ecx", "rcx" }, 2 },
1223  { { "dl", "dh", "edx", "rdx" }, 1 },
1224  { { "esi", "rsi" }, 4 },
1225  { { "edi", "rdi" }, 5 },
1226  { { "esp", "rsp" }, 7 },
1227  { { "ebp", "rbp" }, 6 },
1228};
1229
1230// X86 target abstract base class; x86-32 and x86-64 are very close, so
1231// most of the implementation can be shared.
1232class X86TargetInfo : public TargetInfo {
1233  enum X86SSEEnum {
1234    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1235  } SSELevel;
1236  enum MMX3DNowEnum {
1237    NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1238  } MMX3DNowLevel;
1239
1240  bool HasAES;
1241  bool HasPCLMUL;
1242  bool HasLZCNT;
1243  bool HasBMI;
1244  bool HasBMI2;
1245  bool HasPOPCNT;
1246  bool HasSSE4a;
1247  bool HasFMA4;
1248  bool HasFMA;
1249
1250  /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1251  ///
1252  /// Each enumeration represents a particular CPU supported by Clang. These
1253  /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1254  enum CPUKind {
1255    CK_Generic,
1256
1257    /// \name i386
1258    /// i386-generation processors.
1259    //@{
1260    CK_i386,
1261    //@}
1262
1263    /// \name i486
1264    /// i486-generation processors.
1265    //@{
1266    CK_i486,
1267    CK_WinChipC6,
1268    CK_WinChip2,
1269    CK_C3,
1270    //@}
1271
1272    /// \name i586
1273    /// i586-generation processors, P5 microarchitecture based.
1274    //@{
1275    CK_i586,
1276    CK_Pentium,
1277    CK_PentiumMMX,
1278    //@}
1279
1280    /// \name i686
1281    /// i686-generation processors, P6 / Pentium M microarchitecture based.
1282    //@{
1283    CK_i686,
1284    CK_PentiumPro,
1285    CK_Pentium2,
1286    CK_Pentium3,
1287    CK_Pentium3M,
1288    CK_PentiumM,
1289    CK_C3_2,
1290
1291    /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1292    /// Clang however has some logic to suport this.
1293    // FIXME: Warn, deprecate, and potentially remove this.
1294    CK_Yonah,
1295    //@}
1296
1297    /// \name Netburst
1298    /// Netburst microarchitecture based processors.
1299    //@{
1300    CK_Pentium4,
1301    CK_Pentium4M,
1302    CK_Prescott,
1303    CK_Nocona,
1304    //@}
1305
1306    /// \name Core
1307    /// Core microarchitecture based processors.
1308    //@{
1309    CK_Core2,
1310
1311    /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1312    /// codename which GCC no longer accepts as an option to -march, but Clang
1313    /// has some logic for recognizing it.
1314    // FIXME: Warn, deprecate, and potentially remove this.
1315    CK_Penryn,
1316    //@}
1317
1318    /// \name Atom
1319    /// Atom processors
1320    //@{
1321    CK_Atom,
1322    //@}
1323
1324    /// \name Nehalem
1325    /// Nehalem microarchitecture based processors.
1326    //@{
1327    CK_Corei7,
1328    CK_Corei7AVX,
1329    CK_CoreAVXi,
1330    CK_CoreAVX2,
1331    //@}
1332
1333    /// \name K6
1334    /// K6 architecture processors.
1335    //@{
1336    CK_K6,
1337    CK_K6_2,
1338    CK_K6_3,
1339    //@}
1340
1341    /// \name K7
1342    /// K7 architecture processors.
1343    //@{
1344    CK_Athlon,
1345    CK_AthlonThunderbird,
1346    CK_Athlon4,
1347    CK_AthlonXP,
1348    CK_AthlonMP,
1349    //@}
1350
1351    /// \name K8
1352    /// K8 architecture processors.
1353    //@{
1354    CK_Athlon64,
1355    CK_Athlon64SSE3,
1356    CK_AthlonFX,
1357    CK_K8,
1358    CK_K8SSE3,
1359    CK_Opteron,
1360    CK_OpteronSSE3,
1361    CK_AMDFAM10,
1362    //@}
1363
1364    /// \name Bobcat
1365    /// Bobcat architecture processors.
1366    //@{
1367    CK_BTVER1,
1368    //@}
1369
1370    /// \name Bulldozer
1371    /// Bulldozer architecture processors.
1372    //@{
1373    CK_BDVER1,
1374    CK_BDVER2,
1375    //@}
1376
1377    /// This specification is deprecated and will be removed in the future.
1378    /// Users should prefer \see CK_K8.
1379    // FIXME: Warn on this when the CPU is set to it.
1380    CK_x86_64,
1381    //@}
1382
1383    /// \name Geode
1384    /// Geode processors.
1385    //@{
1386    CK_Geode
1387    //@}
1388  } CPU;
1389
1390public:
1391  X86TargetInfo(const std::string& triple)
1392    : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1393      HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasBMI(false),
1394      HasBMI2(false), HasPOPCNT(false), HasSSE4a(false), HasFMA4(false),
1395      HasFMA(false), CPU(CK_Generic) {
1396    BigEndian = false;
1397    LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1398  }
1399  virtual unsigned getFloatEvalMethod() const {
1400    // X87 evaluates with 80 bits "long double" precision.
1401    return SSELevel == NoSSE ? 2 : 0;
1402  }
1403  virtual void getTargetBuiltins(const Builtin::Info *&Records,
1404                                 unsigned &NumRecords) const {
1405    Records = BuiltinInfo;
1406    NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1407  }
1408  virtual void getGCCRegNames(const char * const *&Names,
1409                              unsigned &NumNames) const {
1410    Names = GCCRegNames;
1411    NumNames = llvm::array_lengthof(GCCRegNames);
1412  }
1413  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1414                                unsigned &NumAliases) const {
1415    Aliases = 0;
1416    NumAliases = 0;
1417  }
1418  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1419				  unsigned &NumNames) const {
1420    Names = AddlRegNames;
1421    NumNames = llvm::array_lengthof(AddlRegNames);
1422  }
1423  virtual bool validateAsmConstraint(const char *&Name,
1424                                     TargetInfo::ConstraintInfo &info) const;
1425  virtual std::string convertConstraint(const char *&Constraint) const;
1426  virtual const char *getClobbers() const {
1427    return "~{dirflag},~{fpsr},~{flags}";
1428  }
1429  virtual void getTargetDefines(const LangOptions &Opts,
1430                                MacroBuilder &Builder) const;
1431  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1432                                 StringRef Name,
1433                                 bool Enabled) const;
1434  virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1435  virtual bool hasFeature(StringRef Feature) const;
1436  virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1437  virtual const char* getABI() const {
1438    if (PointerWidth == 64 && SSELevel >= AVX)
1439      return "avx";
1440    else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow)
1441      return "no-mmx";
1442    return "";
1443  }
1444  virtual bool setCPU(const std::string &Name) {
1445    CPU = llvm::StringSwitch<CPUKind>(Name)
1446      .Case("i386", CK_i386)
1447      .Case("i486", CK_i486)
1448      .Case("winchip-c6", CK_WinChipC6)
1449      .Case("winchip2", CK_WinChip2)
1450      .Case("c3", CK_C3)
1451      .Case("i586", CK_i586)
1452      .Case("pentium", CK_Pentium)
1453      .Case("pentium-mmx", CK_PentiumMMX)
1454      .Case("i686", CK_i686)
1455      .Case("pentiumpro", CK_PentiumPro)
1456      .Case("pentium2", CK_Pentium2)
1457      .Case("pentium3", CK_Pentium3)
1458      .Case("pentium3m", CK_Pentium3M)
1459      .Case("pentium-m", CK_PentiumM)
1460      .Case("c3-2", CK_C3_2)
1461      .Case("yonah", CK_Yonah)
1462      .Case("pentium4", CK_Pentium4)
1463      .Case("pentium4m", CK_Pentium4M)
1464      .Case("prescott", CK_Prescott)
1465      .Case("nocona", CK_Nocona)
1466      .Case("core2", CK_Core2)
1467      .Case("penryn", CK_Penryn)
1468      .Case("atom", CK_Atom)
1469      .Case("corei7", CK_Corei7)
1470      .Case("corei7-avx", CK_Corei7AVX)
1471      .Case("core-avx-i", CK_CoreAVXi)
1472      .Case("core-avx2", CK_CoreAVX2)
1473      .Case("k6", CK_K6)
1474      .Case("k6-2", CK_K6_2)
1475      .Case("k6-3", CK_K6_3)
1476      .Case("athlon", CK_Athlon)
1477      .Case("athlon-tbird", CK_AthlonThunderbird)
1478      .Case("athlon-4", CK_Athlon4)
1479      .Case("athlon-xp", CK_AthlonXP)
1480      .Case("athlon-mp", CK_AthlonMP)
1481      .Case("athlon64", CK_Athlon64)
1482      .Case("athlon64-sse3", CK_Athlon64SSE3)
1483      .Case("athlon-fx", CK_AthlonFX)
1484      .Case("k8", CK_K8)
1485      .Case("k8-sse3", CK_K8SSE3)
1486      .Case("opteron", CK_Opteron)
1487      .Case("opteron-sse3", CK_OpteronSSE3)
1488      .Case("amdfam10", CK_AMDFAM10)
1489      .Case("btver1", CK_BTVER1)
1490      .Case("bdver1", CK_BDVER1)
1491      .Case("bdver2", CK_BDVER2)
1492      .Case("x86-64", CK_x86_64)
1493      .Case("geode", CK_Geode)
1494      .Default(CK_Generic);
1495
1496    // Perform any per-CPU checks necessary to determine if this CPU is
1497    // acceptable.
1498    // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1499    // invalid without explaining *why*.
1500    switch (CPU) {
1501    case CK_Generic:
1502      // No processor selected!
1503      return false;
1504
1505    case CK_i386:
1506    case CK_i486:
1507    case CK_WinChipC6:
1508    case CK_WinChip2:
1509    case CK_C3:
1510    case CK_i586:
1511    case CK_Pentium:
1512    case CK_PentiumMMX:
1513    case CK_i686:
1514    case CK_PentiumPro:
1515    case CK_Pentium2:
1516    case CK_Pentium3:
1517    case CK_Pentium3M:
1518    case CK_PentiumM:
1519    case CK_Yonah:
1520    case CK_C3_2:
1521    case CK_Pentium4:
1522    case CK_Pentium4M:
1523    case CK_Prescott:
1524    case CK_K6:
1525    case CK_K6_2:
1526    case CK_K6_3:
1527    case CK_Athlon:
1528    case CK_AthlonThunderbird:
1529    case CK_Athlon4:
1530    case CK_AthlonXP:
1531    case CK_AthlonMP:
1532    case CK_Geode:
1533      // Only accept certain architectures when compiling in 32-bit mode.
1534      if (PointerWidth != 32)
1535        return false;
1536
1537      // Fallthrough
1538    case CK_Nocona:
1539    case CK_Core2:
1540    case CK_Penryn:
1541    case CK_Atom:
1542    case CK_Corei7:
1543    case CK_Corei7AVX:
1544    case CK_CoreAVXi:
1545    case CK_CoreAVX2:
1546    case CK_Athlon64:
1547    case CK_Athlon64SSE3:
1548    case CK_AthlonFX:
1549    case CK_K8:
1550    case CK_K8SSE3:
1551    case CK_Opteron:
1552    case CK_OpteronSSE3:
1553    case CK_AMDFAM10:
1554    case CK_BTVER1:
1555    case CK_BDVER1:
1556    case CK_BDVER2:
1557    case CK_x86_64:
1558      return true;
1559    }
1560    llvm_unreachable("Unhandled CPU kind");
1561  }
1562};
1563
1564void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1565  // FIXME: This should not be here.
1566  Features["3dnow"] = false;
1567  Features["3dnowa"] = false;
1568  Features["mmx"] = false;
1569  Features["sse"] = false;
1570  Features["sse2"] = false;
1571  Features["sse3"] = false;
1572  Features["ssse3"] = false;
1573  Features["sse41"] = false;
1574  Features["sse42"] = false;
1575  Features["sse4a"] = false;
1576  Features["aes"] = false;
1577  Features["pclmul"] = false;
1578  Features["avx"] = false;
1579  Features["avx2"] = false;
1580  Features["lzcnt"] = false;
1581  Features["bmi"] = false;
1582  Features["bmi2"] = false;
1583  Features["popcnt"] = false;
1584  Features["fma4"] = false;
1585  Features["fma"] = false;
1586
1587  // FIXME: This *really* should not be here.
1588
1589  // X86_64 always has SSE2.
1590  if (PointerWidth == 64)
1591    Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1592
1593  switch (CPU) {
1594  case CK_Generic:
1595  case CK_i386:
1596  case CK_i486:
1597  case CK_i586:
1598  case CK_Pentium:
1599  case CK_i686:
1600  case CK_PentiumPro:
1601    break;
1602  case CK_PentiumMMX:
1603  case CK_Pentium2:
1604    setFeatureEnabled(Features, "mmx", true);
1605    break;
1606  case CK_Pentium3:
1607  case CK_Pentium3M:
1608    setFeatureEnabled(Features, "mmx", true);
1609    setFeatureEnabled(Features, "sse", true);
1610    break;
1611  case CK_PentiumM:
1612  case CK_Pentium4:
1613  case CK_Pentium4M:
1614  case CK_x86_64:
1615    setFeatureEnabled(Features, "mmx", true);
1616    setFeatureEnabled(Features, "sse2", true);
1617    break;
1618  case CK_Yonah:
1619  case CK_Prescott:
1620  case CK_Nocona:
1621    setFeatureEnabled(Features, "mmx", true);
1622    setFeatureEnabled(Features, "sse3", true);
1623    break;
1624  case CK_Core2:
1625    setFeatureEnabled(Features, "mmx", true);
1626    setFeatureEnabled(Features, "ssse3", true);
1627    break;
1628  case CK_Penryn:
1629    setFeatureEnabled(Features, "mmx", true);
1630    setFeatureEnabled(Features, "sse4.1", true);
1631    break;
1632  case CK_Atom:
1633    setFeatureEnabled(Features, "mmx", true);
1634    setFeatureEnabled(Features, "ssse3", true);
1635    break;
1636  case CK_Corei7:
1637    setFeatureEnabled(Features, "mmx", true);
1638    setFeatureEnabled(Features, "sse4", true);
1639    break;
1640  case CK_Corei7AVX:
1641  case CK_CoreAVXi:
1642    setFeatureEnabled(Features, "mmx", true);
1643    setFeatureEnabled(Features, "avx", true);
1644    setFeatureEnabled(Features, "aes", true);
1645    setFeatureEnabled(Features, "pclmul", true);
1646    break;
1647  case CK_CoreAVX2:
1648    setFeatureEnabled(Features, "mmx", true);
1649    setFeatureEnabled(Features, "avx2", true);
1650    setFeatureEnabled(Features, "aes", true);
1651    setFeatureEnabled(Features, "pclmul", true);
1652    setFeatureEnabled(Features, "lzcnt", true);
1653    setFeatureEnabled(Features, "bmi", true);
1654    setFeatureEnabled(Features, "bmi2", true);
1655    setFeatureEnabled(Features, "fma", true);
1656    break;
1657  case CK_K6:
1658  case CK_WinChipC6:
1659    setFeatureEnabled(Features, "mmx", true);
1660    break;
1661  case CK_K6_2:
1662  case CK_K6_3:
1663  case CK_WinChip2:
1664  case CK_C3:
1665    setFeatureEnabled(Features, "3dnow", true);
1666    break;
1667  case CK_Athlon:
1668  case CK_AthlonThunderbird:
1669  case CK_Geode:
1670    setFeatureEnabled(Features, "3dnowa", true);
1671    break;
1672  case CK_Athlon4:
1673  case CK_AthlonXP:
1674  case CK_AthlonMP:
1675    setFeatureEnabled(Features, "sse", true);
1676    setFeatureEnabled(Features, "3dnowa", true);
1677    break;
1678  case CK_K8:
1679  case CK_Opteron:
1680  case CK_Athlon64:
1681  case CK_AthlonFX:
1682    setFeatureEnabled(Features, "sse2", true);
1683    setFeatureEnabled(Features, "3dnowa", true);
1684    break;
1685  case CK_K8SSE3:
1686  case CK_OpteronSSE3:
1687  case CK_Athlon64SSE3:
1688    setFeatureEnabled(Features, "sse3", true);
1689    setFeatureEnabled(Features, "3dnowa", true);
1690    break;
1691  case CK_AMDFAM10:
1692    setFeatureEnabled(Features, "sse3", true);
1693    setFeatureEnabled(Features, "sse4a", true);
1694    setFeatureEnabled(Features, "3dnowa", true);
1695    break;
1696  case CK_BTVER1:
1697    setFeatureEnabled(Features, "ssse3", true);
1698    setFeatureEnabled(Features, "sse4a", true);
1699    break;
1700  case CK_BDVER1:
1701  case CK_BDVER2:
1702    setFeatureEnabled(Features, "avx", true);
1703    setFeatureEnabled(Features, "sse4a", true);
1704    setFeatureEnabled(Features, "aes", true);
1705    setFeatureEnabled(Features, "pclmul", true);
1706    break;
1707  case CK_C3_2:
1708    setFeatureEnabled(Features, "mmx", true);
1709    setFeatureEnabled(Features, "sse", true);
1710    break;
1711  }
1712}
1713
1714bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1715                                      StringRef Name,
1716                                      bool Enabled) const {
1717  // FIXME: This *really* should not be here.  We need some way of translating
1718  // options into llvm subtarget features.
1719  if (!Features.count(Name) &&
1720      (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1721    return false;
1722
1723  // FIXME: this should probably use a switch with fall through.
1724
1725  if (Enabled) {
1726    if (Name == "mmx")
1727      Features["mmx"] = true;
1728    else if (Name == "sse")
1729      Features["mmx"] = Features["sse"] = true;
1730    else if (Name == "sse2")
1731      Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1732    else if (Name == "sse3")
1733      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1734        true;
1735    else if (Name == "ssse3")
1736      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1737        Features["ssse3"] = true;
1738    else if (Name == "sse4" || Name == "sse4.2")
1739      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1740        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1741        Features["popcnt"] = true;
1742    else if (Name == "sse4.1")
1743      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1744        Features["ssse3"] = Features["sse41"] = true;
1745    else if (Name == "3dnow")
1746      Features["mmx"] = Features["3dnow"] = true;
1747    else if (Name == "3dnowa")
1748      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
1749    else if (Name == "aes")
1750      Features["aes"] = true;
1751    else if (Name == "pclmul")
1752      Features["pclmul"] = true;
1753    else if (Name == "avx")
1754      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1755        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1756        Features["popcnt"] = Features["avx"] = true;
1757    else if (Name == "avx2")
1758      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1759        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1760        Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
1761    else if (Name == "fma")
1762      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1763        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1764        Features["popcnt"] = Features["avx"] = Features["fma"] = true;
1765    else if (Name == "fma4")
1766        Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1767        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1768        Features["popcnt"] = Features["avx"] = Features["sse4a"] =
1769        Features["fma4"] = true;
1770    else if (Name == "sse4a")
1771      Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1772        Features["sse4a"] = true;
1773    else if (Name == "lzcnt")
1774      Features["lzcnt"] = true;
1775    else if (Name == "bmi")
1776      Features["bmi"] = true;
1777    else if (Name == "bmi2")
1778      Features["bmi2"] = true;
1779    else if (Name == "popcnt")
1780      Features["popcnt"] = true;
1781  } else {
1782    if (Name == "mmx")
1783      Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
1784    else if (Name == "sse")
1785      Features["sse"] = Features["sse2"] = Features["sse3"] =
1786        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1787        Features["sse4a"] = false;
1788    else if (Name == "sse2")
1789      Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1790        Features["sse41"] = Features["sse42"] = Features["sse4a"] = false;
1791    else if (Name == "sse3")
1792      Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1793        Features["sse42"] = Features["sse4a"] = false;
1794    else if (Name == "ssse3")
1795      Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1796    else if (Name == "sse4" || Name == "sse4.1")
1797      Features["sse41"] = Features["sse42"] = false;
1798    else if (Name == "sse4.2")
1799      Features["sse42"] = false;
1800    else if (Name == "3dnow")
1801      Features["3dnow"] = Features["3dnowa"] = false;
1802    else if (Name == "3dnowa")
1803      Features["3dnowa"] = false;
1804    else if (Name == "aes")
1805      Features["aes"] = false;
1806    else if (Name == "pclmul")
1807      Features["pclmul"] = false;
1808    else if (Name == "avx")
1809      Features["avx"] = Features["avx2"] = Features["fma"] =
1810        Features["fma4"] = false;
1811    else if (Name == "avx2")
1812      Features["avx2"] = false;
1813    else if (Name == "fma")
1814      Features["fma"] = false;
1815    else if (Name == "sse4a")
1816      Features["sse4a"] = Features["fma4"] = false;
1817    else if (Name == "lzcnt")
1818      Features["lzcnt"] = false;
1819    else if (Name == "bmi")
1820      Features["bmi"] = false;
1821    else if (Name == "bmi2")
1822      Features["bmi2"] = false;
1823    else if (Name == "popcnt")
1824      Features["popcnt"] = false;
1825    else if (Name == "fma4")
1826      Features["fma4"] = false;
1827  }
1828
1829  return true;
1830}
1831
1832/// HandleTargetOptions - Perform initialization based on the user
1833/// configured set of features.
1834void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1835  // Remember the maximum enabled sselevel.
1836  for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1837    // Ignore disabled features.
1838    if (Features[i][0] == '-')
1839      continue;
1840
1841    StringRef Feature = StringRef(Features[i]).substr(1);
1842
1843    if (Feature == "aes") {
1844      HasAES = true;
1845      continue;
1846    }
1847
1848    if (Feature == "pclmul") {
1849      HasPCLMUL = true;
1850      continue;
1851    }
1852
1853    if (Feature == "lzcnt") {
1854      HasLZCNT = true;
1855      continue;
1856    }
1857
1858    if (Feature == "bmi") {
1859      HasBMI = true;
1860      continue;
1861    }
1862
1863    if (Feature == "bmi2") {
1864      HasBMI2 = true;
1865      continue;
1866    }
1867
1868    if (Feature == "popcnt") {
1869      HasPOPCNT = true;
1870      continue;
1871    }
1872
1873    if (Feature == "sse4a") {
1874      HasSSE4a = true;
1875      continue;
1876    }
1877
1878    if (Feature == "fma4") {
1879      HasFMA4 = true;
1880      continue;
1881    }
1882
1883    if (Feature == "fma") {
1884      HasFMA = true;
1885      continue;
1886    }
1887
1888    assert(Features[i][0] == '+' && "Invalid target feature!");
1889    X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
1890      .Case("avx2", AVX2)
1891      .Case("avx", AVX)
1892      .Case("sse42", SSE42)
1893      .Case("sse41", SSE41)
1894      .Case("ssse3", SSSE3)
1895      .Case("sse3", SSE3)
1896      .Case("sse2", SSE2)
1897      .Case("sse", SSE1)
1898      .Default(NoSSE);
1899    SSELevel = std::max(SSELevel, Level);
1900
1901    MMX3DNowEnum ThreeDNowLevel =
1902      llvm::StringSwitch<MMX3DNowEnum>(Feature)
1903        .Case("3dnowa", AMD3DNowAthlon)
1904        .Case("3dnow", AMD3DNow)
1905        .Case("mmx", MMX)
1906        .Default(NoMMX3DNow);
1907
1908    MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
1909  }
1910
1911  // Don't tell the backend if we're turning off mmx; it will end up disabling
1912  // SSE, which we don't want.
1913  std::vector<std::string>::iterator it;
1914  it = std::find(Features.begin(), Features.end(), "-mmx");
1915  if (it != Features.end())
1916    Features.erase(it);
1917}
1918
1919/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
1920/// definitions for this particular subtarget.
1921void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1922                                     MacroBuilder &Builder) const {
1923  // Target identification.
1924  if (PointerWidth == 64) {
1925    if (getLongWidth() == 64) {
1926      Builder.defineMacro("_LP64");
1927      Builder.defineMacro("__LP64__");
1928    }
1929    Builder.defineMacro("__amd64__");
1930    Builder.defineMacro("__amd64");
1931    Builder.defineMacro("__x86_64");
1932    Builder.defineMacro("__x86_64__");
1933  } else {
1934    DefineStd(Builder, "i386", Opts);
1935  }
1936
1937  // Subtarget options.
1938  // FIXME: We are hard-coding the tune parameters based on the CPU, but they
1939  // truly should be based on -mtune options.
1940  switch (CPU) {
1941  case CK_Generic:
1942    break;
1943  case CK_i386:
1944    // The rest are coming from the i386 define above.
1945    Builder.defineMacro("__tune_i386__");
1946    break;
1947  case CK_i486:
1948  case CK_WinChipC6:
1949  case CK_WinChip2:
1950  case CK_C3:
1951    defineCPUMacros(Builder, "i486");
1952    break;
1953  case CK_PentiumMMX:
1954    Builder.defineMacro("__pentium_mmx__");
1955    Builder.defineMacro("__tune_pentium_mmx__");
1956    // Fallthrough
1957  case CK_i586:
1958  case CK_Pentium:
1959    defineCPUMacros(Builder, "i586");
1960    defineCPUMacros(Builder, "pentium");
1961    break;
1962  case CK_Pentium3:
1963  case CK_Pentium3M:
1964  case CK_PentiumM:
1965    Builder.defineMacro("__tune_pentium3__");
1966    // Fallthrough
1967  case CK_Pentium2:
1968  case CK_C3_2:
1969    Builder.defineMacro("__tune_pentium2__");
1970    // Fallthrough
1971  case CK_PentiumPro:
1972    Builder.defineMacro("__tune_i686__");
1973    Builder.defineMacro("__tune_pentiumpro__");
1974    // Fallthrough
1975  case CK_i686:
1976    Builder.defineMacro("__i686");
1977    Builder.defineMacro("__i686__");
1978    // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
1979    Builder.defineMacro("__pentiumpro");
1980    Builder.defineMacro("__pentiumpro__");
1981    break;
1982  case CK_Pentium4:
1983  case CK_Pentium4M:
1984    defineCPUMacros(Builder, "pentium4");
1985    break;
1986  case CK_Yonah:
1987  case CK_Prescott:
1988  case CK_Nocona:
1989    defineCPUMacros(Builder, "nocona");
1990    break;
1991  case CK_Core2:
1992  case CK_Penryn:
1993    defineCPUMacros(Builder, "core2");
1994    break;
1995  case CK_Atom:
1996    defineCPUMacros(Builder, "atom");
1997    break;
1998  case CK_Corei7:
1999  case CK_Corei7AVX:
2000  case CK_CoreAVXi:
2001  case CK_CoreAVX2:
2002    defineCPUMacros(Builder, "corei7");
2003    break;
2004  case CK_K6_2:
2005    Builder.defineMacro("__k6_2__");
2006    Builder.defineMacro("__tune_k6_2__");
2007    // Fallthrough
2008  case CK_K6_3:
2009    if (CPU != CK_K6_2) {  // In case of fallthrough
2010      // FIXME: GCC may be enabling these in cases where some other k6
2011      // architecture is specified but -m3dnow is explicitly provided. The
2012      // exact semantics need to be determined and emulated here.
2013      Builder.defineMacro("__k6_3__");
2014      Builder.defineMacro("__tune_k6_3__");
2015    }
2016    // Fallthrough
2017  case CK_K6:
2018    defineCPUMacros(Builder, "k6");
2019    break;
2020  case CK_Athlon:
2021  case CK_AthlonThunderbird:
2022  case CK_Athlon4:
2023  case CK_AthlonXP:
2024  case CK_AthlonMP:
2025    defineCPUMacros(Builder, "athlon");
2026    if (SSELevel != NoSSE) {
2027      Builder.defineMacro("__athlon_sse__");
2028      Builder.defineMacro("__tune_athlon_sse__");
2029    }
2030    break;
2031  case CK_K8:
2032  case CK_K8SSE3:
2033  case CK_x86_64:
2034  case CK_Opteron:
2035  case CK_OpteronSSE3:
2036  case CK_Athlon64:
2037  case CK_Athlon64SSE3:
2038  case CK_AthlonFX:
2039    defineCPUMacros(Builder, "k8");
2040    break;
2041  case CK_AMDFAM10:
2042    defineCPUMacros(Builder, "amdfam10");
2043    break;
2044  case CK_BTVER1:
2045    defineCPUMacros(Builder, "btver1");
2046    break;
2047  case CK_BDVER1:
2048    defineCPUMacros(Builder, "bdver1");
2049    break;
2050  case CK_BDVER2:
2051    defineCPUMacros(Builder, "bdver2");
2052    break;
2053  case CK_Geode:
2054    defineCPUMacros(Builder, "geode");
2055    break;
2056  }
2057
2058  // Target properties.
2059  Builder.defineMacro("__LITTLE_ENDIAN__");
2060  Builder.defineMacro("__REGISTER_PREFIX__", "");
2061
2062  // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
2063  // functions in glibc header files that use FP Stack inline asm which the
2064  // backend can't deal with (PR879).
2065  Builder.defineMacro("__NO_MATH_INLINES");
2066
2067  if (HasAES)
2068    Builder.defineMacro("__AES__");
2069
2070  if (HasPCLMUL)
2071    Builder.defineMacro("__PCLMUL__");
2072
2073  if (HasLZCNT)
2074    Builder.defineMacro("__LZCNT__");
2075
2076  if (HasBMI)
2077    Builder.defineMacro("__BMI__");
2078
2079  if (HasBMI2)
2080    Builder.defineMacro("__BMI2__");
2081
2082  if (HasPOPCNT)
2083    Builder.defineMacro("__POPCNT__");
2084
2085  if (HasSSE4a)
2086    Builder.defineMacro("__SSE4A__");
2087
2088  if (HasFMA4)
2089    Builder.defineMacro("__FMA4__");
2090
2091  if (HasFMA)
2092    Builder.defineMacro("__FMA__");
2093
2094  // Each case falls through to the previous one here.
2095  switch (SSELevel) {
2096  case AVX2:
2097    Builder.defineMacro("__AVX2__");
2098  case AVX:
2099    Builder.defineMacro("__AVX__");
2100  case SSE42:
2101    Builder.defineMacro("__SSE4_2__");
2102  case SSE41:
2103    Builder.defineMacro("__SSE4_1__");
2104  case SSSE3:
2105    Builder.defineMacro("__SSSE3__");
2106  case SSE3:
2107    Builder.defineMacro("__SSE3__");
2108  case SSE2:
2109    Builder.defineMacro("__SSE2__");
2110    Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
2111  case SSE1:
2112    Builder.defineMacro("__SSE__");
2113    Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
2114  case NoSSE:
2115    break;
2116  }
2117
2118  if (Opts.MicrosoftExt && PointerWidth == 32) {
2119    switch (SSELevel) {
2120    case AVX2:
2121    case AVX:
2122    case SSE42:
2123    case SSE41:
2124    case SSSE3:
2125    case SSE3:
2126    case SSE2:
2127      Builder.defineMacro("_M_IX86_FP", Twine(2));
2128      break;
2129    case SSE1:
2130      Builder.defineMacro("_M_IX86_FP", Twine(1));
2131      break;
2132    default:
2133      Builder.defineMacro("_M_IX86_FP", Twine(0));
2134    }
2135  }
2136
2137  // Each case falls through to the previous one here.
2138  switch (MMX3DNowLevel) {
2139  case AMD3DNowAthlon:
2140    Builder.defineMacro("__3dNOW_A__");
2141  case AMD3DNow:
2142    Builder.defineMacro("__3dNOW__");
2143  case MMX:
2144    Builder.defineMacro("__MMX__");
2145  case NoMMX3DNow:
2146    break;
2147  }
2148}
2149
2150bool X86TargetInfo::hasFeature(StringRef Feature) const {
2151  return llvm::StringSwitch<bool>(Feature)
2152      .Case("aes", HasAES)
2153      .Case("avx", SSELevel >= AVX)
2154      .Case("avx2", SSELevel >= AVX2)
2155      .Case("bmi", HasBMI)
2156      .Case("bmi2", HasBMI2)
2157      .Case("fma", HasFMA)
2158      .Case("fma4", HasFMA4)
2159      .Case("lzcnt", HasLZCNT)
2160      .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2161      .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2162      .Case("mmx", MMX3DNowLevel >= MMX)
2163      .Case("pclmul", HasPCLMUL)
2164      .Case("popcnt", HasPOPCNT)
2165      .Case("sse", SSELevel >= SSE1)
2166      .Case("sse2", SSELevel >= SSE2)
2167      .Case("sse3", SSELevel >= SSE3)
2168      .Case("ssse3", SSELevel >= SSSE3)
2169      .Case("sse41", SSELevel >= SSE41)
2170      .Case("sse42", SSELevel >= SSE42)
2171      .Case("sse4a", HasSSE4a)
2172      .Case("x86", true)
2173      .Case("x86_32", PointerWidth == 32)
2174      .Case("x86_64", PointerWidth == 64)
2175      .Default(false);
2176}
2177
2178bool
2179X86TargetInfo::validateAsmConstraint(const char *&Name,
2180                                     TargetInfo::ConstraintInfo &Info) const {
2181  switch (*Name) {
2182  default: return false;
2183  case 'Y': // first letter of a pair:
2184    switch (*(Name+1)) {
2185    default: return false;
2186    case '0':  // First SSE register.
2187    case 't':  // Any SSE register, when SSE2 is enabled.
2188    case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
2189    case 'm':  // any MMX register, when inter-unit moves enabled.
2190      break;   // falls through to setAllowsRegister.
2191  }
2192  case 'a': // eax.
2193  case 'b': // ebx.
2194  case 'c': // ecx.
2195  case 'd': // edx.
2196  case 'S': // esi.
2197  case 'D': // edi.
2198  case 'A': // edx:eax.
2199  case 'f': // any x87 floating point stack register.
2200  case 't': // top of floating point stack.
2201  case 'u': // second from top of floating point stack.
2202  case 'q': // Any register accessible as [r]l: a, b, c, and d.
2203  case 'y': // Any MMX register.
2204  case 'x': // Any SSE register.
2205  case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2206  case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2207  case 'l': // "Index" registers: any general register that can be used as an
2208            // index in a base+index memory access.
2209    Info.setAllowsRegister();
2210    return true;
2211  case 'C': // SSE floating point constant.
2212  case 'G': // x87 floating point constant.
2213  case 'e': // 32-bit signed integer constant for use with zero-extending
2214            // x86_64 instructions.
2215  case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2216            // x86_64 instructions.
2217    return true;
2218  }
2219}
2220
2221
2222std::string
2223X86TargetInfo::convertConstraint(const char *&Constraint) const {
2224  switch (*Constraint) {
2225  case 'a': return std::string("{ax}");
2226  case 'b': return std::string("{bx}");
2227  case 'c': return std::string("{cx}");
2228  case 'd': return std::string("{dx}");
2229  case 'S': return std::string("{si}");
2230  case 'D': return std::string("{di}");
2231  case 'p': // address
2232    return std::string("im");
2233  case 't': // top of floating point stack.
2234    return std::string("{st}");
2235  case 'u': // second from top of floating point stack.
2236    return std::string("{st(1)}"); // second from top of floating point stack.
2237  default:
2238    return std::string(1, *Constraint);
2239  }
2240}
2241} // end anonymous namespace
2242
2243namespace {
2244// X86-32 generic target
2245class X86_32TargetInfo : public X86TargetInfo {
2246public:
2247  X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2248    DoubleAlign = LongLongAlign = 32;
2249    LongDoubleWidth = 96;
2250    LongDoubleAlign = 32;
2251    SuitableAlign = 128;
2252    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2253                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2254                        "a0:0:64-f80:32:32-n8:16:32-S128";
2255    SizeType = UnsignedInt;
2256    PtrDiffType = SignedInt;
2257    IntPtrType = SignedInt;
2258    RegParmMax = 3;
2259
2260    // Use fpret for all types.
2261    RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2262                             (1 << TargetInfo::Double) |
2263                             (1 << TargetInfo::LongDouble));
2264
2265    // x86-32 has atomics up to 8 bytes
2266    // FIXME: Check that we actually have cmpxchg8b before setting
2267    // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2268    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2269  }
2270  virtual const char *getVAListDeclaration() const {
2271    return "typedef char* __builtin_va_list;";
2272  }
2273
2274  int getEHDataRegisterNumber(unsigned RegNo) const {
2275    if (RegNo == 0) return 0;
2276    if (RegNo == 1) return 2;
2277    return -1;
2278  }
2279};
2280} // end anonymous namespace
2281
2282namespace {
2283class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2284public:
2285  NetBSDI386TargetInfo(const std::string &triple) :
2286    NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2287  }
2288
2289  virtual unsigned getFloatEvalMethod() const {
2290    // NetBSD defaults to "double" rounding
2291    return 1;
2292  }
2293};
2294} // end anonymous namespace
2295
2296namespace {
2297class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2298public:
2299  OpenBSDI386TargetInfo(const std::string& triple) :
2300    OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2301    SizeType = UnsignedLong;
2302    IntPtrType = SignedLong;
2303    PtrDiffType = SignedLong;
2304  }
2305};
2306} // end anonymous namespace
2307
2308namespace {
2309class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2310public:
2311  DarwinI386TargetInfo(const std::string& triple) :
2312    DarwinTargetInfo<X86_32TargetInfo>(triple) {
2313    LongDoubleWidth = 128;
2314    LongDoubleAlign = 128;
2315    SuitableAlign = 128;
2316    SizeType = UnsignedLong;
2317    IntPtrType = SignedLong;
2318    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2319                        "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2320                        "a0:0:64-f80:128:128-n8:16:32-S128";
2321    HasAlignMac68kSupport = true;
2322  }
2323
2324};
2325} // end anonymous namespace
2326
2327namespace {
2328// x86-32 Windows target
2329class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2330public:
2331  WindowsX86_32TargetInfo(const std::string& triple)
2332    : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2333    TLSSupported = false;
2334    WCharType = UnsignedShort;
2335    DoubleAlign = LongLongAlign = 64;
2336    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2337                        "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2338                        "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2339  }
2340  virtual void getTargetDefines(const LangOptions &Opts,
2341                                MacroBuilder &Builder) const {
2342    WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2343  }
2344};
2345} // end anonymous namespace
2346
2347namespace {
2348
2349// x86-32 Windows Visual Studio target
2350class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2351public:
2352  VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2353    : WindowsX86_32TargetInfo(triple) {
2354    LongDoubleWidth = LongDoubleAlign = 64;
2355    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2356  }
2357  virtual void getTargetDefines(const LangOptions &Opts,
2358                                MacroBuilder &Builder) const {
2359    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2360    WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2361    // The value of the following reflects processor type.
2362    // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2363    // We lost the original triple, so we use the default.
2364    Builder.defineMacro("_M_IX86", "600");
2365  }
2366};
2367} // end anonymous namespace
2368
2369namespace {
2370// x86-32 MinGW target
2371class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2372public:
2373  MinGWX86_32TargetInfo(const std::string& triple)
2374    : WindowsX86_32TargetInfo(triple) {
2375  }
2376  virtual void getTargetDefines(const LangOptions &Opts,
2377                                MacroBuilder &Builder) const {
2378    WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2379    DefineStd(Builder, "WIN32", Opts);
2380    DefineStd(Builder, "WINNT", Opts);
2381    Builder.defineMacro("_X86_");
2382    Builder.defineMacro("__MSVCRT__");
2383    Builder.defineMacro("__MINGW32__");
2384
2385    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2386    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2387    if (Opts.MicrosoftExt)
2388      // Provide "as-is" __declspec.
2389      Builder.defineMacro("__declspec", "__declspec");
2390    else
2391      // Provide alias of __attribute__ like mingw32-gcc.
2392      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2393  }
2394};
2395} // end anonymous namespace
2396
2397namespace {
2398// x86-32 Cygwin target
2399class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2400public:
2401  CygwinX86_32TargetInfo(const std::string& triple)
2402    : X86_32TargetInfo(triple) {
2403    TLSSupported = false;
2404    WCharType = UnsignedShort;
2405    DoubleAlign = LongLongAlign = 64;
2406    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2407                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2408                        "a0:0:64-f80:32:32-n8:16:32-S32";
2409  }
2410  virtual void getTargetDefines(const LangOptions &Opts,
2411                                MacroBuilder &Builder) const {
2412    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2413    Builder.defineMacro("__CYGWIN__");
2414    Builder.defineMacro("__CYGWIN32__");
2415    DefineStd(Builder, "unix", Opts);
2416    if (Opts.CPlusPlus)
2417      Builder.defineMacro("_GNU_SOURCE");
2418  }
2419};
2420} // end anonymous namespace
2421
2422namespace {
2423// x86-32 Haiku target
2424class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2425public:
2426  HaikuX86_32TargetInfo(const std::string& triple)
2427    : X86_32TargetInfo(triple) {
2428    SizeType = UnsignedLong;
2429    IntPtrType = SignedLong;
2430    PtrDiffType = SignedLong;
2431    this->UserLabelPrefix = "";
2432  }
2433  virtual void getTargetDefines(const LangOptions &Opts,
2434                                MacroBuilder &Builder) const {
2435    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2436    Builder.defineMacro("__INTEL__");
2437    Builder.defineMacro("__HAIKU__");
2438  }
2439};
2440} // end anonymous namespace
2441
2442// RTEMS Target
2443template<typename Target>
2444class RTEMSTargetInfo : public OSTargetInfo<Target> {
2445protected:
2446  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2447                            MacroBuilder &Builder) const {
2448    // RTEMS defines; list based off of gcc output
2449
2450    Builder.defineMacro("__rtems__");
2451    Builder.defineMacro("__ELF__");
2452  }
2453public:
2454  RTEMSTargetInfo(const std::string &triple)
2455    : OSTargetInfo<Target>(triple) {
2456      this->UserLabelPrefix = "";
2457
2458      llvm::Triple Triple(triple);
2459      switch (Triple.getArch()) {
2460        default:
2461        case llvm::Triple::x86:
2462          // this->MCountName = ".mcount";
2463          break;
2464        case llvm::Triple::mips:
2465        case llvm::Triple::mipsel:
2466        case llvm::Triple::ppc:
2467        case llvm::Triple::ppc64:
2468          // this->MCountName = "_mcount";
2469          break;
2470        case llvm::Triple::arm:
2471          // this->MCountName = "__mcount";
2472          break;
2473      }
2474
2475    }
2476};
2477
2478namespace {
2479// x86-32 RTEMS target
2480class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2481public:
2482  RTEMSX86_32TargetInfo(const std::string& triple)
2483    : X86_32TargetInfo(triple) {
2484    SizeType = UnsignedLong;
2485    IntPtrType = SignedLong;
2486    PtrDiffType = SignedLong;
2487    this->UserLabelPrefix = "";
2488  }
2489  virtual void getTargetDefines(const LangOptions &Opts,
2490                                MacroBuilder &Builder) const {
2491    X86_32TargetInfo::getTargetDefines(Opts, Builder);
2492    Builder.defineMacro("__INTEL__");
2493    Builder.defineMacro("__rtems__");
2494  }
2495};
2496} // end anonymous namespace
2497
2498namespace {
2499// x86-64 generic target
2500class X86_64TargetInfo : public X86TargetInfo {
2501public:
2502  X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2503    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2504    LongDoubleWidth = 128;
2505    LongDoubleAlign = 128;
2506    LargeArrayMinWidth = 128;
2507    LargeArrayAlign = 128;
2508    SuitableAlign = 128;
2509    IntMaxType = SignedLong;
2510    UIntMaxType = UnsignedLong;
2511    Int64Type = SignedLong;
2512    RegParmMax = 6;
2513
2514    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2515                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2516                        "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2517
2518    // Use fpret only for long double.
2519    RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2520
2521    // Use fp2ret for _Complex long double.
2522    ComplexLongDoubleUsesFP2Ret = true;
2523
2524    // x86-64 has atomics up to 16 bytes.
2525    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2526    // on CPUs with cmpxchg16b
2527    MaxAtomicPromoteWidth = 128;
2528    MaxAtomicInlineWidth = 64;
2529  }
2530  virtual const char *getVAListDeclaration() const {
2531    return "typedef struct __va_list_tag {"
2532           "  unsigned gp_offset;"
2533           "  unsigned fp_offset;"
2534           "  void* overflow_arg_area;"
2535           "  void* reg_save_area;"
2536           "} __va_list_tag;"
2537           "typedef __va_list_tag __builtin_va_list[1];";
2538  }
2539
2540  int getEHDataRegisterNumber(unsigned RegNo) const {
2541    if (RegNo == 0) return 0;
2542    if (RegNo == 1) return 1;
2543    return -1;
2544  }
2545};
2546} // end anonymous namespace
2547
2548namespace {
2549// x86-64 Windows target
2550class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2551public:
2552  WindowsX86_64TargetInfo(const std::string& triple)
2553    : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2554    TLSSupported = false;
2555    WCharType = UnsignedShort;
2556    LongWidth = LongAlign = 32;
2557    DoubleAlign = LongLongAlign = 64;
2558    IntMaxType = SignedLongLong;
2559    UIntMaxType = UnsignedLongLong;
2560    Int64Type = SignedLongLong;
2561    SizeType = UnsignedLongLong;
2562    PtrDiffType = SignedLongLong;
2563    IntPtrType = SignedLongLong;
2564    this->UserLabelPrefix = "";
2565  }
2566  virtual void getTargetDefines(const LangOptions &Opts,
2567                                MacroBuilder &Builder) const {
2568    WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2569    Builder.defineMacro("_WIN64");
2570  }
2571  virtual const char *getVAListDeclaration() const {
2572    return "typedef char* __builtin_va_list;";
2573  }
2574};
2575} // end anonymous namespace
2576
2577namespace {
2578// x86-64 Windows Visual Studio target
2579class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2580public:
2581  VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2582    : WindowsX86_64TargetInfo(triple) {
2583    LongDoubleWidth = LongDoubleAlign = 64;
2584    LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2585  }
2586  virtual void getTargetDefines(const LangOptions &Opts,
2587                                MacroBuilder &Builder) const {
2588    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2589    WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2590    Builder.defineMacro("_M_X64");
2591    Builder.defineMacro("_M_AMD64");
2592  }
2593};
2594} // end anonymous namespace
2595
2596namespace {
2597// x86-64 MinGW target
2598class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2599public:
2600  MinGWX86_64TargetInfo(const std::string& triple)
2601    : WindowsX86_64TargetInfo(triple) {
2602  }
2603  virtual void getTargetDefines(const LangOptions &Opts,
2604                                MacroBuilder &Builder) const {
2605    WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2606    DefineStd(Builder, "WIN64", Opts);
2607    Builder.defineMacro("__MSVCRT__");
2608    Builder.defineMacro("__MINGW32__");
2609    Builder.defineMacro("__MINGW64__");
2610
2611    // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2612    // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2613    if (Opts.MicrosoftExt)
2614      // Provide "as-is" __declspec.
2615      Builder.defineMacro("__declspec", "__declspec");
2616    else
2617      // Provide alias of __attribute__ like mingw32-gcc.
2618      Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2619  }
2620};
2621} // end anonymous namespace
2622
2623namespace {
2624class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2625public:
2626  DarwinX86_64TargetInfo(const std::string& triple)
2627      : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2628    Int64Type = SignedLongLong;
2629  }
2630};
2631} // end anonymous namespace
2632
2633namespace {
2634class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2635public:
2636  OpenBSDX86_64TargetInfo(const std::string& triple)
2637      : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2638    IntMaxType = SignedLongLong;
2639    UIntMaxType = UnsignedLongLong;
2640    Int64Type = SignedLongLong;
2641  }
2642};
2643} // end anonymous namespace
2644
2645namespace {
2646class ARMTargetInfo : public TargetInfo {
2647  // Possible FPU choices.
2648  enum FPUMode {
2649    NoFPU,
2650    VFP2FPU,
2651    VFP3FPU,
2652    NeonFPU
2653  };
2654
2655  static bool FPUModeIsVFP(FPUMode Mode) {
2656    return Mode >= VFP2FPU && Mode <= NeonFPU;
2657  }
2658
2659  static const TargetInfo::GCCRegAlias GCCRegAliases[];
2660  static const char * const GCCRegNames[];
2661
2662  std::string ABI, CPU;
2663
2664  unsigned FPU : 3;
2665
2666  unsigned IsThumb : 1;
2667
2668  // Initialized via features.
2669  unsigned SoftFloat : 1;
2670  unsigned SoftFloatABI : 1;
2671
2672  static const Builtin::Info BuiltinInfo[];
2673
2674public:
2675  ARMTargetInfo(const std::string &TripleStr)
2676    : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
2677  {
2678    BigEndian = false;
2679    SizeType = UnsignedInt;
2680    PtrDiffType = SignedInt;
2681    // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
2682    WCharType = UnsignedInt;
2683
2684    // {} in inline assembly are neon specifiers, not assembly variant
2685    // specifiers.
2686    NoAsmVariants = true;
2687
2688    // FIXME: Should we just treat this as a feature?
2689    IsThumb = getTriple().getArchName().startswith("thumb");
2690    if (IsThumb) {
2691      // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2692      // so set preferred for small types to 32.
2693      DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2694                           "i64:64:64-f32:32:32-f64:64:64-"
2695                           "v64:64:64-v128:64:128-a0:0:32-n32-S64");
2696    } else {
2697      DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2698                           "i64:64:64-f32:32:32-f64:64:64-"
2699                           "v64:64:64-v128:64:128-a0:0:64-n32-S64");
2700    }
2701
2702    // ARM targets default to using the ARM C++ ABI.
2703    CXXABI = CXXABI_ARM;
2704
2705    // ARM has atomics up to 8 bytes
2706    // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
2707    MaxAtomicPromoteWidth = 64;
2708
2709    // Do force alignment of members that follow zero length bitfields.  If
2710    // the alignment of the zero-length bitfield is greater than the member
2711    // that follows it, `bar', `bar' will be aligned as the  type of the
2712    // zero length bitfield.
2713    UseZeroLengthBitfieldAlignment = true;
2714  }
2715  virtual const char *getABI() const { return ABI.c_str(); }
2716  virtual bool setABI(const std::string &Name) {
2717    ABI = Name;
2718
2719    // The defaults (above) are for AAPCS, check if we need to change them.
2720    //
2721    // FIXME: We need support for -meabi... we could just mangle it into the
2722    // name.
2723    if (Name == "apcs-gnu") {
2724      DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
2725      SizeType = UnsignedLong;
2726
2727      // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
2728      WCharType = SignedInt;
2729
2730      // Do not respect the alignment of bit-field types when laying out
2731      // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
2732      UseBitFieldTypeAlignment = false;
2733
2734      /// gcc forces the alignment to 4 bytes, regardless of the type of the
2735      /// zero length bitfield.  This corresponds to EMPTY_FIELD_BOUNDARY in
2736      /// gcc.
2737      ZeroLengthBitfieldBoundary = 32;
2738
2739      if (IsThumb) {
2740        // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2741        // so set preferred for small types to 32.
2742        DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2743                             "i64:32:64-f32:32:32-f64:32:64-"
2744                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2745      } else {
2746        DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2747                             "i64:32:64-f32:32:32-f64:32:64-"
2748                             "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2749      }
2750
2751      // FIXME: Override "preferred align" for double and long long.
2752    } else if (Name == "aapcs") {
2753      // FIXME: Enumerated types are variable width in straight AAPCS.
2754    } else if (Name == "aapcs-linux") {
2755      ;
2756    } else
2757      return false;
2758
2759    return true;
2760  }
2761
2762  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
2763    if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
2764      Features["vfp2"] = true;
2765    else if (CPU == "cortex-a8" || CPU == "cortex-a9")
2766      Features["neon"] = true;
2767  }
2768
2769  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2770                                 StringRef Name,
2771                                 bool Enabled) const {
2772    if (Name == "soft-float" || Name == "soft-float-abi" ||
2773        Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16" ||
2774        Name == "neonfp") {
2775      Features[Name] = Enabled;
2776    } else
2777      return false;
2778
2779    return true;
2780  }
2781
2782  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2783    FPU = NoFPU;
2784    SoftFloat = SoftFloatABI = false;
2785    for (unsigned i = 0, e = Features.size(); i != e; ++i) {
2786      if (Features[i] == "+soft-float")
2787        SoftFloat = true;
2788      else if (Features[i] == "+soft-float-abi")
2789        SoftFloatABI = true;
2790      else if (Features[i] == "+vfp2")
2791        FPU = VFP2FPU;
2792      else if (Features[i] == "+vfp3")
2793        FPU = VFP3FPU;
2794      else if (Features[i] == "+neon")
2795        FPU = NeonFPU;
2796    }
2797
2798    // Remove front-end specific options which the backend handles differently.
2799    std::vector<std::string>::iterator it;
2800    it = std::find(Features.begin(), Features.end(), "+soft-float");
2801    if (it != Features.end())
2802      Features.erase(it);
2803    it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
2804    if (it != Features.end())
2805      Features.erase(it);
2806  }
2807
2808  virtual bool hasFeature(StringRef Feature) const {
2809    return llvm::StringSwitch<bool>(Feature)
2810        .Case("arm", true)
2811        .Case("softfloat", SoftFloat)
2812        .Case("thumb", IsThumb)
2813        .Case("neon", FPU == NeonFPU && !SoftFloat &&
2814              StringRef(getCPUDefineSuffix(CPU)).startswith("7"))
2815        .Default(false);
2816  }
2817  static const char *getCPUDefineSuffix(StringRef Name) {
2818    return llvm::StringSwitch<const char*>(Name)
2819      .Cases("arm8", "arm810", "4")
2820      .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
2821      .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
2822      .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
2823      .Case("ep9312", "4T")
2824      .Cases("arm10tdmi", "arm1020t", "5T")
2825      .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
2826      .Case("arm926ej-s", "5TEJ")
2827      .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
2828      .Cases("xscale", "iwmmxt", "5TE")
2829      .Case("arm1136j-s", "6J")
2830      .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
2831      .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
2832      .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
2833      .Cases("cortex-a8", "cortex-a9", "7A")
2834      .Case("cortex-m3", "7M")
2835      .Case("cortex-m4", "7M")
2836      .Case("cortex-m0", "6M")
2837      .Default(0);
2838  }
2839  virtual bool setCPU(const std::string &Name) {
2840    if (!getCPUDefineSuffix(Name))
2841      return false;
2842
2843    CPU = Name;
2844    return true;
2845  }
2846  virtual void getTargetDefines(const LangOptions &Opts,
2847                                MacroBuilder &Builder) const {
2848    // Target identification.
2849    Builder.defineMacro("__arm");
2850    Builder.defineMacro("__arm__");
2851
2852    // Target properties.
2853    Builder.defineMacro("__ARMEL__");
2854    Builder.defineMacro("__LITTLE_ENDIAN__");
2855    Builder.defineMacro("__REGISTER_PREFIX__", "");
2856
2857    StringRef CPUArch = getCPUDefineSuffix(CPU);
2858    Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
2859
2860    // Subtarget options.
2861
2862    // FIXME: It's more complicated than this and we don't really support
2863    // interworking.
2864    if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
2865      Builder.defineMacro("__THUMB_INTERWORK__");
2866
2867    if (ABI == "aapcs" || ABI == "aapcs-linux")
2868      Builder.defineMacro("__ARM_EABI__");
2869
2870    if (SoftFloat)
2871      Builder.defineMacro("__SOFTFP__");
2872
2873    if (CPU == "xscale")
2874      Builder.defineMacro("__XSCALE__");
2875
2876    bool IsARMv7 = CPUArch.startswith("7");
2877    if (IsThumb) {
2878      Builder.defineMacro("__THUMBEL__");
2879      Builder.defineMacro("__thumb__");
2880      if (CPUArch == "6T2" || IsARMv7)
2881        Builder.defineMacro("__thumb2__");
2882    }
2883
2884    // Note, this is always on in gcc, even though it doesn't make sense.
2885    Builder.defineMacro("__APCS_32__");
2886
2887    if (FPUModeIsVFP((FPUMode) FPU))
2888      Builder.defineMacro("__VFP_FP__");
2889
2890    // This only gets set when Neon instructions are actually available, unlike
2891    // the VFP define, hence the soft float and arch check. This is subtly
2892    // different from gcc, we follow the intent which was that it should be set
2893    // when Neon instructions are actually available.
2894    if (FPU == NeonFPU && !SoftFloat && IsARMv7)
2895      Builder.defineMacro("__ARM_NEON__");
2896  }
2897  virtual void getTargetBuiltins(const Builtin::Info *&Records,
2898                                 unsigned &NumRecords) const {
2899    Records = BuiltinInfo;
2900    NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
2901  }
2902  virtual bool isCLZForZeroUndef() const { return false; }
2903  virtual const char *getVAListDeclaration() const {
2904    return "typedef void* __builtin_va_list;";
2905  }
2906  virtual void getGCCRegNames(const char * const *&Names,
2907                              unsigned &NumNames) const;
2908  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2909                                unsigned &NumAliases) const;
2910  virtual bool validateAsmConstraint(const char *&Name,
2911                                     TargetInfo::ConstraintInfo &Info) const {
2912    // FIXME: Check if this is complete
2913    switch (*Name) {
2914    default:
2915    case 'l': // r0-r7
2916    case 'h': // r8-r15
2917    case 'w': // VFP Floating point register single precision
2918    case 'P': // VFP Floating point register double precision
2919      Info.setAllowsRegister();
2920      return true;
2921    case 'Q': // A memory address that is a single base register.
2922      Info.setAllowsMemory();
2923      return true;
2924    case 'U': // a memory reference...
2925      switch (Name[1]) {
2926      case 'q': // ...ARMV4 ldrsb
2927      case 'v': // ...VFP load/store (reg+constant offset)
2928      case 'y': // ...iWMMXt load/store
2929      case 't': // address valid for load/store opaque types wider
2930	        // than 128-bits
2931      case 'n': // valid address for Neon doubleword vector load/store
2932      case 'm': // valid address for Neon element and structure load/store
2933      case 's': // valid address for non-offset loads/stores of quad-word
2934	        // values in four ARM registers
2935        Info.setAllowsMemory();
2936        Name++;
2937        return true;
2938      }
2939    }
2940    return false;
2941  }
2942  virtual std::string convertConstraint(const char *&Constraint) const {
2943    std::string R;
2944    switch (*Constraint) {
2945    case 'U':   // Two-character constraint; add "^" hint for later parsing.
2946      R = std::string("^") + std::string(Constraint, 2);
2947      Constraint++;
2948      break;
2949    case 'p': // 'p' should be translated to 'r' by default.
2950      R = std::string("r");
2951      break;
2952    default:
2953      return std::string(1, *Constraint);
2954    }
2955    return R;
2956  }
2957  virtual const char *getClobbers() const {
2958    // FIXME: Is this really right?
2959    return "";
2960  }
2961};
2962
2963const char * const ARMTargetInfo::GCCRegNames[] = {
2964  // Integer registers
2965  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2966  "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
2967
2968  // Float registers
2969  "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
2970  "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
2971  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
2972  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
2973
2974  // Double registers
2975  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
2976  "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
2977  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
2978  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
2979
2980  // Quad registers
2981  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
2982  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
2983};
2984
2985void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
2986                                   unsigned &NumNames) const {
2987  Names = GCCRegNames;
2988  NumNames = llvm::array_lengthof(GCCRegNames);
2989}
2990
2991const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
2992  { { "a1" }, "r0" },
2993  { { "a2" }, "r1" },
2994  { { "a3" }, "r2" },
2995  { { "a4" }, "r3" },
2996  { { "v1" }, "r4" },
2997  { { "v2" }, "r5" },
2998  { { "v3" }, "r6" },
2999  { { "v4" }, "r7" },
3000  { { "v5" }, "r8" },
3001  { { "v6", "rfp" }, "r9" },
3002  { { "sl" }, "r10" },
3003  { { "fp" }, "r11" },
3004  { { "ip" }, "r12" },
3005  { { "r13" }, "sp" },
3006  { { "r14" }, "lr" },
3007  { { "r15" }, "pc" },
3008  // The S, D and Q registers overlap, but aren't really aliases; we
3009  // don't want to substitute one of these for a different-sized one.
3010};
3011
3012void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3013                                       unsigned &NumAliases) const {
3014  Aliases = GCCRegAliases;
3015  NumAliases = llvm::array_lengthof(GCCRegAliases);
3016}
3017
3018const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
3019#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3020#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3021                                              ALL_LANGUAGES },
3022#include "clang/Basic/BuiltinsARM.def"
3023};
3024} // end anonymous namespace.
3025
3026namespace {
3027class DarwinARMTargetInfo :
3028  public DarwinTargetInfo<ARMTargetInfo> {
3029protected:
3030  virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
3031                            MacroBuilder &Builder) const {
3032    getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
3033  }
3034
3035public:
3036  DarwinARMTargetInfo(const std::string& triple)
3037    : DarwinTargetInfo<ARMTargetInfo>(triple) {
3038    HasAlignMac68kSupport = true;
3039    // iOS always has 64-bit atomic instructions.
3040    // FIXME: This should be based off of the target features in ARMTargetInfo.
3041    MaxAtomicInlineWidth = 64;
3042  }
3043};
3044} // end anonymous namespace.
3045
3046
3047namespace {
3048// Hexagon abstract base class
3049class HexagonTargetInfo : public TargetInfo {
3050  static const Builtin::Info BuiltinInfo[];
3051  static const char * const GCCRegNames[];
3052  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3053  std::string CPU;
3054public:
3055  HexagonTargetInfo(const std::string& triple) : TargetInfo(triple)  {
3056    BigEndian = false;
3057    DescriptionString = ("e-p:32:32:32-"
3058                         "i64:64:64-i32:32:32-i16:16:16-i1:32:32"
3059                         "f64:64:64-f32:32:32-a0:0-n32");
3060
3061    // {} in inline assembly are packet specifiers, not assembly variant
3062    // specifiers.
3063    NoAsmVariants = true;
3064  }
3065
3066  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3067                                 unsigned &NumRecords) const {
3068    Records = BuiltinInfo;
3069    NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
3070  }
3071
3072  virtual bool validateAsmConstraint(const char *&Name,
3073                                     TargetInfo::ConstraintInfo &Info) const {
3074    return true;
3075  }
3076
3077  virtual void getTargetDefines(const LangOptions &Opts,
3078                                MacroBuilder &Builder) const;
3079
3080  virtual bool hasFeature(StringRef Feature) const {
3081    return Feature == "hexagon";
3082  }
3083
3084  virtual const char *getVAListDeclaration() const {
3085    return "typedef char* __builtin_va_list;";
3086  }
3087  virtual void getGCCRegNames(const char * const *&Names,
3088                              unsigned &NumNames) const;
3089  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3090                                unsigned &NumAliases) const;
3091  virtual const char *getClobbers() const {
3092    return "";
3093  }
3094
3095  static const char *getHexagonCPUSuffix(StringRef Name) {
3096    return llvm::StringSwitch<const char*>(Name)
3097      .Case("hexagonv2", "2")
3098      .Case("hexagonv3", "3")
3099      .Case("hexagonv4", "4")
3100      .Case("hexagonv5", "5")
3101      .Default(0);
3102  }
3103
3104  virtual bool setCPU(const std::string &Name) {
3105    if (!getHexagonCPUSuffix(Name))
3106      return false;
3107
3108    CPU = Name;
3109    return true;
3110  }
3111};
3112
3113void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
3114                                MacroBuilder &Builder) const {
3115  Builder.defineMacro("qdsp6");
3116  Builder.defineMacro("__qdsp6", "1");
3117  Builder.defineMacro("__qdsp6__", "1");
3118
3119  Builder.defineMacro("hexagon");
3120  Builder.defineMacro("__hexagon", "1");
3121  Builder.defineMacro("__hexagon__", "1");
3122
3123  if(CPU == "hexagonv1") {
3124    Builder.defineMacro("__HEXAGON_V1__");
3125    Builder.defineMacro("__HEXAGON_ARCH__", "1");
3126    if(Opts.HexagonQdsp6Compat) {
3127      Builder.defineMacro("__QDSP6_V1__");
3128      Builder.defineMacro("__QDSP6_ARCH__", "1");
3129    }
3130  }
3131  else if(CPU == "hexagonv2") {
3132    Builder.defineMacro("__HEXAGON_V2__");
3133    Builder.defineMacro("__HEXAGON_ARCH__", "2");
3134    if(Opts.HexagonQdsp6Compat) {
3135      Builder.defineMacro("__QDSP6_V2__");
3136      Builder.defineMacro("__QDSP6_ARCH__", "2");
3137    }
3138  }
3139  else if(CPU == "hexagonv3") {
3140    Builder.defineMacro("__HEXAGON_V3__");
3141    Builder.defineMacro("__HEXAGON_ARCH__", "3");
3142    if(Opts.HexagonQdsp6Compat) {
3143      Builder.defineMacro("__QDSP6_V3__");
3144      Builder.defineMacro("__QDSP6_ARCH__", "3");
3145    }
3146  }
3147  else if(CPU == "hexagonv4") {
3148    Builder.defineMacro("__HEXAGON_V4__");
3149    Builder.defineMacro("__HEXAGON_ARCH__", "4");
3150    if(Opts.HexagonQdsp6Compat) {
3151      Builder.defineMacro("__QDSP6_V4__");
3152      Builder.defineMacro("__QDSP6_ARCH__", "4");
3153    }
3154  }
3155  else if(CPU == "hexagonv5") {
3156    Builder.defineMacro("__HEXAGON_V5__");
3157    Builder.defineMacro("__HEXAGON_ARCH__", "5");
3158    if(Opts.HexagonQdsp6Compat) {
3159      Builder.defineMacro("__QDSP6_V5__");
3160      Builder.defineMacro("__QDSP6_ARCH__", "5");
3161    }
3162  }
3163}
3164
3165const char * const HexagonTargetInfo::GCCRegNames[] = {
3166  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3167  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3168  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3169  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3170  "p0", "p1", "p2", "p3",
3171  "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3172};
3173
3174void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3175                                   unsigned &NumNames) const {
3176  Names = GCCRegNames;
3177  NumNames = llvm::array_lengthof(GCCRegNames);
3178}
3179
3180
3181const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3182  { { "sp" }, "r29" },
3183  { { "fp" }, "r30" },
3184  { { "lr" }, "r31" },
3185 };
3186
3187void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3188                                     unsigned &NumAliases) const {
3189  Aliases = GCCRegAliases;
3190  NumAliases = llvm::array_lengthof(GCCRegAliases);
3191}
3192
3193
3194const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3195#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3196#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3197                                              ALL_LANGUAGES },
3198#include "clang/Basic/BuiltinsHexagon.def"
3199};
3200}
3201
3202
3203namespace {
3204class SparcV8TargetInfo : public TargetInfo {
3205  static const TargetInfo::GCCRegAlias GCCRegAliases[];
3206  static const char * const GCCRegNames[];
3207  bool SoftFloat;
3208public:
3209  SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3210    // FIXME: Support Sparc quad-precision long double?
3211    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3212                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3213  }
3214  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3215                                 StringRef Name,
3216                                 bool Enabled) const {
3217    if (Name == "soft-float")
3218      Features[Name] = Enabled;
3219    else
3220      return false;
3221
3222    return true;
3223  }
3224  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3225    SoftFloat = false;
3226    for (unsigned i = 0, e = Features.size(); i != e; ++i)
3227      if (Features[i] == "+soft-float")
3228        SoftFloat = true;
3229  }
3230  virtual void getTargetDefines(const LangOptions &Opts,
3231                                MacroBuilder &Builder) const {
3232    DefineStd(Builder, "sparc", Opts);
3233    Builder.defineMacro("__sparcv8");
3234    Builder.defineMacro("__REGISTER_PREFIX__", "");
3235
3236    if (SoftFloat)
3237      Builder.defineMacro("SOFT_FLOAT", "1");
3238  }
3239
3240  virtual bool hasFeature(StringRef Feature) const {
3241    return llvm::StringSwitch<bool>(Feature)
3242             .Case("softfloat", SoftFloat)
3243             .Case("sparc", true)
3244             .Default(false);
3245  }
3246
3247  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3248                                 unsigned &NumRecords) const {
3249    // FIXME: Implement!
3250  }
3251  virtual const char *getVAListDeclaration() const {
3252    return "typedef void* __builtin_va_list;";
3253  }
3254  virtual void getGCCRegNames(const char * const *&Names,
3255                              unsigned &NumNames) const;
3256  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3257                                unsigned &NumAliases) const;
3258  virtual bool validateAsmConstraint(const char *&Name,
3259                                     TargetInfo::ConstraintInfo &info) const {
3260    // FIXME: Implement!
3261    return false;
3262  }
3263  virtual const char *getClobbers() const {
3264    // FIXME: Implement!
3265    return "";
3266  }
3267};
3268
3269const char * const SparcV8TargetInfo::GCCRegNames[] = {
3270  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3271  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3272  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3273  "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3274};
3275
3276void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3277                                       unsigned &NumNames) const {
3278  Names = GCCRegNames;
3279  NumNames = llvm::array_lengthof(GCCRegNames);
3280}
3281
3282const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3283  { { "g0" }, "r0" },
3284  { { "g1" }, "r1" },
3285  { { "g2" }, "r2" },
3286  { { "g3" }, "r3" },
3287  { { "g4" }, "r4" },
3288  { { "g5" }, "r5" },
3289  { { "g6" }, "r6" },
3290  { { "g7" }, "r7" },
3291  { { "o0" }, "r8" },
3292  { { "o1" }, "r9" },
3293  { { "o2" }, "r10" },
3294  { { "o3" }, "r11" },
3295  { { "o4" }, "r12" },
3296  { { "o5" }, "r13" },
3297  { { "o6", "sp" }, "r14" },
3298  { { "o7" }, "r15" },
3299  { { "l0" }, "r16" },
3300  { { "l1" }, "r17" },
3301  { { "l2" }, "r18" },
3302  { { "l3" }, "r19" },
3303  { { "l4" }, "r20" },
3304  { { "l5" }, "r21" },
3305  { { "l6" }, "r22" },
3306  { { "l7" }, "r23" },
3307  { { "i0" }, "r24" },
3308  { { "i1" }, "r25" },
3309  { { "i2" }, "r26" },
3310  { { "i3" }, "r27" },
3311  { { "i4" }, "r28" },
3312  { { "i5" }, "r29" },
3313  { { "i6", "fp" }, "r30" },
3314  { { "i7" }, "r31" },
3315};
3316
3317void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3318                                         unsigned &NumAliases) const {
3319  Aliases = GCCRegAliases;
3320  NumAliases = llvm::array_lengthof(GCCRegAliases);
3321}
3322} // end anonymous namespace.
3323
3324namespace {
3325class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3326public:
3327  AuroraUXSparcV8TargetInfo(const std::string& triple) :
3328      AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3329    SizeType = UnsignedInt;
3330    PtrDiffType = SignedInt;
3331  }
3332};
3333class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3334public:
3335  SolarisSparcV8TargetInfo(const std::string& triple) :
3336      SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3337    SizeType = UnsignedInt;
3338    PtrDiffType = SignedInt;
3339  }
3340};
3341} // end anonymous namespace.
3342
3343namespace {
3344  class MSP430TargetInfo : public TargetInfo {
3345    static const char * const GCCRegNames[];
3346  public:
3347    MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3348      BigEndian = false;
3349      TLSSupported = false;
3350      IntWidth = 16; IntAlign = 16;
3351      LongWidth = 32; LongLongWidth = 64;
3352      LongAlign = LongLongAlign = 16;
3353      PointerWidth = 16; PointerAlign = 16;
3354      SuitableAlign = 16;
3355      SizeType = UnsignedInt;
3356      IntMaxType = SignedLong;
3357      UIntMaxType = UnsignedLong;
3358      IntPtrType = SignedShort;
3359      PtrDiffType = SignedInt;
3360      SigAtomicType = SignedLong;
3361      DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3362   }
3363    virtual void getTargetDefines(const LangOptions &Opts,
3364                                  MacroBuilder &Builder) const {
3365      Builder.defineMacro("MSP430");
3366      Builder.defineMacro("__MSP430__");
3367      // FIXME: defines for different 'flavours' of MCU
3368    }
3369    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3370                                   unsigned &NumRecords) const {
3371     // FIXME: Implement.
3372      Records = 0;
3373      NumRecords = 0;
3374    }
3375    virtual bool hasFeature(StringRef Feature) const {
3376      return Feature == "msp430";
3377    }
3378    virtual void getGCCRegNames(const char * const *&Names,
3379                                unsigned &NumNames) const;
3380    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3381                                  unsigned &NumAliases) const {
3382      // No aliases.
3383      Aliases = 0;
3384      NumAliases = 0;
3385    }
3386    virtual bool validateAsmConstraint(const char *&Name,
3387                                       TargetInfo::ConstraintInfo &info) const {
3388      // No target constraints for now.
3389      return false;
3390    }
3391    virtual const char *getClobbers() const {
3392      // FIXME: Is this really right?
3393      return "";
3394    }
3395    virtual const char *getVAListDeclaration() const {
3396      // FIXME: implement
3397      return "typedef char* __builtin_va_list;";
3398   }
3399  };
3400
3401  const char * const MSP430TargetInfo::GCCRegNames[] = {
3402    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3403    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3404  };
3405
3406  void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3407                                        unsigned &NumNames) const {
3408    Names = GCCRegNames;
3409    NumNames = llvm::array_lengthof(GCCRegNames);
3410  }
3411}
3412
3413namespace {
3414
3415  // LLVM and Clang cannot be used directly to output native binaries for
3416  // target, but is used to compile C code to llvm bitcode with correct
3417  // type and alignment information.
3418  //
3419  // TCE uses the llvm bitcode as input and uses it for generating customized
3420  // target processor and program binary. TCE co-design environment is
3421  // publicly available in http://tce.cs.tut.fi
3422
3423  static const unsigned TCEOpenCLAddrSpaceMap[] = {
3424      3, // opencl_global
3425      4, // opencl_local
3426      5, // opencl_constant
3427      0, // cuda_device
3428      0, // cuda_constant
3429      0  // cuda_shared
3430  };
3431
3432  class TCETargetInfo : public TargetInfo{
3433  public:
3434    TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3435      TLSSupported = false;
3436      IntWidth = 32;
3437      LongWidth = LongLongWidth = 32;
3438      PointerWidth = 32;
3439      IntAlign = 32;
3440      LongAlign = LongLongAlign = 32;
3441      PointerAlign = 32;
3442      SuitableAlign = 32;
3443      SizeType = UnsignedInt;
3444      IntMaxType = SignedLong;
3445      UIntMaxType = UnsignedLong;
3446      IntPtrType = SignedInt;
3447      PtrDiffType = SignedInt;
3448      FloatWidth = 32;
3449      FloatAlign = 32;
3450      DoubleWidth = 32;
3451      DoubleAlign = 32;
3452      LongDoubleWidth = 32;
3453      LongDoubleAlign = 32;
3454      FloatFormat = &llvm::APFloat::IEEEsingle;
3455      DoubleFormat = &llvm::APFloat::IEEEsingle;
3456      LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3457      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3458                          "i16:16:32-i32:32:32-i64:32:32-"
3459                          "f32:32:32-f64:32:32-v64:32:32-"
3460                          "v128:32:32-a0:0:32-n32";
3461      AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3462    }
3463
3464    virtual void getTargetDefines(const LangOptions &Opts,
3465                                  MacroBuilder &Builder) const {
3466      DefineStd(Builder, "tce", Opts);
3467      Builder.defineMacro("__TCE__");
3468      Builder.defineMacro("__TCE_V1__");
3469    }
3470    virtual bool hasFeature(StringRef Feature) const {
3471      return Feature == "tce";
3472    }
3473
3474    virtual void getTargetBuiltins(const Builtin::Info *&Records,
3475                                   unsigned &NumRecords) const {}
3476    virtual const char *getClobbers() const {
3477      return "";
3478    }
3479    virtual const char *getVAListDeclaration() const {
3480      return "typedef void* __builtin_va_list;";
3481    }
3482    virtual void getGCCRegNames(const char * const *&Names,
3483                                unsigned &NumNames) const {}
3484    virtual bool validateAsmConstraint(const char *&Name,
3485                                       TargetInfo::ConstraintInfo &info) const {
3486      return true;
3487    }
3488    virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3489                                  unsigned &NumAliases) const {}
3490  };
3491}
3492
3493namespace {
3494class MipsTargetInfoBase : public TargetInfo {
3495  std::string CPU;
3496  bool SoftFloat;
3497  bool SingleFloat;
3498
3499protected:
3500  std::string ABI;
3501
3502public:
3503  MipsTargetInfoBase(const std::string& triple,
3504                     const std::string& ABIStr,
3505                     const std::string& CPUStr)
3506    : TargetInfo(triple),
3507      CPU(CPUStr),
3508      SoftFloat(false), SingleFloat(false),
3509      ABI(ABIStr)
3510  {}
3511
3512  virtual const char *getABI() const { return ABI.c_str(); }
3513  virtual bool setABI(const std::string &Name) = 0;
3514  virtual bool setCPU(const std::string &Name) {
3515    CPU = Name;
3516    return true;
3517  }
3518  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3519    Features[ABI] = true;
3520    Features[CPU] = true;
3521  }
3522
3523  virtual void getArchDefines(const LangOptions &Opts,
3524                              MacroBuilder &Builder) const {
3525    if (SoftFloat)
3526      Builder.defineMacro("__mips_soft_float", Twine(1));
3527    else if (SingleFloat)
3528      Builder.defineMacro("__mips_single_float", Twine(1));
3529    else if (!SoftFloat && !SingleFloat)
3530      Builder.defineMacro("__mips_hard_float", Twine(1));
3531    else
3532      llvm_unreachable("Invalid float ABI for Mips.");
3533
3534    Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
3535    Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
3536    Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
3537  }
3538
3539  virtual void getTargetDefines(const LangOptions &Opts,
3540                                MacroBuilder &Builder) const = 0;
3541  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3542                                 unsigned &NumRecords) const {
3543    // FIXME: Implement!
3544  }
3545  virtual bool hasFeature(StringRef Feature) const {
3546    return Feature == "mips";
3547  }
3548  virtual const char *getVAListDeclaration() const {
3549    return "typedef void* __builtin_va_list;";
3550  }
3551  virtual void getGCCRegNames(const char * const *&Names,
3552                              unsigned &NumNames) const {
3553    static const char * const GCCRegNames[] = {
3554      // CPU register names
3555      // Must match second column of GCCRegAliases
3556      "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
3557      "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
3558      "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
3559      "$24",  "$25",  "$26",  "$27",  "$28",  "$29",  "$30",  "$31",
3560      // Floating point register names
3561      "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
3562      "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
3563      "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
3564      "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
3565      // Hi/lo and condition register names
3566      "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
3567      "$fcc5","$fcc6","$fcc7"
3568    };
3569    Names = GCCRegNames;
3570    NumNames = llvm::array_lengthof(GCCRegNames);
3571  }
3572  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3573                                unsigned &NumAliases) const = 0;
3574  virtual bool validateAsmConstraint(const char *&Name,
3575                                     TargetInfo::ConstraintInfo &Info) const {
3576    switch (*Name) {
3577    default:
3578      return false;
3579
3580    case 'r': // CPU registers.
3581    case 'd': // Equivalent to "r" unless generating MIPS16 code.
3582    case 'y': // Equivalent to "r", backwards compatibility only.
3583    case 'f': // floating-point registers.
3584    case 'c': // $25 for indirect jumps
3585    case 'l': // lo register
3586    case 'x': // hilo register pair
3587      Info.setAllowsRegister();
3588      return true;
3589    }
3590  }
3591
3592  virtual const char *getClobbers() const {
3593    // FIXME: Implement!
3594    return "";
3595  }
3596
3597  virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3598                                 StringRef Name,
3599                                 bool Enabled) const {
3600    if (Name == "soft-float" || Name == "single-float" ||
3601        Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" ||
3602        Name == "mips32" || Name == "mips32r2" ||
3603        Name == "mips64" || Name == "mips64r2") {
3604      Features[Name] = Enabled;
3605      return true;
3606    }
3607    return false;
3608  }
3609
3610  virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3611    SoftFloat = false;
3612    SingleFloat = false;
3613
3614    for (std::vector<std::string>::iterator it = Features.begin(),
3615         ie = Features.end(); it != ie; ++it) {
3616      if (*it == "+single-float") {
3617        SingleFloat = true;
3618        break;
3619      }
3620
3621      if (*it == "+soft-float") {
3622        SoftFloat = true;
3623        // This option is front-end specific.
3624        // Do not need to pass it to the backend.
3625        Features.erase(it);
3626        break;
3627      }
3628    }
3629  }
3630};
3631
3632class Mips32TargetInfoBase : public MipsTargetInfoBase {
3633public:
3634  Mips32TargetInfoBase(const std::string& triple) :
3635    MipsTargetInfoBase(triple, "o32", "mips32") {
3636    SizeType = UnsignedInt;
3637    PtrDiffType = SignedInt;
3638  }
3639  virtual bool setABI(const std::string &Name) {
3640    if ((Name == "o32") || (Name == "eabi")) {
3641      ABI = Name;
3642      return true;
3643    } else
3644      return false;
3645  }
3646  virtual void getArchDefines(const LangOptions &Opts,
3647                              MacroBuilder &Builder) const {
3648    MipsTargetInfoBase::getArchDefines(Opts, Builder);
3649
3650    if (ABI == "o32") {
3651      Builder.defineMacro("__mips_o32");
3652      Builder.defineMacro("_ABIO32", "1");
3653      Builder.defineMacro("_MIPS_SIM", "_ABIO32");
3654    }
3655    else if (ABI == "eabi")
3656      Builder.defineMacro("__mips_eabi");
3657    else
3658      llvm_unreachable("Invalid ABI for Mips32.");
3659  }
3660  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3661                                unsigned &NumAliases) const {
3662    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3663      { { "at" },  "$1" },
3664      { { "v0" },  "$2" },
3665      { { "v1" },  "$3" },
3666      { { "a0" },  "$4" },
3667      { { "a1" },  "$5" },
3668      { { "a2" },  "$6" },
3669      { { "a3" },  "$7" },
3670      { { "t0" },  "$8" },
3671      { { "t1" },  "$9" },
3672      { { "t2" }, "$10" },
3673      { { "t3" }, "$11" },
3674      { { "t4" }, "$12" },
3675      { { "t5" }, "$13" },
3676      { { "t6" }, "$14" },
3677      { { "t7" }, "$15" },
3678      { { "s0" }, "$16" },
3679      { { "s1" }, "$17" },
3680      { { "s2" }, "$18" },
3681      { { "s3" }, "$19" },
3682      { { "s4" }, "$20" },
3683      { { "s5" }, "$21" },
3684      { { "s6" }, "$22" },
3685      { { "s7" }, "$23" },
3686      { { "t8" }, "$24" },
3687      { { "t9" }, "$25" },
3688      { { "k0" }, "$26" },
3689      { { "k1" }, "$27" },
3690      { { "gp" }, "$28" },
3691      { { "sp","$sp" }, "$29" },
3692      { { "fp","$fp" }, "$30" },
3693      { { "ra" }, "$31" }
3694    };
3695    Aliases = GCCRegAliases;
3696    NumAliases = llvm::array_lengthof(GCCRegAliases);
3697  }
3698};
3699
3700class Mips32EBTargetInfo : public Mips32TargetInfoBase {
3701public:
3702  Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3703    DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3704                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3705  }
3706  virtual void getTargetDefines(const LangOptions &Opts,
3707                                MacroBuilder &Builder) const {
3708    DefineStd(Builder, "mips", Opts);
3709    Builder.defineMacro("_mips");
3710    DefineStd(Builder, "MIPSEB", Opts);
3711    Builder.defineMacro("_MIPSEB");
3712    Builder.defineMacro("__REGISTER_PREFIX__", "");
3713    getArchDefines(Opts, Builder);
3714  }
3715};
3716
3717class Mips32ELTargetInfo : public Mips32TargetInfoBase {
3718public:
3719  Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3720    BigEndian = false;
3721    DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3722                        "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3723  }
3724  virtual void getTargetDefines(const LangOptions &Opts,
3725                                MacroBuilder &Builder) const {
3726    DefineStd(Builder, "mips", Opts);
3727    Builder.defineMacro("_mips");
3728    DefineStd(Builder, "MIPSEL", Opts);
3729    Builder.defineMacro("_MIPSEL");
3730    Builder.defineMacro("__REGISTER_PREFIX__", "");
3731    getArchDefines(Opts, Builder);
3732  }
3733};
3734
3735class Mips64TargetInfoBase : public MipsTargetInfoBase {
3736  virtual void SetDescriptionString(const std::string &Name) = 0;
3737public:
3738  Mips64TargetInfoBase(const std::string& triple) :
3739    MipsTargetInfoBase(triple, "n64", "mips64") {
3740    LongWidth = LongAlign = 64;
3741    PointerWidth = PointerAlign = 64;
3742    LongDoubleWidth = LongDoubleAlign = 128;
3743    LongDoubleFormat = &llvm::APFloat::IEEEquad;
3744    SuitableAlign = 128;
3745  }
3746  virtual bool setABI(const std::string &Name) {
3747    SetDescriptionString(Name);
3748
3749    if (Name != "n32" && Name != "n64")
3750      return false;
3751
3752    ABI = Name;
3753
3754    if (Name == "n32") {
3755      LongWidth = LongAlign = 32;
3756      PointerWidth = PointerAlign = 32;
3757    }
3758
3759    return true;
3760  }
3761  virtual void getArchDefines(const LangOptions &Opts,
3762                              MacroBuilder &Builder) const {
3763    MipsTargetInfoBase::getArchDefines(Opts, Builder);
3764
3765    if (ABI == "n32") {
3766      Builder.defineMacro("__mips_n32");
3767      Builder.defineMacro("_ABIN32", "2");
3768      Builder.defineMacro("_MIPS_SIM", "_ABIN32");
3769    }
3770    else if (ABI == "n64") {
3771      Builder.defineMacro("__mips_n64");
3772      Builder.defineMacro("_ABI64", "3");
3773      Builder.defineMacro("_MIPS_SIM", "_ABI64");
3774    }
3775    else
3776      llvm_unreachable("Invalid ABI for Mips64.");
3777  }
3778  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3779                                unsigned &NumAliases) const {
3780    static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3781      { { "at" },  "$1" },
3782      { { "v0" },  "$2" },
3783      { { "v1" },  "$3" },
3784      { { "a0" },  "$4" },
3785      { { "a1" },  "$5" },
3786      { { "a2" },  "$6" },
3787      { { "a3" },  "$7" },
3788      { { "a4" },  "$8" },
3789      { { "a5" },  "$9" },
3790      { { "a6" }, "$10" },
3791      { { "a7" }, "$11" },
3792      { { "t0" }, "$12" },
3793      { { "t1" }, "$13" },
3794      { { "t2" }, "$14" },
3795      { { "t3" }, "$15" },
3796      { { "s0" }, "$16" },
3797      { { "s1" }, "$17" },
3798      { { "s2" }, "$18" },
3799      { { "s3" }, "$19" },
3800      { { "s4" }, "$20" },
3801      { { "s5" }, "$21" },
3802      { { "s6" }, "$22" },
3803      { { "s7" }, "$23" },
3804      { { "t8" }, "$24" },
3805      { { "t9" }, "$25" },
3806      { { "k0" }, "$26" },
3807      { { "k1" }, "$27" },
3808      { { "gp" }, "$28" },
3809      { { "sp","$sp" }, "$29" },
3810      { { "fp","$fp" }, "$30" },
3811      { { "ra" }, "$31" }
3812    };
3813    Aliases = GCCRegAliases;
3814    NumAliases = llvm::array_lengthof(GCCRegAliases);
3815  }
3816};
3817
3818class Mips64EBTargetInfo : public Mips64TargetInfoBase {
3819  virtual void SetDescriptionString(const std::string &Name) {
3820    // Change DescriptionString only if ABI is n32.
3821    if (Name == "n32")
3822      DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3823                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3824                          "v64:64:64-n32";
3825  }
3826public:
3827  Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3828    // Default ABI is n64.
3829    DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3830                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3831                        "v64:64:64-n32";
3832  }
3833  virtual void getTargetDefines(const LangOptions &Opts,
3834                                MacroBuilder &Builder) const {
3835    DefineStd(Builder, "mips", Opts);
3836    Builder.defineMacro("_mips");
3837    DefineStd(Builder, "MIPSEB", Opts);
3838    Builder.defineMacro("_MIPSEB");
3839    Builder.defineMacro("__REGISTER_PREFIX__", "");
3840    getArchDefines(Opts, Builder);
3841  }
3842};
3843
3844class Mips64ELTargetInfo : public Mips64TargetInfoBase {
3845  virtual void SetDescriptionString(const std::string &Name) {
3846    // Change DescriptionString only if ABI is n32.
3847    if (Name == "n32")
3848      DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3849                          "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
3850                          "-v64:64:64-n32";
3851  }
3852public:
3853  Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3854    // Default ABI is n64.
3855    BigEndian = false;
3856    DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3857                        "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
3858                        "v64:64:64-n32";
3859  }
3860  virtual void getTargetDefines(const LangOptions &Opts,
3861                                MacroBuilder &Builder) const {
3862    DefineStd(Builder, "mips", Opts);
3863    Builder.defineMacro("_mips");
3864    DefineStd(Builder, "MIPSEL", Opts);
3865    Builder.defineMacro("_MIPSEL");
3866    Builder.defineMacro("__REGISTER_PREFIX__", "");
3867    getArchDefines(Opts, Builder);
3868  }
3869};
3870} // end anonymous namespace.
3871
3872namespace {
3873class PNaClTargetInfo : public TargetInfo {
3874public:
3875  PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
3876    BigEndian = false;
3877    this->UserLabelPrefix = "";
3878    this->LongAlign = 32;
3879    this->LongWidth = 32;
3880    this->PointerAlign = 32;
3881    this->PointerWidth = 32;
3882    this->IntMaxType = TargetInfo::SignedLongLong;
3883    this->UIntMaxType = TargetInfo::UnsignedLongLong;
3884    this->Int64Type = TargetInfo::SignedLongLong;
3885    this->DoubleAlign = 64;
3886    this->LongDoubleWidth = 64;
3887    this->LongDoubleAlign = 64;
3888    this->SizeType = TargetInfo::UnsignedInt;
3889    this->PtrDiffType = TargetInfo::SignedInt;
3890    this->IntPtrType = TargetInfo::SignedInt;
3891    this->RegParmMax = 2;
3892    DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
3893                        "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
3894  }
3895
3896  void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3897  }
3898  virtual void getArchDefines(const LangOptions &Opts,
3899                              MacroBuilder &Builder) const {
3900    Builder.defineMacro("__le32__");
3901    Builder.defineMacro("__pnacl__");
3902  }
3903  virtual void getTargetDefines(const LangOptions &Opts,
3904                                MacroBuilder &Builder) const {
3905    DefineStd(Builder, "unix", Opts);
3906    Builder.defineMacro("__ELF__");
3907    if (Opts.POSIXThreads)
3908      Builder.defineMacro("_REENTRANT");
3909    if (Opts.CPlusPlus)
3910      Builder.defineMacro("_GNU_SOURCE");
3911
3912    Builder.defineMacro("__LITTLE_ENDIAN__");
3913    Builder.defineMacro("__native_client__");
3914    getArchDefines(Opts, Builder);
3915  }
3916  virtual bool hasFeature(StringRef Feature) const {
3917    return Feature == "pnacl";
3918  }
3919  virtual void getTargetBuiltins(const Builtin::Info *&Records,
3920                                 unsigned &NumRecords) const {
3921  }
3922  virtual const char *getVAListDeclaration() const {
3923    return "typedef int __builtin_va_list[4];";
3924  }
3925  virtual void getGCCRegNames(const char * const *&Names,
3926                              unsigned &NumNames) const;
3927  virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3928                                unsigned &NumAliases) const;
3929  virtual bool validateAsmConstraint(const char *&Name,
3930                                     TargetInfo::ConstraintInfo &Info) const {
3931    return false;
3932  }
3933
3934  virtual const char *getClobbers() const {
3935    return "";
3936  }
3937};
3938
3939void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
3940                                     unsigned &NumNames) const {
3941  Names = NULL;
3942  NumNames = 0;
3943}
3944
3945void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3946                                       unsigned &NumAliases) const {
3947  Aliases = NULL;
3948  NumAliases = 0;
3949}
3950} // end anonymous namespace.
3951
3952
3953//===----------------------------------------------------------------------===//
3954// Driver code
3955//===----------------------------------------------------------------------===//
3956
3957static TargetInfo *AllocateTarget(const std::string &T) {
3958  llvm::Triple Triple(T);
3959  llvm::Triple::OSType os = Triple.getOS();
3960
3961  switch (Triple.getArch()) {
3962  default:
3963    return NULL;
3964
3965  case llvm::Triple::hexagon:
3966    return new HexagonTargetInfo(T);
3967
3968  case llvm::Triple::arm:
3969  case llvm::Triple::thumb:
3970    if (Triple.isOSDarwin())
3971      return new DarwinARMTargetInfo(T);
3972
3973    switch (os) {
3974    case llvm::Triple::Linux:
3975      return new LinuxTargetInfo<ARMTargetInfo>(T);
3976    case llvm::Triple::FreeBSD:
3977      return new FreeBSDTargetInfo<ARMTargetInfo>(T);
3978    case llvm::Triple::NetBSD:
3979      return new NetBSDTargetInfo<ARMTargetInfo>(T);
3980    case llvm::Triple::RTEMS:
3981      return new RTEMSTargetInfo<ARMTargetInfo>(T);
3982    default:
3983      return new ARMTargetInfo(T);
3984    }
3985
3986  case llvm::Triple::msp430:
3987    return new MSP430TargetInfo(T);
3988
3989  case llvm::Triple::mips:
3990    switch (os) {
3991    case llvm::Triple::Linux:
3992      return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
3993    case llvm::Triple::RTEMS:
3994      return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
3995    case llvm::Triple::FreeBSD:
3996      return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
3997    case llvm::Triple::NetBSD:
3998      return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
3999    default:
4000      return new Mips32EBTargetInfo(T);
4001    }
4002
4003  case llvm::Triple::mipsel:
4004    switch (os) {
4005    case llvm::Triple::Linux:
4006      return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
4007    case llvm::Triple::RTEMS:
4008      return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
4009    case llvm::Triple::FreeBSD:
4010      return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
4011    case llvm::Triple::NetBSD:
4012      return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
4013    default:
4014      return new Mips32ELTargetInfo(T);
4015    }
4016
4017  case llvm::Triple::mips64:
4018    switch (os) {
4019    case llvm::Triple::Linux:
4020      return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
4021    case llvm::Triple::RTEMS:
4022      return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
4023    case llvm::Triple::FreeBSD:
4024      return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
4025    case llvm::Triple::NetBSD:
4026      return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
4027    default:
4028      return new Mips64EBTargetInfo(T);
4029    }
4030
4031  case llvm::Triple::mips64el:
4032    switch (os) {
4033    case llvm::Triple::Linux:
4034      return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
4035    case llvm::Triple::RTEMS:
4036      return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
4037    case llvm::Triple::FreeBSD:
4038      return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
4039    case llvm::Triple::NetBSD:
4040      return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
4041    default:
4042      return new Mips64ELTargetInfo(T);
4043    }
4044
4045  case llvm::Triple::le32:
4046    switch (os) {
4047      case llvm::Triple::NativeClient:
4048        return new PNaClTargetInfo(T);
4049      default:
4050        return NULL;
4051    }
4052
4053  case llvm::Triple::ppc:
4054    if (Triple.isOSDarwin())
4055      return new DarwinPPC32TargetInfo(T);
4056    switch (os) {
4057    case llvm::Triple::Linux:
4058      return new LinuxTargetInfo<PPC32TargetInfo>(T);
4059    case llvm::Triple::FreeBSD:
4060      return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
4061    case llvm::Triple::NetBSD:
4062      return new NetBSDTargetInfo<PPC32TargetInfo>(T);
4063    case llvm::Triple::RTEMS:
4064      return new RTEMSTargetInfo<PPC32TargetInfo>(T);
4065    default:
4066      return new PPC32TargetInfo(T);
4067    }
4068
4069  case llvm::Triple::ppc64:
4070    if (Triple.isOSDarwin())
4071      return new DarwinPPC64TargetInfo(T);
4072    switch (os) {
4073    case llvm::Triple::Linux:
4074      return new LinuxTargetInfo<PPC64TargetInfo>(T);
4075    case llvm::Triple::Lv2:
4076      return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
4077    case llvm::Triple::FreeBSD:
4078      return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
4079    case llvm::Triple::NetBSD:
4080      return new NetBSDTargetInfo<PPC64TargetInfo>(T);
4081    default:
4082      return new PPC64TargetInfo(T);
4083    }
4084
4085  case llvm::Triple::nvptx:
4086    return new NVPTX32TargetInfo(T);
4087  case llvm::Triple::nvptx64:
4088    return new NVPTX64TargetInfo(T);
4089
4090  case llvm::Triple::mblaze:
4091    return new MBlazeTargetInfo(T);
4092
4093  case llvm::Triple::sparc:
4094    switch (os) {
4095    case llvm::Triple::Linux:
4096      return new LinuxTargetInfo<SparcV8TargetInfo>(T);
4097    case llvm::Triple::AuroraUX:
4098      return new AuroraUXSparcV8TargetInfo(T);
4099    case llvm::Triple::Solaris:
4100      return new SolarisSparcV8TargetInfo(T);
4101    case llvm::Triple::NetBSD:
4102      return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
4103    case llvm::Triple::RTEMS:
4104      return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
4105    default:
4106      return new SparcV8TargetInfo(T);
4107    }
4108
4109  // FIXME: Need a real SPU target.
4110  case llvm::Triple::cellspu:
4111    return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
4112
4113  case llvm::Triple::tce:
4114    return new TCETargetInfo(T);
4115
4116  case llvm::Triple::x86:
4117    if (Triple.isOSDarwin())
4118      return new DarwinI386TargetInfo(T);
4119
4120    switch (os) {
4121    case llvm::Triple::AuroraUX:
4122      return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
4123    case llvm::Triple::Linux:
4124      return new LinuxTargetInfo<X86_32TargetInfo>(T);
4125    case llvm::Triple::DragonFly:
4126      return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
4127    case llvm::Triple::NetBSD:
4128      return new NetBSDI386TargetInfo(T);
4129    case llvm::Triple::OpenBSD:
4130      return new OpenBSDI386TargetInfo(T);
4131    case llvm::Triple::FreeBSD:
4132      return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
4133    case llvm::Triple::Minix:
4134      return new MinixTargetInfo<X86_32TargetInfo>(T);
4135    case llvm::Triple::Solaris:
4136      return new SolarisTargetInfo<X86_32TargetInfo>(T);
4137    case llvm::Triple::Cygwin:
4138      return new CygwinX86_32TargetInfo(T);
4139    case llvm::Triple::MinGW32:
4140      return new MinGWX86_32TargetInfo(T);
4141    case llvm::Triple::Win32:
4142      return new VisualStudioWindowsX86_32TargetInfo(T);
4143    case llvm::Triple::Haiku:
4144      return new HaikuX86_32TargetInfo(T);
4145    case llvm::Triple::RTEMS:
4146      return new RTEMSX86_32TargetInfo(T);
4147    default:
4148      return new X86_32TargetInfo(T);
4149    }
4150
4151  case llvm::Triple::x86_64:
4152    if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
4153      return new DarwinX86_64TargetInfo(T);
4154
4155    switch (os) {
4156    case llvm::Triple::AuroraUX:
4157      return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
4158    case llvm::Triple::Linux:
4159      return new LinuxTargetInfo<X86_64TargetInfo>(T);
4160    case llvm::Triple::DragonFly:
4161      return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
4162    case llvm::Triple::NetBSD:
4163      return new NetBSDTargetInfo<X86_64TargetInfo>(T);
4164    case llvm::Triple::OpenBSD:
4165      return new OpenBSDX86_64TargetInfo(T);
4166    case llvm::Triple::FreeBSD:
4167      return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
4168    case llvm::Triple::Solaris:
4169      return new SolarisTargetInfo<X86_64TargetInfo>(T);
4170    case llvm::Triple::MinGW32:
4171      return new MinGWX86_64TargetInfo(T);
4172    case llvm::Triple::Win32:   // This is what Triple.h supports now.
4173      return new VisualStudioWindowsX86_64TargetInfo(T);
4174    default:
4175      return new X86_64TargetInfo(T);
4176    }
4177  }
4178}
4179
4180/// CreateTargetInfo - Return the target info object for the specified target
4181/// triple.
4182TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
4183                                         TargetOptions &Opts) {
4184  llvm::Triple Triple(Opts.Triple);
4185
4186  // Construct the target
4187  OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
4188  if (!Target) {
4189    Diags.Report(diag::err_target_unknown_triple) << Triple.str();
4190    return 0;
4191  }
4192
4193  // Set the target CPU if specified.
4194  if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
4195    Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
4196    return 0;
4197  }
4198
4199  // Set the target ABI if specified.
4200  if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
4201    Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
4202    return 0;
4203  }
4204
4205  // Set the target C++ ABI.
4206  if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
4207    Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
4208    return 0;
4209  }
4210
4211  // Compute the default target features, we need the target to handle this
4212  // because features may have dependencies on one another.
4213  llvm::StringMap<bool> Features;
4214  Target->getDefaultFeatures(Features);
4215
4216  // Apply the user specified deltas.
4217  // First the enables.
4218  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4219         ie = Opts.Features.end(); it != ie; ++it) {
4220    const char *Name = it->c_str();
4221
4222    if (Name[0] != '+')
4223      continue;
4224
4225    // Apply the feature via the target.
4226    if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
4227      Diags.Report(diag::err_target_invalid_feature) << Name;
4228      return 0;
4229    }
4230  }
4231
4232  // Then the disables.
4233  for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
4234         ie = Opts.Features.end(); it != ie; ++it) {
4235    const char *Name = it->c_str();
4236
4237    if (Name[0] == '+')
4238      continue;
4239
4240    // Apply the feature via the target.
4241    if (Name[0] != '-' ||
4242        !Target->setFeatureEnabled(Features, Name + 1, false)) {
4243      Diags.Report(diag::err_target_invalid_feature) << Name;
4244      return 0;
4245    }
4246  }
4247
4248  // Add the features to the compile options.
4249  //
4250  // FIXME: If we are completely confident that we have the right set, we only
4251  // need to pass the minuses.
4252  Opts.Features.clear();
4253  for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4254         ie = Features.end(); it != ie; ++it)
4255    Opts.Features.push_back((it->second ? "+" : "-") + it->first().str());
4256  Target->HandleTargetFeatures(Opts.Features);
4257
4258  return Target.take();
4259}
4260