Targets.cpp revision 6903313102c4e1ca598305850cc209b62711b1b6
1//===--- Targets.cpp - Implement -arch option and targets -----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements construction of a TargetInfo object from a 11// target triple. 12// 13//===----------------------------------------------------------------------===// 14 15#include "clang/Basic/TargetInfo.h" 16#include "clang/Basic/Builtins.h" 17#include "clang/Basic/Diagnostic.h" 18#include "clang/Basic/LangOptions.h" 19#include "clang/Basic/MacroBuilder.h" 20#include "clang/Basic/TargetBuiltins.h" 21#include "clang/Basic/TargetOptions.h" 22#include "llvm/ADT/APFloat.h" 23#include "llvm/ADT/OwningPtr.h" 24#include "llvm/ADT/STLExtras.h" 25#include "llvm/ADT/StringRef.h" 26#include "llvm/ADT/StringSwitch.h" 27#include "llvm/ADT/Triple.h" 28#include "llvm/MC/MCSectionMachO.h" 29#include "llvm/Support/ErrorHandling.h" 30#include "llvm/Type.h" 31#include <algorithm> 32using namespace clang; 33 34//===----------------------------------------------------------------------===// 35// Common code shared among targets. 36//===----------------------------------------------------------------------===// 37 38/// DefineStd - Define a macro name and standard variants. For example if 39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40/// when in GNU mode. 41static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55} 56 57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName, 58 bool Tuning = true) { 59 Builder.defineMacro("__" + CPUName); 60 Builder.defineMacro("__" + CPUName + "__"); 61 if (Tuning) 62 Builder.defineMacro("__tune_" + CPUName + "__"); 63} 64 65//===----------------------------------------------------------------------===// 66// Defines specific to certain operating systems. 67//===----------------------------------------------------------------------===// 68 69namespace { 70template<typename TgtInfo> 71class OSTargetInfo : public TgtInfo { 72protected: 73 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 74 MacroBuilder &Builder) const=0; 75public: 76 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 77 virtual void getTargetDefines(const LangOptions &Opts, 78 MacroBuilder &Builder) const { 79 TgtInfo::getTargetDefines(Opts, Builder); 80 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 81 } 82 83}; 84} // end anonymous namespace 85 86 87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 88 const llvm::Triple &Triple, 89 StringRef &PlatformName, 90 VersionTuple &PlatformMinVersion) { 91 Builder.defineMacro("__APPLE_CC__", "5621"); 92 Builder.defineMacro("__APPLE__"); 93 Builder.defineMacro("__MACH__"); 94 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 95 96 if (!Opts.ObjCAutoRefCount) { 97 // __weak is always defined, for use in blocks and with objc pointers. 98 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 99 100 // Darwin defines __strong even in C mode (just to nothing). 101 if (Opts.getGC() != LangOptions::NonGC) 102 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 103 else 104 Builder.defineMacro("__strong", ""); 105 106 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 107 // allow this in C, since one might have block pointers in structs that 108 // are used in pure C code and in Objective-C ARC. 109 Builder.defineMacro("__unsafe_unretained", ""); 110 } 111 112 if (Opts.Static) 113 Builder.defineMacro("__STATIC__"); 114 else 115 Builder.defineMacro("__DYNAMIC__"); 116 117 if (Opts.POSIXThreads) 118 Builder.defineMacro("_REENTRANT"); 119 120 // Get the platform type and version number from the triple. 121 unsigned Maj, Min, Rev; 122 if (Triple.isMacOSX()) { 123 Triple.getMacOSXVersion(Maj, Min, Rev); 124 PlatformName = "macosx"; 125 } else { 126 Triple.getOSVersion(Maj, Min, Rev); 127 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 128 } 129 130 // If -target arch-pc-win32-macho option specified, we're 131 // generating code for Win32 ABI. No need to emit 132 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 133 if (PlatformName == "win32") { 134 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 135 return; 136 } 137 138 // Set the appropriate OS version define. 139 if (Triple.getOS() == llvm::Triple::IOS) { 140 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 141 char Str[6]; 142 Str[0] = '0' + Maj; 143 Str[1] = '0' + (Min / 10); 144 Str[2] = '0' + (Min % 10); 145 Str[3] = '0' + (Rev / 10); 146 Str[4] = '0' + (Rev % 10); 147 Str[5] = '\0'; 148 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 149 } else { 150 // Note that the Driver allows versions which aren't representable in the 151 // define (because we only get a single digit for the minor and micro 152 // revision numbers). So, we limit them to the maximum representable 153 // version. 154 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 155 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 156 char Str[5]; 157 Str[0] = '0' + (Maj / 10); 158 Str[1] = '0' + (Maj % 10); 159 Str[2] = '0' + std::min(Min, 9U); 160 Str[3] = '0' + std::min(Rev, 9U); 161 Str[4] = '\0'; 162 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 163 } 164 165 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 166} 167 168namespace { 169template<typename Target> 170class DarwinTargetInfo : public OSTargetInfo<Target> { 171protected: 172 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 173 MacroBuilder &Builder) const { 174 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 175 this->PlatformMinVersion); 176 } 177 178public: 179 DarwinTargetInfo(const std::string& triple) : 180 OSTargetInfo<Target>(triple) { 181 llvm::Triple T = llvm::Triple(triple); 182 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 183 this->MCountName = "\01mcount"; 184 } 185 186 virtual std::string isValidSectionSpecifier(StringRef SR) const { 187 // Let MCSectionMachO validate this. 188 StringRef Segment, Section; 189 unsigned TAA, StubSize; 190 bool HasTAA; 191 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 192 TAA, HasTAA, StubSize); 193 } 194 195 virtual const char *getStaticInitSectionSpecifier() const { 196 // FIXME: We should return 0 when building kexts. 197 return "__TEXT,__StaticInit,regular,pure_instructions"; 198 } 199 200 /// Darwin does not support protected visibility. Darwin's "default" 201 /// is very similar to ELF's "protected"; Darwin requires a "weak" 202 /// attribute on declarations that can be dynamically replaced. 203 virtual bool hasProtectedVisibility() const { 204 return false; 205 } 206}; 207 208 209// DragonFlyBSD Target 210template<typename Target> 211class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 212protected: 213 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 214 MacroBuilder &Builder) const { 215 // DragonFly defines; list based off of gcc output 216 Builder.defineMacro("__DragonFly__"); 217 Builder.defineMacro("__DragonFly_cc_version", "100001"); 218 Builder.defineMacro("__ELF__"); 219 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 220 Builder.defineMacro("__tune_i386__"); 221 DefineStd(Builder, "unix", Opts); 222 } 223public: 224 DragonFlyBSDTargetInfo(const std::string &triple) 225 : OSTargetInfo<Target>(triple) { 226 this->UserLabelPrefix = ""; 227 228 llvm::Triple Triple(triple); 229 switch (Triple.getArch()) { 230 default: 231 case llvm::Triple::x86: 232 case llvm::Triple::x86_64: 233 this->MCountName = ".mcount"; 234 break; 235 } 236 } 237}; 238 239// FreeBSD Target 240template<typename Target> 241class FreeBSDTargetInfo : public OSTargetInfo<Target> { 242protected: 243 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 244 MacroBuilder &Builder) const { 245 // FreeBSD defines; list based off of gcc output 246 247 unsigned Release = Triple.getOSMajorVersion(); 248 if (Release == 0U) 249 Release = 8; 250 251 Builder.defineMacro("__FreeBSD__", Twine(Release)); 252 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U)); 253 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 254 DefineStd(Builder, "unix", Opts); 255 Builder.defineMacro("__ELF__"); 256 } 257public: 258 FreeBSDTargetInfo(const std::string &triple) 259 : OSTargetInfo<Target>(triple) { 260 this->UserLabelPrefix = ""; 261 262 llvm::Triple Triple(triple); 263 switch (Triple.getArch()) { 264 default: 265 case llvm::Triple::x86: 266 case llvm::Triple::x86_64: 267 this->MCountName = ".mcount"; 268 break; 269 case llvm::Triple::mips: 270 case llvm::Triple::mipsel: 271 case llvm::Triple::ppc: 272 case llvm::Triple::ppc64: 273 this->MCountName = "_mcount"; 274 break; 275 case llvm::Triple::arm: 276 this->MCountName = "__mcount"; 277 break; 278 } 279 280 } 281}; 282 283// Minix Target 284template<typename Target> 285class MinixTargetInfo : public OSTargetInfo<Target> { 286protected: 287 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 288 MacroBuilder &Builder) const { 289 // Minix defines 290 291 Builder.defineMacro("__minix", "3"); 292 Builder.defineMacro("_EM_WSIZE", "4"); 293 Builder.defineMacro("_EM_PSIZE", "4"); 294 Builder.defineMacro("_EM_SSIZE", "2"); 295 Builder.defineMacro("_EM_LSIZE", "4"); 296 Builder.defineMacro("_EM_FSIZE", "4"); 297 Builder.defineMacro("_EM_DSIZE", "8"); 298 Builder.defineMacro("__ELF__"); 299 DefineStd(Builder, "unix", Opts); 300 } 301public: 302 MinixTargetInfo(const std::string &triple) 303 : OSTargetInfo<Target>(triple) { 304 this->UserLabelPrefix = ""; 305 } 306}; 307 308// Linux target 309template<typename Target> 310class LinuxTargetInfo : public OSTargetInfo<Target> { 311protected: 312 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 313 MacroBuilder &Builder) const { 314 // Linux defines; list based off of gcc output 315 DefineStd(Builder, "unix", Opts); 316 DefineStd(Builder, "linux", Opts); 317 Builder.defineMacro("__gnu_linux__"); 318 Builder.defineMacro("__ELF__"); 319 if (Opts.POSIXThreads) 320 Builder.defineMacro("_REENTRANT"); 321 if (Opts.CPlusPlus) 322 Builder.defineMacro("_GNU_SOURCE"); 323 } 324public: 325 LinuxTargetInfo(const std::string& triple) 326 : OSTargetInfo<Target>(triple) { 327 this->UserLabelPrefix = ""; 328 this->WIntType = TargetInfo::UnsignedInt; 329 } 330 331 virtual const char *getStaticInitSectionSpecifier() const { 332 return ".text.startup"; 333 } 334}; 335 336// NetBSD Target 337template<typename Target> 338class NetBSDTargetInfo : public OSTargetInfo<Target> { 339protected: 340 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 341 MacroBuilder &Builder) const { 342 // NetBSD defines; list based off of gcc output 343 Builder.defineMacro("__NetBSD__"); 344 Builder.defineMacro("__unix__"); 345 Builder.defineMacro("__ELF__"); 346 if (Opts.POSIXThreads) 347 Builder.defineMacro("_POSIX_THREADS"); 348 } 349public: 350 NetBSDTargetInfo(const std::string &triple) 351 : OSTargetInfo<Target>(triple) { 352 this->UserLabelPrefix = ""; 353 } 354}; 355 356// OpenBSD Target 357template<typename Target> 358class OpenBSDTargetInfo : public OSTargetInfo<Target> { 359protected: 360 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 361 MacroBuilder &Builder) const { 362 // OpenBSD defines; list based off of gcc output 363 364 Builder.defineMacro("__OpenBSD__"); 365 DefineStd(Builder, "unix", Opts); 366 Builder.defineMacro("__ELF__"); 367 if (Opts.POSIXThreads) 368 Builder.defineMacro("_POSIX_THREADS"); 369 } 370public: 371 OpenBSDTargetInfo(const std::string &triple) 372 : OSTargetInfo<Target>(triple) { 373 this->UserLabelPrefix = ""; 374 375 llvm::Triple Triple(triple); 376 switch (Triple.getArch()) { 377 default: 378 case llvm::Triple::x86: 379 case llvm::Triple::x86_64: 380 case llvm::Triple::arm: 381 case llvm::Triple::sparc: 382 this->MCountName = "__mcount"; 383 break; 384 case llvm::Triple::mips64: 385 case llvm::Triple::mips64el: 386 case llvm::Triple::ppc: 387 case llvm::Triple::sparcv9: 388 this->MCountName = "_mcount"; 389 break; 390 } 391 } 392}; 393 394// PSP Target 395template<typename Target> 396class PSPTargetInfo : public OSTargetInfo<Target> { 397protected: 398 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 399 MacroBuilder &Builder) const { 400 // PSP defines; list based on the output of the pspdev gcc toolchain. 401 Builder.defineMacro("PSP"); 402 Builder.defineMacro("_PSP"); 403 Builder.defineMacro("__psp__"); 404 Builder.defineMacro("__ELF__"); 405 } 406public: 407 PSPTargetInfo(const std::string& triple) 408 : OSTargetInfo<Target>(triple) { 409 this->UserLabelPrefix = ""; 410 } 411}; 412 413// PS3 PPU Target 414template<typename Target> 415class PS3PPUTargetInfo : public OSTargetInfo<Target> { 416protected: 417 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 418 MacroBuilder &Builder) const { 419 // PS3 PPU defines. 420 Builder.defineMacro("__PPC__"); 421 Builder.defineMacro("__PPU__"); 422 Builder.defineMacro("__CELLOS_LV2__"); 423 Builder.defineMacro("__ELF__"); 424 Builder.defineMacro("__LP32__"); 425 Builder.defineMacro("_ARCH_PPC64"); 426 Builder.defineMacro("__powerpc64__"); 427 } 428public: 429 PS3PPUTargetInfo(const std::string& triple) 430 : OSTargetInfo<Target>(triple) { 431 this->UserLabelPrefix = ""; 432 this->LongWidth = this->LongAlign = 32; 433 this->PointerWidth = this->PointerAlign = 32; 434 this->IntMaxType = TargetInfo::SignedLongLong; 435 this->UIntMaxType = TargetInfo::UnsignedLongLong; 436 this->Int64Type = TargetInfo::SignedLongLong; 437 this->SizeType = TargetInfo::UnsignedInt; 438 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 439 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 440 } 441}; 442 443// FIXME: Need a real SPU target. 444// PS3 SPU Target 445template<typename Target> 446class PS3SPUTargetInfo : public OSTargetInfo<Target> { 447protected: 448 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 449 MacroBuilder &Builder) const { 450 // PS3 PPU defines. 451 Builder.defineMacro("__SPU__"); 452 Builder.defineMacro("__ELF__"); 453 } 454public: 455 PS3SPUTargetInfo(const std::string& triple) 456 : OSTargetInfo<Target>(triple) { 457 this->UserLabelPrefix = ""; 458 } 459}; 460 461// AuroraUX target 462template<typename Target> 463class AuroraUXTargetInfo : public OSTargetInfo<Target> { 464protected: 465 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 466 MacroBuilder &Builder) const { 467 DefineStd(Builder, "sun", Opts); 468 DefineStd(Builder, "unix", Opts); 469 Builder.defineMacro("__ELF__"); 470 Builder.defineMacro("__svr4__"); 471 Builder.defineMacro("__SVR4"); 472 } 473public: 474 AuroraUXTargetInfo(const std::string& triple) 475 : OSTargetInfo<Target>(triple) { 476 this->UserLabelPrefix = ""; 477 this->WCharType = this->SignedLong; 478 // FIXME: WIntType should be SignedLong 479 } 480}; 481 482// Solaris target 483template<typename Target> 484class SolarisTargetInfo : public OSTargetInfo<Target> { 485protected: 486 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 487 MacroBuilder &Builder) const { 488 DefineStd(Builder, "sun", Opts); 489 DefineStd(Builder, "unix", Opts); 490 Builder.defineMacro("__ELF__"); 491 Builder.defineMacro("__svr4__"); 492 Builder.defineMacro("__SVR4"); 493 // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and 494 // newer, but to 500 for everything else. feature_test.h has a check to 495 // ensure that you are not using C99 with an old version of X/Open or C89 496 // with a new version. 497 if (Opts.C99 || Opts.C11) 498 Builder.defineMacro("_XOPEN_SOURCE", "600"); 499 else 500 Builder.defineMacro("_XOPEN_SOURCE", "500"); 501 if (Opts.CPlusPlus) 502 Builder.defineMacro("__C99FEATURES__"); 503 Builder.defineMacro("_LARGEFILE_SOURCE"); 504 Builder.defineMacro("_LARGEFILE64_SOURCE"); 505 Builder.defineMacro("__EXTENSIONS__"); 506 Builder.defineMacro("_REENTRANT"); 507 } 508public: 509 SolarisTargetInfo(const std::string& triple) 510 : OSTargetInfo<Target>(triple) { 511 this->UserLabelPrefix = ""; 512 this->WCharType = this->SignedInt; 513 // FIXME: WIntType should be SignedLong 514 } 515}; 516 517// Windows target 518template<typename Target> 519class WindowsTargetInfo : public OSTargetInfo<Target> { 520protected: 521 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 522 MacroBuilder &Builder) const { 523 Builder.defineMacro("_WIN32"); 524 } 525 void getVisualStudioDefines(const LangOptions &Opts, 526 MacroBuilder &Builder) const { 527 if (Opts.CPlusPlus) { 528 if (Opts.RTTI) 529 Builder.defineMacro("_CPPRTTI"); 530 531 if (Opts.Exceptions) 532 Builder.defineMacro("_CPPUNWIND"); 533 } 534 535 if (!Opts.CharIsSigned) 536 Builder.defineMacro("_CHAR_UNSIGNED"); 537 538 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 539 // but it works for now. 540 if (Opts.POSIXThreads) 541 Builder.defineMacro("_MT"); 542 543 if (Opts.MSCVersion != 0) 544 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 545 546 if (Opts.MicrosoftExt) { 547 Builder.defineMacro("_MSC_EXTENSIONS"); 548 549 if (Opts.CPlusPlus0x) { 550 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 551 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 552 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 553 } 554 } 555 556 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 557 } 558 559public: 560 WindowsTargetInfo(const std::string &triple) 561 : OSTargetInfo<Target>(triple) {} 562}; 563 564} // end anonymous namespace. 565 566//===----------------------------------------------------------------------===// 567// Specific target implementations. 568//===----------------------------------------------------------------------===// 569 570namespace { 571// PPC abstract base class 572class PPCTargetInfo : public TargetInfo { 573 static const Builtin::Info BuiltinInfo[]; 574 static const char * const GCCRegNames[]; 575 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 576public: 577 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) { 578 LongDoubleWidth = LongDoubleAlign = 128; 579 LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble; 580 } 581 582 virtual void getTargetBuiltins(const Builtin::Info *&Records, 583 unsigned &NumRecords) const { 584 Records = BuiltinInfo; 585 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 586 } 587 588 virtual bool isCLZForZeroUndef() const { return false; } 589 590 virtual void getTargetDefines(const LangOptions &Opts, 591 MacroBuilder &Builder) const; 592 593 virtual bool hasFeature(StringRef Feature) const; 594 595 virtual void getGCCRegNames(const char * const *&Names, 596 unsigned &NumNames) const; 597 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 598 unsigned &NumAliases) const; 599 virtual bool validateAsmConstraint(const char *&Name, 600 TargetInfo::ConstraintInfo &Info) const { 601 switch (*Name) { 602 default: return false; 603 case 'O': // Zero 604 break; 605 case 'b': // Base register 606 case 'f': // Floating point register 607 Info.setAllowsRegister(); 608 break; 609 // FIXME: The following are added to allow parsing. 610 // I just took a guess at what the actions should be. 611 // Also, is more specific checking needed? I.e. specific registers? 612 case 'd': // Floating point register (containing 64-bit value) 613 case 'v': // Altivec vector register 614 Info.setAllowsRegister(); 615 break; 616 case 'w': 617 switch (Name[1]) { 618 case 'd':// VSX vector register to hold vector double data 619 case 'f':// VSX vector register to hold vector float data 620 case 's':// VSX vector register to hold scalar float data 621 case 'a':// Any VSX register 622 break; 623 default: 624 return false; 625 } 626 Info.setAllowsRegister(); 627 Name++; // Skip over 'w'. 628 break; 629 case 'h': // `MQ', `CTR', or `LINK' register 630 case 'q': // `MQ' register 631 case 'c': // `CTR' register 632 case 'l': // `LINK' register 633 case 'x': // `CR' register (condition register) number 0 634 case 'y': // `CR' register (condition register) 635 case 'z': // `XER[CA]' carry bit (part of the XER register) 636 Info.setAllowsRegister(); 637 break; 638 case 'I': // Signed 16-bit constant 639 case 'J': // Unsigned 16-bit constant shifted left 16 bits 640 // (use `L' instead for SImode constants) 641 case 'K': // Unsigned 16-bit constant 642 case 'L': // Signed 16-bit constant shifted left 16 bits 643 case 'M': // Constant larger than 31 644 case 'N': // Exact power of 2 645 case 'P': // Constant whose negation is a signed 16-bit constant 646 case 'G': // Floating point constant that can be loaded into a 647 // register with one instruction per word 648 case 'H': // Integer/Floating point constant that can be loaded 649 // into a register using three instructions 650 break; 651 case 'm': // Memory operand. Note that on PowerPC targets, m can 652 // include addresses that update the base register. It 653 // is therefore only safe to use `m' in an asm statement 654 // if that asm statement accesses the operand exactly once. 655 // The asm statement must also use `%U<opno>' as a 656 // placeholder for the "update" flag in the corresponding 657 // load or store instruction. For example: 658 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 659 // is correct but: 660 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 661 // is not. Use es rather than m if you don't want the base 662 // register to be updated. 663 case 'e': 664 if (Name[1] != 's') 665 return false; 666 // es: A "stable" memory operand; that is, one which does not 667 // include any automodification of the base register. Unlike 668 // `m', this constraint can be used in asm statements that 669 // might access the operand several times, or that might not 670 // access it at all. 671 Info.setAllowsMemory(); 672 Name++; // Skip over 'e'. 673 break; 674 case 'Q': // Memory operand that is an offset from a register (it is 675 // usually better to use `m' or `es' in asm statements) 676 case 'Z': // Memory operand that is an indexed or indirect from a 677 // register (it is usually better to use `m' or `es' in 678 // asm statements) 679 Info.setAllowsMemory(); 680 Info.setAllowsRegister(); 681 break; 682 case 'R': // AIX TOC entry 683 case 'a': // Address operand that is an indexed or indirect from a 684 // register (`p' is preferable for asm statements) 685 case 'S': // Constant suitable as a 64-bit mask operand 686 case 'T': // Constant suitable as a 32-bit mask operand 687 case 'U': // System V Release 4 small data area reference 688 case 't': // AND masks that can be performed by two rldic{l, r} 689 // instructions 690 case 'W': // Vector constant that does not require memory 691 case 'j': // Vector constant that is all zeros. 692 break; 693 // End FIXME. 694 } 695 return true; 696 } 697 virtual const char *getClobbers() const { 698 return ""; 699 } 700}; 701 702const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 703#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 704#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 705 ALL_LANGUAGES }, 706#include "clang/Basic/BuiltinsPPC.def" 707}; 708 709 710/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 711/// #defines that are not tied to a specific subtarget. 712void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 713 MacroBuilder &Builder) const { 714 // Target identification. 715 Builder.defineMacro("__ppc__"); 716 Builder.defineMacro("_ARCH_PPC"); 717 Builder.defineMacro("__powerpc__"); 718 Builder.defineMacro("__POWERPC__"); 719 if (PointerWidth == 64) { 720 Builder.defineMacro("_ARCH_PPC64"); 721 Builder.defineMacro("_LP64"); 722 Builder.defineMacro("__LP64__"); 723 Builder.defineMacro("__powerpc64__"); 724 Builder.defineMacro("__ppc64__"); 725 } else { 726 Builder.defineMacro("__ppc__"); 727 } 728 729 // Target properties. 730 if (getTriple().getOS() != llvm::Triple::NetBSD) 731 Builder.defineMacro("_BIG_ENDIAN"); 732 Builder.defineMacro("__BIG_ENDIAN__"); 733 734 // Subtarget options. 735 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 736 Builder.defineMacro("__REGISTER_PREFIX__", ""); 737 738 // FIXME: Should be controlled by command line option. 739 Builder.defineMacro("__LONG_DOUBLE_128__"); 740 741 if (Opts.AltiVec) { 742 Builder.defineMacro("__VEC__", "10206"); 743 Builder.defineMacro("__ALTIVEC__"); 744 } 745} 746 747bool PPCTargetInfo::hasFeature(StringRef Feature) const { 748 return Feature == "powerpc"; 749} 750 751 752const char * const PPCTargetInfo::GCCRegNames[] = { 753 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 754 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 755 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 756 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 757 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 758 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 759 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 760 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 761 "mq", "lr", "ctr", "ap", 762 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 763 "xer", 764 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 765 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 766 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 767 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 768 "vrsave", "vscr", 769 "spe_acc", "spefscr", 770 "sfp" 771}; 772 773void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 774 unsigned &NumNames) const { 775 Names = GCCRegNames; 776 NumNames = llvm::array_lengthof(GCCRegNames); 777} 778 779const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 780 // While some of these aliases do map to different registers 781 // they still share the same register name. 782 { { "0" }, "r0" }, 783 { { "1"}, "r1" }, 784 { { "2" }, "r2" }, 785 { { "3" }, "r3" }, 786 { { "4" }, "r4" }, 787 { { "5" }, "r5" }, 788 { { "6" }, "r6" }, 789 { { "7" }, "r7" }, 790 { { "8" }, "r8" }, 791 { { "9" }, "r9" }, 792 { { "10" }, "r10" }, 793 { { "11" }, "r11" }, 794 { { "12" }, "r12" }, 795 { { "13" }, "r13" }, 796 { { "14" }, "r14" }, 797 { { "15" }, "r15" }, 798 { { "16" }, "r16" }, 799 { { "17" }, "r17" }, 800 { { "18" }, "r18" }, 801 { { "19" }, "r19" }, 802 { { "20" }, "r20" }, 803 { { "21" }, "r21" }, 804 { { "22" }, "r22" }, 805 { { "23" }, "r23" }, 806 { { "24" }, "r24" }, 807 { { "25" }, "r25" }, 808 { { "26" }, "r26" }, 809 { { "27" }, "r27" }, 810 { { "28" }, "r28" }, 811 { { "29" }, "r29" }, 812 { { "30" }, "r30" }, 813 { { "31" }, "r31" }, 814 { { "fr0" }, "f0" }, 815 { { "fr1" }, "f1" }, 816 { { "fr2" }, "f2" }, 817 { { "fr3" }, "f3" }, 818 { { "fr4" }, "f4" }, 819 { { "fr5" }, "f5" }, 820 { { "fr6" }, "f6" }, 821 { { "fr7" }, "f7" }, 822 { { "fr8" }, "f8" }, 823 { { "fr9" }, "f9" }, 824 { { "fr10" }, "f10" }, 825 { { "fr11" }, "f11" }, 826 { { "fr12" }, "f12" }, 827 { { "fr13" }, "f13" }, 828 { { "fr14" }, "f14" }, 829 { { "fr15" }, "f15" }, 830 { { "fr16" }, "f16" }, 831 { { "fr17" }, "f17" }, 832 { { "fr18" }, "f18" }, 833 { { "fr19" }, "f19" }, 834 { { "fr20" }, "f20" }, 835 { { "fr21" }, "f21" }, 836 { { "fr22" }, "f22" }, 837 { { "fr23" }, "f23" }, 838 { { "fr24" }, "f24" }, 839 { { "fr25" }, "f25" }, 840 { { "fr26" }, "f26" }, 841 { { "fr27" }, "f27" }, 842 { { "fr28" }, "f28" }, 843 { { "fr29" }, "f29" }, 844 { { "fr30" }, "f30" }, 845 { { "fr31" }, "f31" }, 846 { { "cc" }, "cr0" }, 847}; 848 849void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 850 unsigned &NumAliases) const { 851 Aliases = GCCRegAliases; 852 NumAliases = llvm::array_lengthof(GCCRegAliases); 853} 854} // end anonymous namespace. 855 856namespace { 857class PPC32TargetInfo : public PPCTargetInfo { 858public: 859 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 860 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 861 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 862 863 switch (getTriple().getOS()) { 864 case llvm::Triple::Linux: 865 case llvm::Triple::FreeBSD: 866 case llvm::Triple::NetBSD: 867 SizeType = UnsignedInt; 868 PtrDiffType = SignedInt; 869 IntPtrType = SignedInt; 870 break; 871 default: 872 break; 873 } 874 875 if (getTriple().getOS() == llvm::Triple::FreeBSD) { 876 LongDoubleWidth = LongDoubleAlign = 64; 877 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 878 } 879 } 880 881 virtual const char *getVAListDeclaration() const { 882 // This is the ELF definition, and is overridden by the Darwin sub-target 883 return "typedef struct __va_list_tag {" 884 " unsigned char gpr;" 885 " unsigned char fpr;" 886 " unsigned short reserved;" 887 " void* overflow_arg_area;" 888 " void* reg_save_area;" 889 "} __builtin_va_list[1];"; 890 } 891}; 892} // end anonymous namespace. 893 894namespace { 895class PPC64TargetInfo : public PPCTargetInfo { 896public: 897 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 898 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 899 IntMaxType = SignedLong; 900 UIntMaxType = UnsignedLong; 901 Int64Type = SignedLong; 902 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 903 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 904 905 if (getTriple().getOS() == llvm::Triple::FreeBSD) { 906 LongDoubleWidth = LongDoubleAlign = 64; 907 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 908 } 909 } 910 virtual const char *getVAListDeclaration() const { 911 return "typedef char* __builtin_va_list;"; 912 } 913}; 914} // end anonymous namespace. 915 916 917namespace { 918class DarwinPPC32TargetInfo : 919 public DarwinTargetInfo<PPC32TargetInfo> { 920public: 921 DarwinPPC32TargetInfo(const std::string& triple) 922 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 923 HasAlignMac68kSupport = true; 924 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 925 LongLongAlign = 32; 926 SuitableAlign = 128; 927 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 928 "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32"; 929 } 930 virtual const char *getVAListDeclaration() const { 931 return "typedef char* __builtin_va_list;"; 932 } 933}; 934 935class DarwinPPC64TargetInfo : 936 public DarwinTargetInfo<PPC64TargetInfo> { 937public: 938 DarwinPPC64TargetInfo(const std::string& triple) 939 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 940 HasAlignMac68kSupport = true; 941 SuitableAlign = 128; 942 } 943}; 944} // end anonymous namespace. 945 946namespace { 947 static const unsigned PTXAddrSpaceMap[] = { 948 0, // opencl_global 949 4, // opencl_local 950 1 // opencl_constant 951 }; 952 class PTXTargetInfo : public TargetInfo { 953 static const char * const GCCRegNames[]; 954 static const Builtin::Info BuiltinInfo[]; 955 std::vector<llvm::StringRef> AvailableFeatures; 956 public: 957 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 958 BigEndian = false; 959 TLSSupported = false; 960 LongWidth = LongAlign = 64; 961 AddrSpaceMap = &PTXAddrSpaceMap; 962 // Define available target features 963 // These must be defined in sorted order! 964 AvailableFeatures.push_back("compute10"); 965 AvailableFeatures.push_back("compute11"); 966 AvailableFeatures.push_back("compute12"); 967 AvailableFeatures.push_back("compute13"); 968 AvailableFeatures.push_back("compute20"); 969 AvailableFeatures.push_back("double"); 970 AvailableFeatures.push_back("no-fma"); 971 AvailableFeatures.push_back("ptx20"); 972 AvailableFeatures.push_back("ptx21"); 973 AvailableFeatures.push_back("ptx22"); 974 AvailableFeatures.push_back("ptx23"); 975 AvailableFeatures.push_back("sm10"); 976 AvailableFeatures.push_back("sm11"); 977 AvailableFeatures.push_back("sm12"); 978 AvailableFeatures.push_back("sm13"); 979 AvailableFeatures.push_back("sm20"); 980 AvailableFeatures.push_back("sm21"); 981 AvailableFeatures.push_back("sm22"); 982 AvailableFeatures.push_back("sm23"); 983 } 984 virtual void getTargetDefines(const LangOptions &Opts, 985 MacroBuilder &Builder) const { 986 Builder.defineMacro("__PTX__"); 987 } 988 virtual void getTargetBuiltins(const Builtin::Info *&Records, 989 unsigned &NumRecords) const { 990 Records = BuiltinInfo; 991 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 992 } 993 virtual bool hasFeature(StringRef Feature) const { 994 return Feature == "ptx"; 995 } 996 997 virtual void getGCCRegNames(const char * const *&Names, 998 unsigned &NumNames) const; 999 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1000 unsigned &NumAliases) const { 1001 // No aliases. 1002 Aliases = 0; 1003 NumAliases = 0; 1004 } 1005 virtual bool validateAsmConstraint(const char *&Name, 1006 TargetInfo::ConstraintInfo &info) const { 1007 // FIXME: implement 1008 return true; 1009 } 1010 virtual const char *getClobbers() const { 1011 // FIXME: Is this really right? 1012 return ""; 1013 } 1014 virtual const char *getVAListDeclaration() const { 1015 // FIXME: implement 1016 return "typedef char* __builtin_va_list;"; 1017 } 1018 1019 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1020 StringRef Name, 1021 bool Enabled) const; 1022 }; 1023 1024 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 1025#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1026#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1027 ALL_LANGUAGES }, 1028#include "clang/Basic/BuiltinsPTX.def" 1029 }; 1030 1031 const char * const PTXTargetInfo::GCCRegNames[] = { 1032 "r0" 1033 }; 1034 1035 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 1036 unsigned &NumNames) const { 1037 Names = GCCRegNames; 1038 NumNames = llvm::array_lengthof(GCCRegNames); 1039 } 1040 1041 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1042 StringRef Name, 1043 bool Enabled) const { 1044 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 1045 Name)) { 1046 Features[Name] = Enabled; 1047 return true; 1048 } else { 1049 return false; 1050 } 1051 } 1052 1053 class PTX32TargetInfo : public PTXTargetInfo { 1054 public: 1055 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1056 PointerWidth = PointerAlign = 32; 1057 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 1058 DescriptionString 1059 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 1060 } 1061 }; 1062 1063 class PTX64TargetInfo : public PTXTargetInfo { 1064 public: 1065 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1066 PointerWidth = PointerAlign = 64; 1067 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1068 DescriptionString 1069 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 1070 } 1071 }; 1072} 1073 1074namespace { 1075// MBlaze abstract base class 1076class MBlazeTargetInfo : public TargetInfo { 1077 static const char * const GCCRegNames[]; 1078 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1079 1080public: 1081 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1082 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1083 } 1084 1085 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1086 unsigned &NumRecords) const { 1087 // FIXME: Implement. 1088 Records = 0; 1089 NumRecords = 0; 1090 } 1091 1092 virtual void getTargetDefines(const LangOptions &Opts, 1093 MacroBuilder &Builder) const; 1094 1095 virtual bool hasFeature(StringRef Feature) const { 1096 return Feature == "mblaze"; 1097 } 1098 1099 virtual const char *getVAListDeclaration() const { 1100 return "typedef char* __builtin_va_list;"; 1101 } 1102 virtual const char *getTargetPrefix() const { 1103 return "mblaze"; 1104 } 1105 virtual void getGCCRegNames(const char * const *&Names, 1106 unsigned &NumNames) const; 1107 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1108 unsigned &NumAliases) const; 1109 virtual bool validateAsmConstraint(const char *&Name, 1110 TargetInfo::ConstraintInfo &Info) const { 1111 switch (*Name) { 1112 default: return false; 1113 case 'O': // Zero 1114 return true; 1115 case 'b': // Base register 1116 case 'f': // Floating point register 1117 Info.setAllowsRegister(); 1118 return true; 1119 } 1120 } 1121 virtual const char *getClobbers() const { 1122 return ""; 1123 } 1124}; 1125 1126/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1127/// #defines that are not tied to a specific subtarget. 1128void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1129 MacroBuilder &Builder) const { 1130 // Target identification. 1131 Builder.defineMacro("__microblaze__"); 1132 Builder.defineMacro("_ARCH_MICROBLAZE"); 1133 Builder.defineMacro("__MICROBLAZE__"); 1134 1135 // Target properties. 1136 Builder.defineMacro("_BIG_ENDIAN"); 1137 Builder.defineMacro("__BIG_ENDIAN__"); 1138 1139 // Subtarget options. 1140 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1141} 1142 1143 1144const char * const MBlazeTargetInfo::GCCRegNames[] = { 1145 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1146 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1147 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1148 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1149 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1150 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1151 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1152 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1153 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1154 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1155}; 1156 1157void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1158 unsigned &NumNames) const { 1159 Names = GCCRegNames; 1160 NumNames = llvm::array_lengthof(GCCRegNames); 1161} 1162 1163const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1164 { {"f0"}, "r0" }, 1165 { {"f1"}, "r1" }, 1166 { {"f2"}, "r2" }, 1167 { {"f3"}, "r3" }, 1168 { {"f4"}, "r4" }, 1169 { {"f5"}, "r5" }, 1170 { {"f6"}, "r6" }, 1171 { {"f7"}, "r7" }, 1172 { {"f8"}, "r8" }, 1173 { {"f9"}, "r9" }, 1174 { {"f10"}, "r10" }, 1175 { {"f11"}, "r11" }, 1176 { {"f12"}, "r12" }, 1177 { {"f13"}, "r13" }, 1178 { {"f14"}, "r14" }, 1179 { {"f15"}, "r15" }, 1180 { {"f16"}, "r16" }, 1181 { {"f17"}, "r17" }, 1182 { {"f18"}, "r18" }, 1183 { {"f19"}, "r19" }, 1184 { {"f20"}, "r20" }, 1185 { {"f21"}, "r21" }, 1186 { {"f22"}, "r22" }, 1187 { {"f23"}, "r23" }, 1188 { {"f24"}, "r24" }, 1189 { {"f25"}, "r25" }, 1190 { {"f26"}, "r26" }, 1191 { {"f27"}, "r27" }, 1192 { {"f28"}, "r28" }, 1193 { {"f29"}, "r29" }, 1194 { {"f30"}, "r30" }, 1195 { {"f31"}, "r31" }, 1196}; 1197 1198void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1199 unsigned &NumAliases) const { 1200 Aliases = GCCRegAliases; 1201 NumAliases = llvm::array_lengthof(GCCRegAliases); 1202} 1203} // end anonymous namespace. 1204 1205namespace { 1206// Namespace for x86 abstract base class 1207const Builtin::Info BuiltinInfo[] = { 1208#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1209#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1210 ALL_LANGUAGES }, 1211#include "clang/Basic/BuiltinsX86.def" 1212}; 1213 1214static const char* const GCCRegNames[] = { 1215 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1216 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1217 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1218 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1219 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1220 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1221 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1222 "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", 1223 "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15", 1224}; 1225 1226const TargetInfo::AddlRegName AddlRegNames[] = { 1227 { { "al", "ah", "eax", "rax" }, 0 }, 1228 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1229 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1230 { { "dl", "dh", "edx", "rdx" }, 1 }, 1231 { { "esi", "rsi" }, 4 }, 1232 { { "edi", "rdi" }, 5 }, 1233 { { "esp", "rsp" }, 7 }, 1234 { { "ebp", "rbp" }, 6 }, 1235}; 1236 1237// X86 target abstract base class; x86-32 and x86-64 are very close, so 1238// most of the implementation can be shared. 1239class X86TargetInfo : public TargetInfo { 1240 enum X86SSEEnum { 1241 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2 1242 } SSELevel; 1243 enum MMX3DNowEnum { 1244 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1245 } MMX3DNowLevel; 1246 1247 bool HasAES; 1248 bool HasLZCNT; 1249 bool HasBMI; 1250 bool HasBMI2; 1251 bool HasPOPCNT; 1252 bool HasFMA4; 1253 1254 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1255 /// 1256 /// Each enumeration represents a particular CPU supported by Clang. These 1257 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1258 enum CPUKind { 1259 CK_Generic, 1260 1261 /// \name i386 1262 /// i386-generation processors. 1263 //@{ 1264 CK_i386, 1265 //@} 1266 1267 /// \name i486 1268 /// i486-generation processors. 1269 //@{ 1270 CK_i486, 1271 CK_WinChipC6, 1272 CK_WinChip2, 1273 CK_C3, 1274 //@} 1275 1276 /// \name i586 1277 /// i586-generation processors, P5 microarchitecture based. 1278 //@{ 1279 CK_i586, 1280 CK_Pentium, 1281 CK_PentiumMMX, 1282 //@} 1283 1284 /// \name i686 1285 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1286 //@{ 1287 CK_i686, 1288 CK_PentiumPro, 1289 CK_Pentium2, 1290 CK_Pentium3, 1291 CK_Pentium3M, 1292 CK_PentiumM, 1293 CK_C3_2, 1294 1295 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1296 /// Clang however has some logic to suport this. 1297 // FIXME: Warn, deprecate, and potentially remove this. 1298 CK_Yonah, 1299 //@} 1300 1301 /// \name Netburst 1302 /// Netburst microarchitecture based processors. 1303 //@{ 1304 CK_Pentium4, 1305 CK_Pentium4M, 1306 CK_Prescott, 1307 CK_Nocona, 1308 //@} 1309 1310 /// \name Core 1311 /// Core microarchitecture based processors. 1312 //@{ 1313 CK_Core2, 1314 1315 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1316 /// codename which GCC no longer accepts as an option to -march, but Clang 1317 /// has some logic for recognizing it. 1318 // FIXME: Warn, deprecate, and potentially remove this. 1319 CK_Penryn, 1320 //@} 1321 1322 /// \name Atom 1323 /// Atom processors 1324 //@{ 1325 CK_Atom, 1326 //@} 1327 1328 /// \name Nehalem 1329 /// Nehalem microarchitecture based processors. 1330 //@{ 1331 CK_Corei7, 1332 CK_Corei7AVX, 1333 CK_CoreAVXi, 1334 CK_CoreAVX2, 1335 //@} 1336 1337 /// \name K6 1338 /// K6 architecture processors. 1339 //@{ 1340 CK_K6, 1341 CK_K6_2, 1342 CK_K6_3, 1343 //@} 1344 1345 /// \name K7 1346 /// K7 architecture processors. 1347 //@{ 1348 CK_Athlon, 1349 CK_AthlonThunderbird, 1350 CK_Athlon4, 1351 CK_AthlonXP, 1352 CK_AthlonMP, 1353 //@} 1354 1355 /// \name K8 1356 /// K8 architecture processors. 1357 //@{ 1358 CK_Athlon64, 1359 CK_Athlon64SSE3, 1360 CK_AthlonFX, 1361 CK_K8, 1362 CK_K8SSE3, 1363 CK_Opteron, 1364 CK_OpteronSSE3, 1365 CK_AMDFAM10, 1366 //@} 1367 1368 /// \name Bobcat 1369 /// Bobcat architecture processors. 1370 //@{ 1371 CK_BTVER1, 1372 //@} 1373 1374 /// \name Bulldozer 1375 /// Bulldozer architecture processors. 1376 //@{ 1377 CK_BDVER1, 1378 CK_BDVER2, 1379 //@} 1380 1381 /// This specification is deprecated and will be removed in the future. 1382 /// Users should prefer \see CK_K8. 1383 // FIXME: Warn on this when the CPU is set to it. 1384 CK_x86_64, 1385 //@} 1386 1387 /// \name Geode 1388 /// Geode processors. 1389 //@{ 1390 CK_Geode 1391 //@} 1392 } CPU; 1393 1394public: 1395 X86TargetInfo(const std::string& triple) 1396 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1397 HasAES(false), HasLZCNT(false), HasBMI(false), HasBMI2(false), 1398 HasPOPCNT(false), HasFMA4(false), CPU(CK_Generic) { 1399 BigEndian = false; 1400 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1401 } 1402 virtual unsigned getFloatEvalMethod() const { 1403 // X87 evaluates with 80 bits "long double" precision. 1404 return SSELevel == NoSSE ? 2 : 0; 1405 } 1406 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1407 unsigned &NumRecords) const { 1408 Records = BuiltinInfo; 1409 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1410 } 1411 virtual void getGCCRegNames(const char * const *&Names, 1412 unsigned &NumNames) const { 1413 Names = GCCRegNames; 1414 NumNames = llvm::array_lengthof(GCCRegNames); 1415 } 1416 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1417 unsigned &NumAliases) const { 1418 Aliases = 0; 1419 NumAliases = 0; 1420 } 1421 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1422 unsigned &NumNames) const { 1423 Names = AddlRegNames; 1424 NumNames = llvm::array_lengthof(AddlRegNames); 1425 } 1426 virtual bool validateAsmConstraint(const char *&Name, 1427 TargetInfo::ConstraintInfo &info) const; 1428 virtual std::string convertConstraint(const char *&Constraint) const; 1429 virtual const char *getClobbers() const { 1430 return "~{dirflag},~{fpsr},~{flags}"; 1431 } 1432 virtual void getTargetDefines(const LangOptions &Opts, 1433 MacroBuilder &Builder) const; 1434 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1435 StringRef Name, 1436 bool Enabled) const; 1437 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1438 virtual bool hasFeature(StringRef Feature) const; 1439 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1440 virtual const char* getABI() const { 1441 if (PointerWidth == 64 && SSELevel >= AVX) 1442 return "avx"; 1443 else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow) 1444 return "no-mmx"; 1445 return ""; 1446 } 1447 virtual bool setCPU(const std::string &Name) { 1448 CPU = llvm::StringSwitch<CPUKind>(Name) 1449 .Case("i386", CK_i386) 1450 .Case("i486", CK_i486) 1451 .Case("winchip-c6", CK_WinChipC6) 1452 .Case("winchip2", CK_WinChip2) 1453 .Case("c3", CK_C3) 1454 .Case("i586", CK_i586) 1455 .Case("pentium", CK_Pentium) 1456 .Case("pentium-mmx", CK_PentiumMMX) 1457 .Case("i686", CK_i686) 1458 .Case("pentiumpro", CK_PentiumPro) 1459 .Case("pentium2", CK_Pentium2) 1460 .Case("pentium3", CK_Pentium3) 1461 .Case("pentium3m", CK_Pentium3M) 1462 .Case("pentium-m", CK_PentiumM) 1463 .Case("c3-2", CK_C3_2) 1464 .Case("yonah", CK_Yonah) 1465 .Case("pentium4", CK_Pentium4) 1466 .Case("pentium4m", CK_Pentium4M) 1467 .Case("prescott", CK_Prescott) 1468 .Case("nocona", CK_Nocona) 1469 .Case("core2", CK_Core2) 1470 .Case("penryn", CK_Penryn) 1471 .Case("atom", CK_Atom) 1472 .Case("corei7", CK_Corei7) 1473 .Case("corei7-avx", CK_Corei7AVX) 1474 .Case("core-avx-i", CK_CoreAVXi) 1475 .Case("core-avx2", CK_CoreAVX2) 1476 .Case("k6", CK_K6) 1477 .Case("k6-2", CK_K6_2) 1478 .Case("k6-3", CK_K6_3) 1479 .Case("athlon", CK_Athlon) 1480 .Case("athlon-tbird", CK_AthlonThunderbird) 1481 .Case("athlon-4", CK_Athlon4) 1482 .Case("athlon-xp", CK_AthlonXP) 1483 .Case("athlon-mp", CK_AthlonMP) 1484 .Case("athlon64", CK_Athlon64) 1485 .Case("athlon64-sse3", CK_Athlon64SSE3) 1486 .Case("athlon-fx", CK_AthlonFX) 1487 .Case("k8", CK_K8) 1488 .Case("k8-sse3", CK_K8SSE3) 1489 .Case("opteron", CK_Opteron) 1490 .Case("opteron-sse3", CK_OpteronSSE3) 1491 .Case("amdfam10", CK_AMDFAM10) 1492 .Case("btver1", CK_BTVER1) 1493 .Case("bdver1", CK_BDVER1) 1494 .Case("bdver2", CK_BDVER2) 1495 .Case("x86-64", CK_x86_64) 1496 .Case("geode", CK_Geode) 1497 .Default(CK_Generic); 1498 1499 // Perform any per-CPU checks necessary to determine if this CPU is 1500 // acceptable. 1501 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1502 // invalid without explaining *why*. 1503 switch (CPU) { 1504 case CK_Generic: 1505 // No processor selected! 1506 return false; 1507 1508 case CK_i386: 1509 case CK_i486: 1510 case CK_WinChipC6: 1511 case CK_WinChip2: 1512 case CK_C3: 1513 case CK_i586: 1514 case CK_Pentium: 1515 case CK_PentiumMMX: 1516 case CK_i686: 1517 case CK_PentiumPro: 1518 case CK_Pentium2: 1519 case CK_Pentium3: 1520 case CK_Pentium3M: 1521 case CK_PentiumM: 1522 case CK_Yonah: 1523 case CK_C3_2: 1524 case CK_Pentium4: 1525 case CK_Pentium4M: 1526 case CK_Prescott: 1527 case CK_K6: 1528 case CK_K6_2: 1529 case CK_K6_3: 1530 case CK_Athlon: 1531 case CK_AthlonThunderbird: 1532 case CK_Athlon4: 1533 case CK_AthlonXP: 1534 case CK_AthlonMP: 1535 case CK_Geode: 1536 // Only accept certain architectures when compiling in 32-bit mode. 1537 if (PointerWidth != 32) 1538 return false; 1539 1540 // Fallthrough 1541 case CK_Nocona: 1542 case CK_Core2: 1543 case CK_Penryn: 1544 case CK_Atom: 1545 case CK_Corei7: 1546 case CK_Corei7AVX: 1547 case CK_CoreAVXi: 1548 case CK_CoreAVX2: 1549 case CK_Athlon64: 1550 case CK_Athlon64SSE3: 1551 case CK_AthlonFX: 1552 case CK_K8: 1553 case CK_K8SSE3: 1554 case CK_Opteron: 1555 case CK_OpteronSSE3: 1556 case CK_AMDFAM10: 1557 case CK_BTVER1: 1558 case CK_BDVER1: 1559 case CK_BDVER2: 1560 case CK_x86_64: 1561 return true; 1562 } 1563 llvm_unreachable("Unhandled CPU kind"); 1564 } 1565}; 1566 1567void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1568 // FIXME: This should not be here. 1569 Features["3dnow"] = false; 1570 Features["3dnowa"] = false; 1571 Features["mmx"] = false; 1572 Features["sse"] = false; 1573 Features["sse2"] = false; 1574 Features["sse3"] = false; 1575 Features["ssse3"] = false; 1576 Features["sse41"] = false; 1577 Features["sse42"] = false; 1578 Features["sse4a"] = false; 1579 Features["aes"] = false; 1580 Features["avx"] = false; 1581 Features["avx2"] = false; 1582 Features["lzcnt"] = false; 1583 Features["bmi"] = false; 1584 Features["bmi2"] = false; 1585 Features["popcnt"] = false; 1586 Features["fma4"] = false; 1587 1588 // FIXME: This *really* should not be here. 1589 1590 // X86_64 always has SSE2. 1591 if (PointerWidth == 64) 1592 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1593 1594 switch (CPU) { 1595 case CK_Generic: 1596 case CK_i386: 1597 case CK_i486: 1598 case CK_i586: 1599 case CK_Pentium: 1600 case CK_i686: 1601 case CK_PentiumPro: 1602 break; 1603 case CK_PentiumMMX: 1604 case CK_Pentium2: 1605 setFeatureEnabled(Features, "mmx", true); 1606 break; 1607 case CK_Pentium3: 1608 case CK_Pentium3M: 1609 setFeatureEnabled(Features, "mmx", true); 1610 setFeatureEnabled(Features, "sse", true); 1611 break; 1612 case CK_PentiumM: 1613 case CK_Pentium4: 1614 case CK_Pentium4M: 1615 case CK_x86_64: 1616 setFeatureEnabled(Features, "mmx", true); 1617 setFeatureEnabled(Features, "sse2", true); 1618 break; 1619 case CK_Yonah: 1620 case CK_Prescott: 1621 case CK_Nocona: 1622 setFeatureEnabled(Features, "mmx", true); 1623 setFeatureEnabled(Features, "sse3", true); 1624 break; 1625 case CK_Core2: 1626 setFeatureEnabled(Features, "mmx", true); 1627 setFeatureEnabled(Features, "ssse3", true); 1628 break; 1629 case CK_Penryn: 1630 setFeatureEnabled(Features, "mmx", true); 1631 setFeatureEnabled(Features, "sse4.1", true); 1632 break; 1633 case CK_Atom: 1634 setFeatureEnabled(Features, "mmx", true); 1635 setFeatureEnabled(Features, "ssse3", true); 1636 break; 1637 case CK_Corei7: 1638 setFeatureEnabled(Features, "mmx", true); 1639 setFeatureEnabled(Features, "sse4", true); 1640 setFeatureEnabled(Features, "aes", true); 1641 break; 1642 case CK_Corei7AVX: 1643 case CK_CoreAVXi: 1644 setFeatureEnabled(Features, "mmx", true); 1645 setFeatureEnabled(Features, "sse4", true); 1646 setFeatureEnabled(Features, "aes", true); 1647 //setFeatureEnabled(Features, "avx", true); 1648 break; 1649 case CK_CoreAVX2: 1650 setFeatureEnabled(Features, "mmx", true); 1651 setFeatureEnabled(Features, "sse4", true); 1652 setFeatureEnabled(Features, "aes", true); 1653 setFeatureEnabled(Features, "lzcnt", true); 1654 setFeatureEnabled(Features, "bmi", true); 1655 setFeatureEnabled(Features, "bmi2", true); 1656 //setFeatureEnabled(Features, "avx2", true); 1657 break; 1658 case CK_K6: 1659 case CK_WinChipC6: 1660 setFeatureEnabled(Features, "mmx", true); 1661 break; 1662 case CK_K6_2: 1663 case CK_K6_3: 1664 case CK_WinChip2: 1665 case CK_C3: 1666 setFeatureEnabled(Features, "3dnow", true); 1667 break; 1668 case CK_Athlon: 1669 case CK_AthlonThunderbird: 1670 case CK_Geode: 1671 setFeatureEnabled(Features, "3dnowa", true); 1672 break; 1673 case CK_Athlon4: 1674 case CK_AthlonXP: 1675 case CK_AthlonMP: 1676 setFeatureEnabled(Features, "sse", true); 1677 setFeatureEnabled(Features, "3dnowa", true); 1678 break; 1679 case CK_K8: 1680 case CK_Opteron: 1681 case CK_Athlon64: 1682 case CK_AthlonFX: 1683 setFeatureEnabled(Features, "sse2", true); 1684 setFeatureEnabled(Features, "3dnowa", true); 1685 break; 1686 case CK_K8SSE3: 1687 case CK_OpteronSSE3: 1688 case CK_Athlon64SSE3: 1689 setFeatureEnabled(Features, "sse3", true); 1690 setFeatureEnabled(Features, "3dnowa", true); 1691 break; 1692 case CK_AMDFAM10: 1693 setFeatureEnabled(Features, "sse3", true); 1694 setFeatureEnabled(Features, "sse4a", true); 1695 setFeatureEnabled(Features, "3dnowa", true); 1696 break; 1697 case CK_BTVER1: 1698 setFeatureEnabled(Features, "ssse3", true); 1699 setFeatureEnabled(Features, "sse4a", true); 1700 case CK_BDVER1: 1701 case CK_BDVER2: 1702 setFeatureEnabled(Features, "sse4", true); 1703 setFeatureEnabled(Features, "sse4a", true); 1704 setFeatureEnabled(Features, "aes", true); 1705 break; 1706 case CK_C3_2: 1707 setFeatureEnabled(Features, "mmx", true); 1708 setFeatureEnabled(Features, "sse", true); 1709 break; 1710 } 1711} 1712 1713bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1714 StringRef Name, 1715 bool Enabled) const { 1716 // FIXME: This *really* should not be here. We need some way of translating 1717 // options into llvm subtarget features. 1718 if (!Features.count(Name) && 1719 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1720 return false; 1721 1722 // FIXME: this should probably use a switch with fall through. 1723 1724 if (Enabled) { 1725 if (Name == "mmx") 1726 Features["mmx"] = true; 1727 else if (Name == "sse") 1728 Features["mmx"] = Features["sse"] = true; 1729 else if (Name == "sse2") 1730 Features["mmx"] = Features["sse"] = Features["sse2"] = true; 1731 else if (Name == "sse3") 1732 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1733 true; 1734 else if (Name == "ssse3") 1735 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1736 Features["ssse3"] = true; 1737 else if (Name == "sse4" || Name == "sse4.2") 1738 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1739 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1740 Features["popcnt"] = true; 1741 else if (Name == "sse4.1") 1742 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1743 Features["ssse3"] = Features["sse41"] = true; 1744 else if (Name == "3dnow") 1745 Features["mmx"] = Features["3dnow"] = true; 1746 else if (Name == "3dnowa") 1747 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1748 else if (Name == "aes") 1749 Features["aes"] = true; 1750 else if (Name == "avx") 1751 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1752 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1753 Features["popcnt"] = Features["avx"] = true; 1754 else if (Name == "avx2") 1755 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1756 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1757 Features["popcnt"] = Features["avx"] = Features["avx2"] = true; 1758 else if (Name == "fma4") 1759 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1760 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1761 Features["popcnt"] = Features["avx"] = Features["fma4"] = true; 1762 else if (Name == "sse4a") 1763 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1764 Features["lzcnt"] = Features["popcnt"] = Features["sse4a"] = true; 1765 else if (Name == "lzcnt") 1766 Features["lzcnt"] = true; 1767 else if (Name == "bmi") 1768 Features["bmi"] = true; 1769 else if (Name == "bmi2") 1770 Features["bmi2"] = true; 1771 else if (Name == "popcnt") 1772 Features["popcnt"] = true; 1773 } else { 1774 if (Name == "mmx") 1775 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1776 else if (Name == "sse") 1777 Features["sse"] = Features["sse2"] = Features["sse3"] = 1778 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1779 Features["sse4a"] = false; 1780 else if (Name == "sse2") 1781 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1782 Features["sse41"] = Features["sse42"] = Features["sse4a"] = false; 1783 else if (Name == "sse3") 1784 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1785 Features["sse42"] = Features["sse4a"] = false; 1786 else if (Name == "ssse3") 1787 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1788 else if (Name == "sse4" || Name == "sse4.1") 1789 Features["sse41"] = Features["sse42"] = false; 1790 else if (Name == "sse4.2") 1791 Features["sse42"] = false; 1792 else if (Name == "3dnow") 1793 Features["3dnow"] = Features["3dnowa"] = false; 1794 else if (Name == "3dnowa") 1795 Features["3dnowa"] = false; 1796 else if (Name == "aes") 1797 Features["aes"] = false; 1798 else if (Name == "avx") 1799 Features["avx"] = Features["avx2"] = Features["fma4"] = false; 1800 else if (Name == "avx2") 1801 Features["avx2"] = false; 1802 else if (Name == "sse4a") 1803 Features["sse4a"] = false; 1804 else if (Name == "lzcnt") 1805 Features["lzcnt"] = false; 1806 else if (Name == "bmi") 1807 Features["bmi"] = false; 1808 else if (Name == "bmi2") 1809 Features["bmi2"] = false; 1810 else if (Name == "popcnt") 1811 Features["popcnt"] = false; 1812 else if (Name == "fma4") 1813 Features["fma4"] = false; 1814 } 1815 1816 return true; 1817} 1818 1819/// HandleTargetOptions - Perform initialization based on the user 1820/// configured set of features. 1821void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1822 // Remember the maximum enabled sselevel. 1823 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1824 // Ignore disabled features. 1825 if (Features[i][0] == '-') 1826 continue; 1827 1828 StringRef Feature = StringRef(Features[i]).substr(1); 1829 1830 if (Feature == "aes") { 1831 HasAES = true; 1832 continue; 1833 } 1834 1835 if (Feature == "lzcnt") { 1836 HasLZCNT = true; 1837 continue; 1838 } 1839 1840 if (Feature == "bmi") { 1841 HasBMI = true; 1842 continue; 1843 } 1844 1845 if (Feature == "bmi2") { 1846 HasBMI2 = true; 1847 continue; 1848 } 1849 1850 if (Feature == "popcnt") { 1851 HasPOPCNT = true; 1852 continue; 1853 } 1854 1855 if (Feature == "fma4") { 1856 HasFMA4 = true; 1857 continue; 1858 } 1859 1860 assert(Features[i][0] == '+' && "Invalid target feature!"); 1861 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature) 1862 .Case("avx2", AVX2) 1863 .Case("avx", AVX) 1864 .Case("sse42", SSE42) 1865 .Case("sse41", SSE41) 1866 .Case("ssse3", SSSE3) 1867 .Case("sse3", SSE3) 1868 .Case("sse2", SSE2) 1869 .Case("sse", SSE1) 1870 .Default(NoSSE); 1871 SSELevel = std::max(SSELevel, Level); 1872 1873 MMX3DNowEnum ThreeDNowLevel = 1874 llvm::StringSwitch<MMX3DNowEnum>(Feature) 1875 .Case("3dnowa", AMD3DNowAthlon) 1876 .Case("3dnow", AMD3DNow) 1877 .Case("mmx", MMX) 1878 .Default(NoMMX3DNow); 1879 1880 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1881 } 1882 1883 // Don't tell the backend if we're turning off mmx; it will end up disabling 1884 // SSE, which we don't want. 1885 std::vector<std::string>::iterator it; 1886 it = std::find(Features.begin(), Features.end(), "-mmx"); 1887 if (it != Features.end()) 1888 Features.erase(it); 1889} 1890 1891/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1892/// definitions for this particular subtarget. 1893void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1894 MacroBuilder &Builder) const { 1895 // Target identification. 1896 if (PointerWidth == 64) { 1897 if (getLongWidth() == 64) { 1898 Builder.defineMacro("_LP64"); 1899 Builder.defineMacro("__LP64__"); 1900 } 1901 Builder.defineMacro("__amd64__"); 1902 Builder.defineMacro("__amd64"); 1903 Builder.defineMacro("__x86_64"); 1904 Builder.defineMacro("__x86_64__"); 1905 } else { 1906 DefineStd(Builder, "i386", Opts); 1907 } 1908 1909 // Subtarget options. 1910 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 1911 // truly should be based on -mtune options. 1912 switch (CPU) { 1913 case CK_Generic: 1914 break; 1915 case CK_i386: 1916 // The rest are coming from the i386 define above. 1917 Builder.defineMacro("__tune_i386__"); 1918 break; 1919 case CK_i486: 1920 case CK_WinChipC6: 1921 case CK_WinChip2: 1922 case CK_C3: 1923 defineCPUMacros(Builder, "i486"); 1924 break; 1925 case CK_PentiumMMX: 1926 Builder.defineMacro("__pentium_mmx__"); 1927 Builder.defineMacro("__tune_pentium_mmx__"); 1928 // Fallthrough 1929 case CK_i586: 1930 case CK_Pentium: 1931 defineCPUMacros(Builder, "i586"); 1932 defineCPUMacros(Builder, "pentium"); 1933 break; 1934 case CK_Pentium3: 1935 case CK_Pentium3M: 1936 case CK_PentiumM: 1937 Builder.defineMacro("__tune_pentium3__"); 1938 // Fallthrough 1939 case CK_Pentium2: 1940 case CK_C3_2: 1941 Builder.defineMacro("__tune_pentium2__"); 1942 // Fallthrough 1943 case CK_PentiumPro: 1944 Builder.defineMacro("__tune_i686__"); 1945 Builder.defineMacro("__tune_pentiumpro__"); 1946 // Fallthrough 1947 case CK_i686: 1948 Builder.defineMacro("__i686"); 1949 Builder.defineMacro("__i686__"); 1950 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 1951 Builder.defineMacro("__pentiumpro"); 1952 Builder.defineMacro("__pentiumpro__"); 1953 break; 1954 case CK_Pentium4: 1955 case CK_Pentium4M: 1956 defineCPUMacros(Builder, "pentium4"); 1957 break; 1958 case CK_Yonah: 1959 case CK_Prescott: 1960 case CK_Nocona: 1961 defineCPUMacros(Builder, "nocona"); 1962 break; 1963 case CK_Core2: 1964 case CK_Penryn: 1965 defineCPUMacros(Builder, "core2"); 1966 break; 1967 case CK_Atom: 1968 defineCPUMacros(Builder, "atom"); 1969 break; 1970 case CK_Corei7: 1971 case CK_Corei7AVX: 1972 case CK_CoreAVXi: 1973 case CK_CoreAVX2: 1974 defineCPUMacros(Builder, "corei7"); 1975 break; 1976 case CK_K6_2: 1977 Builder.defineMacro("__k6_2__"); 1978 Builder.defineMacro("__tune_k6_2__"); 1979 // Fallthrough 1980 case CK_K6_3: 1981 if (CPU != CK_K6_2) { // In case of fallthrough 1982 // FIXME: GCC may be enabling these in cases where some other k6 1983 // architecture is specified but -m3dnow is explicitly provided. The 1984 // exact semantics need to be determined and emulated here. 1985 Builder.defineMacro("__k6_3__"); 1986 Builder.defineMacro("__tune_k6_3__"); 1987 } 1988 // Fallthrough 1989 case CK_K6: 1990 defineCPUMacros(Builder, "k6"); 1991 break; 1992 case CK_Athlon: 1993 case CK_AthlonThunderbird: 1994 case CK_Athlon4: 1995 case CK_AthlonXP: 1996 case CK_AthlonMP: 1997 defineCPUMacros(Builder, "athlon"); 1998 if (SSELevel != NoSSE) { 1999 Builder.defineMacro("__athlon_sse__"); 2000 Builder.defineMacro("__tune_athlon_sse__"); 2001 } 2002 break; 2003 case CK_K8: 2004 case CK_K8SSE3: 2005 case CK_x86_64: 2006 case CK_Opteron: 2007 case CK_OpteronSSE3: 2008 case CK_Athlon64: 2009 case CK_Athlon64SSE3: 2010 case CK_AthlonFX: 2011 defineCPUMacros(Builder, "k8"); 2012 break; 2013 case CK_AMDFAM10: 2014 defineCPUMacros(Builder, "amdfam10"); 2015 break; 2016 case CK_BTVER1: 2017 defineCPUMacros(Builder, "btver1"); 2018 break; 2019 case CK_BDVER1: 2020 defineCPUMacros(Builder, "bdver1"); 2021 break; 2022 case CK_BDVER2: 2023 defineCPUMacros(Builder, "bdver2"); 2024 break; 2025 case CK_Geode: 2026 defineCPUMacros(Builder, "geode"); 2027 break; 2028 } 2029 2030 // Target properties. 2031 Builder.defineMacro("__LITTLE_ENDIAN__"); 2032 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2033 2034 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 2035 // functions in glibc header files that use FP Stack inline asm which the 2036 // backend can't deal with (PR879). 2037 Builder.defineMacro("__NO_MATH_INLINES"); 2038 2039 if (HasAES) 2040 Builder.defineMacro("__AES__"); 2041 2042 if (HasLZCNT) 2043 Builder.defineMacro("__LZCNT__"); 2044 2045 if (HasBMI) 2046 Builder.defineMacro("__BMI__"); 2047 2048 if (HasBMI2) 2049 Builder.defineMacro("__BMI2__"); 2050 2051 if (HasPOPCNT) 2052 Builder.defineMacro("__POPCNT__"); 2053 2054 if (HasFMA4) 2055 Builder.defineMacro("__FMA4__"); 2056 2057 // Each case falls through to the previous one here. 2058 switch (SSELevel) { 2059 case AVX2: 2060 Builder.defineMacro("__AVX2__"); 2061 case AVX: 2062 Builder.defineMacro("__AVX__"); 2063 case SSE42: 2064 Builder.defineMacro("__SSE4_2__"); 2065 case SSE41: 2066 Builder.defineMacro("__SSE4_1__"); 2067 case SSSE3: 2068 Builder.defineMacro("__SSSE3__"); 2069 case SSE3: 2070 Builder.defineMacro("__SSE3__"); 2071 case SSE2: 2072 Builder.defineMacro("__SSE2__"); 2073 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 2074 case SSE1: 2075 Builder.defineMacro("__SSE__"); 2076 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 2077 case NoSSE: 2078 break; 2079 } 2080 2081 if (Opts.MicrosoftExt && PointerWidth == 32) { 2082 switch (SSELevel) { 2083 case AVX2: 2084 case AVX: 2085 case SSE42: 2086 case SSE41: 2087 case SSSE3: 2088 case SSE3: 2089 case SSE2: 2090 Builder.defineMacro("_M_IX86_FP", Twine(2)); 2091 break; 2092 case SSE1: 2093 Builder.defineMacro("_M_IX86_FP", Twine(1)); 2094 break; 2095 default: 2096 Builder.defineMacro("_M_IX86_FP", Twine(0)); 2097 } 2098 } 2099 2100 // Each case falls through to the previous one here. 2101 switch (MMX3DNowLevel) { 2102 case AMD3DNowAthlon: 2103 Builder.defineMacro("__3dNOW_A__"); 2104 case AMD3DNow: 2105 Builder.defineMacro("__3dNOW__"); 2106 case MMX: 2107 Builder.defineMacro("__MMX__"); 2108 case NoMMX3DNow: 2109 break; 2110 } 2111} 2112 2113bool X86TargetInfo::hasFeature(StringRef Feature) const { 2114 return llvm::StringSwitch<bool>(Feature) 2115 .Case("aes", HasAES) 2116 .Case("avx", SSELevel >= AVX) 2117 .Case("avx2", SSELevel >= AVX2) 2118 .Case("bmi", HasBMI) 2119 .Case("bmi2", HasBMI2) 2120 .Case("fma4", HasFMA4) 2121 .Case("lzcnt", HasLZCNT) 2122 .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow) 2123 .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon) 2124 .Case("mmx", MMX3DNowLevel >= MMX) 2125 .Case("popcnt", HasPOPCNT) 2126 .Case("sse", SSELevel >= SSE1) 2127 .Case("sse2", SSELevel >= SSE2) 2128 .Case("sse3", SSELevel >= SSE3) 2129 .Case("ssse3", SSELevel >= SSSE3) 2130 .Case("sse41", SSELevel >= SSE41) 2131 .Case("sse42", SSELevel >= SSE42) 2132 .Case("x86", true) 2133 .Case("x86_32", PointerWidth == 32) 2134 .Case("x86_64", PointerWidth == 64) 2135 .Default(false); 2136} 2137 2138bool 2139X86TargetInfo::validateAsmConstraint(const char *&Name, 2140 TargetInfo::ConstraintInfo &Info) const { 2141 switch (*Name) { 2142 default: return false; 2143 case 'Y': // first letter of a pair: 2144 switch (*(Name+1)) { 2145 default: return false; 2146 case '0': // First SSE register. 2147 case 't': // Any SSE register, when SSE2 is enabled. 2148 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 2149 case 'm': // any MMX register, when inter-unit moves enabled. 2150 break; // falls through to setAllowsRegister. 2151 } 2152 case 'a': // eax. 2153 case 'b': // ebx. 2154 case 'c': // ecx. 2155 case 'd': // edx. 2156 case 'S': // esi. 2157 case 'D': // edi. 2158 case 'A': // edx:eax. 2159 case 'f': // any x87 floating point stack register. 2160 case 't': // top of floating point stack. 2161 case 'u': // second from top of floating point stack. 2162 case 'q': // Any register accessible as [r]l: a, b, c, and d. 2163 case 'y': // Any MMX register. 2164 case 'x': // Any SSE register. 2165 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 2166 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 2167 case 'l': // "Index" registers: any general register that can be used as an 2168 // index in a base+index memory access. 2169 Info.setAllowsRegister(); 2170 return true; 2171 case 'C': // SSE floating point constant. 2172 case 'G': // x87 floating point constant. 2173 case 'e': // 32-bit signed integer constant for use with zero-extending 2174 // x86_64 instructions. 2175 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 2176 // x86_64 instructions. 2177 return true; 2178 } 2179} 2180 2181 2182std::string 2183X86TargetInfo::convertConstraint(const char *&Constraint) const { 2184 switch (*Constraint) { 2185 case 'a': return std::string("{ax}"); 2186 case 'b': return std::string("{bx}"); 2187 case 'c': return std::string("{cx}"); 2188 case 'd': return std::string("{dx}"); 2189 case 'S': return std::string("{si}"); 2190 case 'D': return std::string("{di}"); 2191 case 'p': // address 2192 return std::string("im"); 2193 case 't': // top of floating point stack. 2194 return std::string("{st}"); 2195 case 'u': // second from top of floating point stack. 2196 return std::string("{st(1)}"); // second from top of floating point stack. 2197 default: 2198 return std::string(1, *Constraint); 2199 } 2200} 2201} // end anonymous namespace 2202 2203namespace { 2204// X86-32 generic target 2205class X86_32TargetInfo : public X86TargetInfo { 2206public: 2207 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 2208 DoubleAlign = LongLongAlign = 32; 2209 LongDoubleWidth = 96; 2210 LongDoubleAlign = 32; 2211 SuitableAlign = 128; 2212 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2213 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2214 "a0:0:64-f80:32:32-n8:16:32-S128"; 2215 SizeType = UnsignedInt; 2216 PtrDiffType = SignedInt; 2217 IntPtrType = SignedInt; 2218 RegParmMax = 3; 2219 2220 // Use fpret for all types. 2221 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 2222 (1 << TargetInfo::Double) | 2223 (1 << TargetInfo::LongDouble)); 2224 2225 // x86-32 has atomics up to 8 bytes 2226 // FIXME: Check that we actually have cmpxchg8b before setting 2227 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) 2228 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 2229 } 2230 virtual const char *getVAListDeclaration() const { 2231 return "typedef char* __builtin_va_list;"; 2232 } 2233 2234 int getEHDataRegisterNumber(unsigned RegNo) const { 2235 if (RegNo == 0) return 0; 2236 if (RegNo == 1) return 2; 2237 return -1; 2238 } 2239}; 2240} // end anonymous namespace 2241 2242namespace { 2243class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> { 2244public: 2245 NetBSDI386TargetInfo(const std::string &triple) : 2246 NetBSDTargetInfo<X86_32TargetInfo>(triple) { 2247 } 2248 2249 virtual unsigned getFloatEvalMethod() const { 2250 // NetBSD defaults to "double" rounding 2251 return 1; 2252 } 2253}; 2254} // end anonymous namespace 2255 2256namespace { 2257class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2258public: 2259 OpenBSDI386TargetInfo(const std::string& triple) : 2260 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2261 SizeType = UnsignedLong; 2262 IntPtrType = SignedLong; 2263 PtrDiffType = SignedLong; 2264 } 2265}; 2266} // end anonymous namespace 2267 2268namespace { 2269class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2270public: 2271 DarwinI386TargetInfo(const std::string& triple) : 2272 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2273 LongDoubleWidth = 128; 2274 LongDoubleAlign = 128; 2275 SuitableAlign = 128; 2276 SizeType = UnsignedLong; 2277 IntPtrType = SignedLong; 2278 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2279 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2280 "a0:0:64-f80:128:128-n8:16:32-S128"; 2281 HasAlignMac68kSupport = true; 2282 } 2283 2284}; 2285} // end anonymous namespace 2286 2287namespace { 2288// x86-32 Windows target 2289class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2290public: 2291 WindowsX86_32TargetInfo(const std::string& triple) 2292 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2293 TLSSupported = false; 2294 WCharType = UnsignedShort; 2295 DoubleAlign = LongLongAlign = 64; 2296 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2297 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2298 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2299 } 2300 virtual void getTargetDefines(const LangOptions &Opts, 2301 MacroBuilder &Builder) const { 2302 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2303 } 2304}; 2305} // end anonymous namespace 2306 2307namespace { 2308 2309// x86-32 Windows Visual Studio target 2310class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2311public: 2312 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2313 : WindowsX86_32TargetInfo(triple) { 2314 LongDoubleWidth = LongDoubleAlign = 64; 2315 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2316 } 2317 virtual void getTargetDefines(const LangOptions &Opts, 2318 MacroBuilder &Builder) const { 2319 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2320 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2321 // The value of the following reflects processor type. 2322 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2323 // We lost the original triple, so we use the default. 2324 Builder.defineMacro("_M_IX86", "600"); 2325 } 2326}; 2327} // end anonymous namespace 2328 2329namespace { 2330// x86-32 MinGW target 2331class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2332public: 2333 MinGWX86_32TargetInfo(const std::string& triple) 2334 : WindowsX86_32TargetInfo(triple) { 2335 } 2336 virtual void getTargetDefines(const LangOptions &Opts, 2337 MacroBuilder &Builder) const { 2338 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2339 DefineStd(Builder, "WIN32", Opts); 2340 DefineStd(Builder, "WINNT", Opts); 2341 Builder.defineMacro("_X86_"); 2342 Builder.defineMacro("__MSVCRT__"); 2343 Builder.defineMacro("__MINGW32__"); 2344 2345 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2346 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2347 if (Opts.MicrosoftExt) 2348 // Provide "as-is" __declspec. 2349 Builder.defineMacro("__declspec", "__declspec"); 2350 else 2351 // Provide alias of __attribute__ like mingw32-gcc. 2352 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2353 } 2354}; 2355} // end anonymous namespace 2356 2357namespace { 2358// x86-32 Cygwin target 2359class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2360public: 2361 CygwinX86_32TargetInfo(const std::string& triple) 2362 : X86_32TargetInfo(triple) { 2363 TLSSupported = false; 2364 WCharType = UnsignedShort; 2365 DoubleAlign = LongLongAlign = 64; 2366 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2367 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2368 "a0:0:64-f80:32:32-n8:16:32-S32"; 2369 } 2370 virtual void getTargetDefines(const LangOptions &Opts, 2371 MacroBuilder &Builder) const { 2372 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2373 Builder.defineMacro("__CYGWIN__"); 2374 Builder.defineMacro("__CYGWIN32__"); 2375 DefineStd(Builder, "unix", Opts); 2376 if (Opts.CPlusPlus) 2377 Builder.defineMacro("_GNU_SOURCE"); 2378 } 2379}; 2380} // end anonymous namespace 2381 2382namespace { 2383// x86-32 Haiku target 2384class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2385public: 2386 HaikuX86_32TargetInfo(const std::string& triple) 2387 : X86_32TargetInfo(triple) { 2388 SizeType = UnsignedLong; 2389 IntPtrType = SignedLong; 2390 PtrDiffType = SignedLong; 2391 this->UserLabelPrefix = ""; 2392 } 2393 virtual void getTargetDefines(const LangOptions &Opts, 2394 MacroBuilder &Builder) const { 2395 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2396 Builder.defineMacro("__INTEL__"); 2397 Builder.defineMacro("__HAIKU__"); 2398 } 2399}; 2400} // end anonymous namespace 2401 2402// RTEMS Target 2403template<typename Target> 2404class RTEMSTargetInfo : public OSTargetInfo<Target> { 2405protected: 2406 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2407 MacroBuilder &Builder) const { 2408 // RTEMS defines; list based off of gcc output 2409 2410 Builder.defineMacro("__rtems__"); 2411 Builder.defineMacro("__ELF__"); 2412 } 2413public: 2414 RTEMSTargetInfo(const std::string &triple) 2415 : OSTargetInfo<Target>(triple) { 2416 this->UserLabelPrefix = ""; 2417 2418 llvm::Triple Triple(triple); 2419 switch (Triple.getArch()) { 2420 default: 2421 case llvm::Triple::x86: 2422 // this->MCountName = ".mcount"; 2423 break; 2424 case llvm::Triple::mips: 2425 case llvm::Triple::mipsel: 2426 case llvm::Triple::ppc: 2427 case llvm::Triple::ppc64: 2428 // this->MCountName = "_mcount"; 2429 break; 2430 case llvm::Triple::arm: 2431 // this->MCountName = "__mcount"; 2432 break; 2433 } 2434 2435 } 2436}; 2437 2438namespace { 2439// x86-32 RTEMS target 2440class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2441public: 2442 RTEMSX86_32TargetInfo(const std::string& triple) 2443 : X86_32TargetInfo(triple) { 2444 SizeType = UnsignedLong; 2445 IntPtrType = SignedLong; 2446 PtrDiffType = SignedLong; 2447 this->UserLabelPrefix = ""; 2448 } 2449 virtual void getTargetDefines(const LangOptions &Opts, 2450 MacroBuilder &Builder) const { 2451 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2452 Builder.defineMacro("__INTEL__"); 2453 Builder.defineMacro("__rtems__"); 2454 } 2455}; 2456} // end anonymous namespace 2457 2458namespace { 2459// x86-64 generic target 2460class X86_64TargetInfo : public X86TargetInfo { 2461public: 2462 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2463 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2464 LongDoubleWidth = 128; 2465 LongDoubleAlign = 128; 2466 LargeArrayMinWidth = 128; 2467 LargeArrayAlign = 128; 2468 SuitableAlign = 128; 2469 IntMaxType = SignedLong; 2470 UIntMaxType = UnsignedLong; 2471 Int64Type = SignedLong; 2472 RegParmMax = 6; 2473 2474 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2475 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2476 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2477 2478 // Use fpret only for long double. 2479 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2480 2481 // Use fp2ret for _Complex long double. 2482 ComplexLongDoubleUsesFP2Ret = true; 2483 2484 // x86-64 has atomics up to 16 bytes. 2485 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128 2486 // on CPUs with cmpxchg16b 2487 MaxAtomicPromoteWidth = 128; 2488 MaxAtomicInlineWidth = 64; 2489 } 2490 virtual const char *getVAListDeclaration() const { 2491 return "typedef struct __va_list_tag {" 2492 " unsigned gp_offset;" 2493 " unsigned fp_offset;" 2494 " void* overflow_arg_area;" 2495 " void* reg_save_area;" 2496 "} __va_list_tag;" 2497 "typedef __va_list_tag __builtin_va_list[1];"; 2498 } 2499 2500 int getEHDataRegisterNumber(unsigned RegNo) const { 2501 if (RegNo == 0) return 0; 2502 if (RegNo == 1) return 1; 2503 return -1; 2504 } 2505}; 2506} // end anonymous namespace 2507 2508namespace { 2509// x86-64 Windows target 2510class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2511public: 2512 WindowsX86_64TargetInfo(const std::string& triple) 2513 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2514 TLSSupported = false; 2515 WCharType = UnsignedShort; 2516 LongWidth = LongAlign = 32; 2517 DoubleAlign = LongLongAlign = 64; 2518 IntMaxType = SignedLongLong; 2519 UIntMaxType = UnsignedLongLong; 2520 Int64Type = SignedLongLong; 2521 SizeType = UnsignedLongLong; 2522 PtrDiffType = SignedLongLong; 2523 IntPtrType = SignedLongLong; 2524 this->UserLabelPrefix = ""; 2525 } 2526 virtual void getTargetDefines(const LangOptions &Opts, 2527 MacroBuilder &Builder) const { 2528 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2529 Builder.defineMacro("_WIN64"); 2530 } 2531 virtual const char *getVAListDeclaration() const { 2532 return "typedef char* __builtin_va_list;"; 2533 } 2534}; 2535} // end anonymous namespace 2536 2537namespace { 2538// x86-64 Windows Visual Studio target 2539class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2540public: 2541 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2542 : WindowsX86_64TargetInfo(triple) { 2543 LongDoubleWidth = LongDoubleAlign = 64; 2544 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2545 } 2546 virtual void getTargetDefines(const LangOptions &Opts, 2547 MacroBuilder &Builder) const { 2548 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2549 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2550 Builder.defineMacro("_M_X64"); 2551 Builder.defineMacro("_M_AMD64"); 2552 } 2553}; 2554} // end anonymous namespace 2555 2556namespace { 2557// x86-64 MinGW target 2558class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2559public: 2560 MinGWX86_64TargetInfo(const std::string& triple) 2561 : WindowsX86_64TargetInfo(triple) { 2562 } 2563 virtual void getTargetDefines(const LangOptions &Opts, 2564 MacroBuilder &Builder) const { 2565 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2566 DefineStd(Builder, "WIN64", Opts); 2567 Builder.defineMacro("__MSVCRT__"); 2568 Builder.defineMacro("__MINGW32__"); 2569 Builder.defineMacro("__MINGW64__"); 2570 2571 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2572 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2573 if (Opts.MicrosoftExt) 2574 // Provide "as-is" __declspec. 2575 Builder.defineMacro("__declspec", "__declspec"); 2576 else 2577 // Provide alias of __attribute__ like mingw32-gcc. 2578 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2579 } 2580}; 2581} // end anonymous namespace 2582 2583namespace { 2584class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2585public: 2586 DarwinX86_64TargetInfo(const std::string& triple) 2587 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2588 Int64Type = SignedLongLong; 2589 } 2590}; 2591} // end anonymous namespace 2592 2593namespace { 2594class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2595public: 2596 OpenBSDX86_64TargetInfo(const std::string& triple) 2597 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2598 IntMaxType = SignedLongLong; 2599 UIntMaxType = UnsignedLongLong; 2600 Int64Type = SignedLongLong; 2601 } 2602}; 2603} // end anonymous namespace 2604 2605namespace { 2606class ARMTargetInfo : public TargetInfo { 2607 // Possible FPU choices. 2608 enum FPUMode { 2609 NoFPU, 2610 VFP2FPU, 2611 VFP3FPU, 2612 NeonFPU 2613 }; 2614 2615 static bool FPUModeIsVFP(FPUMode Mode) { 2616 return Mode >= VFP2FPU && Mode <= NeonFPU; 2617 } 2618 2619 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2620 static const char * const GCCRegNames[]; 2621 2622 std::string ABI, CPU; 2623 2624 unsigned FPU : 3; 2625 2626 unsigned IsThumb : 1; 2627 2628 // Initialized via features. 2629 unsigned SoftFloat : 1; 2630 unsigned SoftFloatABI : 1; 2631 2632 static const Builtin::Info BuiltinInfo[]; 2633 2634public: 2635 ARMTargetInfo(const std::string &TripleStr) 2636 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2637 { 2638 BigEndian = false; 2639 SizeType = UnsignedInt; 2640 PtrDiffType = SignedInt; 2641 // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int. 2642 WCharType = UnsignedInt; 2643 2644 // {} in inline assembly are neon specifiers, not assembly variant 2645 // specifiers. 2646 NoAsmVariants = true; 2647 2648 // FIXME: Should we just treat this as a feature? 2649 IsThumb = getTriple().getArchName().startswith("thumb"); 2650 if (IsThumb) { 2651 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2652 // so set preferred for small types to 32. 2653 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2654 "i64:64:64-f32:32:32-f64:64:64-" 2655 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2656 } else { 2657 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2658 "i64:64:64-f32:32:32-f64:64:64-" 2659 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2660 } 2661 2662 // ARM targets default to using the ARM C++ ABI. 2663 CXXABI = CXXABI_ARM; 2664 2665 // ARM has atomics up to 8 bytes 2666 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e 2667 MaxAtomicPromoteWidth = 64; 2668 2669 // Do force alignment of members that follow zero length bitfields. If 2670 // the alignment of the zero-length bitfield is greater than the member 2671 // that follows it, `bar', `bar' will be aligned as the type of the 2672 // zero length bitfield. 2673 UseZeroLengthBitfieldAlignment = true; 2674 } 2675 virtual const char *getABI() const { return ABI.c_str(); } 2676 virtual bool setABI(const std::string &Name) { 2677 ABI = Name; 2678 2679 // The defaults (above) are for AAPCS, check if we need to change them. 2680 // 2681 // FIXME: We need support for -meabi... we could just mangle it into the 2682 // name. 2683 if (Name == "apcs-gnu") { 2684 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32; 2685 SizeType = UnsignedLong; 2686 2687 // Revert to using SignedInt on apcs-gnu to comply with existing behaviour. 2688 WCharType = SignedInt; 2689 2690 // Do not respect the alignment of bit-field types when laying out 2691 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2692 UseBitFieldTypeAlignment = false; 2693 2694 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2695 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2696 /// gcc. 2697 ZeroLengthBitfieldBoundary = 32; 2698 2699 if (IsThumb) { 2700 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2701 // so set preferred for small types to 32. 2702 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2703 "i64:32:64-f32:32:32-f64:32:64-" 2704 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2705 } else { 2706 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2707 "i64:32:64-f32:32:32-f64:32:64-" 2708 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2709 } 2710 2711 // FIXME: Override "preferred align" for double and long long. 2712 } else if (Name == "aapcs") { 2713 // FIXME: Enumerated types are variable width in straight AAPCS. 2714 } else if (Name == "aapcs-linux") { 2715 ; 2716 } else 2717 return false; 2718 2719 return true; 2720 } 2721 2722 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2723 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2724 Features["vfp2"] = true; 2725 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2726 Features["neon"] = true; 2727 } 2728 2729 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2730 StringRef Name, 2731 bool Enabled) const { 2732 if (Name == "soft-float" || Name == "soft-float-abi" || 2733 Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16") { 2734 Features[Name] = Enabled; 2735 } else 2736 return false; 2737 2738 return true; 2739 } 2740 2741 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2742 FPU = NoFPU; 2743 SoftFloat = SoftFloatABI = false; 2744 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2745 if (Features[i] == "+soft-float") 2746 SoftFloat = true; 2747 else if (Features[i] == "+soft-float-abi") 2748 SoftFloatABI = true; 2749 else if (Features[i] == "+vfp2") 2750 FPU = VFP2FPU; 2751 else if (Features[i] == "+vfp3") 2752 FPU = VFP3FPU; 2753 else if (Features[i] == "+neon") 2754 FPU = NeonFPU; 2755 } 2756 2757 // Remove front-end specific options which the backend handles differently. 2758 std::vector<std::string>::iterator it; 2759 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2760 if (it != Features.end()) 2761 Features.erase(it); 2762 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2763 if (it != Features.end()) 2764 Features.erase(it); 2765 } 2766 2767 virtual bool hasFeature(StringRef Feature) const { 2768 return llvm::StringSwitch<bool>(Feature) 2769 .Case("arm", true) 2770 .Case("softfloat", SoftFloat) 2771 .Case("thumb", IsThumb) 2772 .Case("neon", FPU == NeonFPU && !SoftFloat && 2773 StringRef(getCPUDefineSuffix(CPU)).startswith("7")) 2774 .Default(false); 2775 } 2776 static const char *getCPUDefineSuffix(StringRef Name) { 2777 return llvm::StringSwitch<const char*>(Name) 2778 .Cases("arm8", "arm810", "4") 2779 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2780 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2781 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2782 .Case("ep9312", "4T") 2783 .Cases("arm10tdmi", "arm1020t", "5T") 2784 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2785 .Case("arm926ej-s", "5TEJ") 2786 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2787 .Cases("xscale", "iwmmxt", "5TE") 2788 .Case("arm1136j-s", "6J") 2789 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2790 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2791 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2792 .Cases("cortex-a8", "cortex-a9", "7A") 2793 .Case("cortex-m3", "7M") 2794 .Case("cortex-m4", "7M") 2795 .Case("cortex-m0", "6M") 2796 .Default(0); 2797 } 2798 virtual bool setCPU(const std::string &Name) { 2799 if (!getCPUDefineSuffix(Name)) 2800 return false; 2801 2802 CPU = Name; 2803 return true; 2804 } 2805 virtual void getTargetDefines(const LangOptions &Opts, 2806 MacroBuilder &Builder) const { 2807 // Target identification. 2808 Builder.defineMacro("__arm"); 2809 Builder.defineMacro("__arm__"); 2810 2811 // Target properties. 2812 Builder.defineMacro("__ARMEL__"); 2813 Builder.defineMacro("__LITTLE_ENDIAN__"); 2814 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2815 2816 StringRef CPUArch = getCPUDefineSuffix(CPU); 2817 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2818 2819 // Subtarget options. 2820 2821 // FIXME: It's more complicated than this and we don't really support 2822 // interworking. 2823 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2824 Builder.defineMacro("__THUMB_INTERWORK__"); 2825 2826 if (ABI == "aapcs" || ABI == "aapcs-linux") 2827 Builder.defineMacro("__ARM_EABI__"); 2828 2829 if (SoftFloat) 2830 Builder.defineMacro("__SOFTFP__"); 2831 2832 if (CPU == "xscale") 2833 Builder.defineMacro("__XSCALE__"); 2834 2835 bool IsARMv7 = CPUArch.startswith("7"); 2836 if (IsThumb) { 2837 Builder.defineMacro("__THUMBEL__"); 2838 Builder.defineMacro("__thumb__"); 2839 if (CPUArch == "6T2" || IsARMv7) 2840 Builder.defineMacro("__thumb2__"); 2841 } 2842 2843 // Note, this is always on in gcc, even though it doesn't make sense. 2844 Builder.defineMacro("__APCS_32__"); 2845 2846 if (FPUModeIsVFP((FPUMode) FPU)) 2847 Builder.defineMacro("__VFP_FP__"); 2848 2849 // This only gets set when Neon instructions are actually available, unlike 2850 // the VFP define, hence the soft float and arch check. This is subtly 2851 // different from gcc, we follow the intent which was that it should be set 2852 // when Neon instructions are actually available. 2853 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2854 Builder.defineMacro("__ARM_NEON__"); 2855 } 2856 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2857 unsigned &NumRecords) const { 2858 Records = BuiltinInfo; 2859 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2860 } 2861 virtual bool isCLZForZeroUndef() const { return false; } 2862 virtual const char *getVAListDeclaration() const { 2863 return "typedef void* __builtin_va_list;"; 2864 } 2865 virtual void getGCCRegNames(const char * const *&Names, 2866 unsigned &NumNames) const; 2867 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2868 unsigned &NumAliases) const; 2869 virtual bool validateAsmConstraint(const char *&Name, 2870 TargetInfo::ConstraintInfo &Info) const { 2871 // FIXME: Check if this is complete 2872 switch (*Name) { 2873 default: 2874 case 'l': // r0-r7 2875 case 'h': // r8-r15 2876 case 'w': // VFP Floating point register single precision 2877 case 'P': // VFP Floating point register double precision 2878 Info.setAllowsRegister(); 2879 return true; 2880 case 'Q': // A memory address that is a single base register. 2881 Info.setAllowsMemory(); 2882 return true; 2883 case 'U': // a memory reference... 2884 switch (Name[1]) { 2885 case 'q': // ...ARMV4 ldrsb 2886 case 'v': // ...VFP load/store (reg+constant offset) 2887 case 'y': // ...iWMMXt load/store 2888 case 't': // address valid for load/store opaque types wider 2889 // than 128-bits 2890 case 'n': // valid address for Neon doubleword vector load/store 2891 case 'm': // valid address for Neon element and structure load/store 2892 case 's': // valid address for non-offset loads/stores of quad-word 2893 // values in four ARM registers 2894 Info.setAllowsMemory(); 2895 Name++; 2896 return true; 2897 } 2898 } 2899 return false; 2900 } 2901 virtual std::string convertConstraint(const char *&Constraint) const { 2902 std::string R; 2903 switch (*Constraint) { 2904 case 'U': // Two-character constraint; add "^" hint for later parsing. 2905 R = std::string("^") + std::string(Constraint, 2); 2906 Constraint++; 2907 break; 2908 case 'p': // 'p' should be translated to 'r' by default. 2909 R = std::string("r"); 2910 break; 2911 default: 2912 return std::string(1, *Constraint); 2913 } 2914 return R; 2915 } 2916 virtual const char *getClobbers() const { 2917 // FIXME: Is this really right? 2918 return ""; 2919 } 2920}; 2921 2922const char * const ARMTargetInfo::GCCRegNames[] = { 2923 // Integer registers 2924 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2925 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2926 2927 // Float registers 2928 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2929 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2930 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2931 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2932 2933 // Double registers 2934 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2935 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2936 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2937 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2938 2939 // Quad registers 2940 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2941 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2942}; 2943 2944void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2945 unsigned &NumNames) const { 2946 Names = GCCRegNames; 2947 NumNames = llvm::array_lengthof(GCCRegNames); 2948} 2949 2950const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2951 { { "a1" }, "r0" }, 2952 { { "a2" }, "r1" }, 2953 { { "a3" }, "r2" }, 2954 { { "a4" }, "r3" }, 2955 { { "v1" }, "r4" }, 2956 { { "v2" }, "r5" }, 2957 { { "v3" }, "r6" }, 2958 { { "v4" }, "r7" }, 2959 { { "v5" }, "r8" }, 2960 { { "v6", "rfp" }, "r9" }, 2961 { { "sl" }, "r10" }, 2962 { { "fp" }, "r11" }, 2963 { { "ip" }, "r12" }, 2964 { { "r13" }, "sp" }, 2965 { { "r14" }, "lr" }, 2966 { { "r15" }, "pc" }, 2967 // The S, D and Q registers overlap, but aren't really aliases; we 2968 // don't want to substitute one of these for a different-sized one. 2969}; 2970 2971void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2972 unsigned &NumAliases) const { 2973 Aliases = GCCRegAliases; 2974 NumAliases = llvm::array_lengthof(GCCRegAliases); 2975} 2976 2977const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2978#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2979#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2980 ALL_LANGUAGES }, 2981#include "clang/Basic/BuiltinsARM.def" 2982}; 2983} // end anonymous namespace. 2984 2985namespace { 2986class DarwinARMTargetInfo : 2987 public DarwinTargetInfo<ARMTargetInfo> { 2988protected: 2989 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2990 MacroBuilder &Builder) const { 2991 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2992 } 2993 2994public: 2995 DarwinARMTargetInfo(const std::string& triple) 2996 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2997 HasAlignMac68kSupport = true; 2998 // iOS always has 64-bit atomic instructions. 2999 // FIXME: This should be based off of the target features in ARMTargetInfo. 3000 MaxAtomicInlineWidth = 64; 3001 } 3002}; 3003} // end anonymous namespace. 3004 3005 3006namespace { 3007// Hexagon abstract base class 3008class HexagonTargetInfo : public TargetInfo { 3009 static const Builtin::Info BuiltinInfo[]; 3010 static const char * const GCCRegNames[]; 3011 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 3012 std::string CPU; 3013public: 3014 HexagonTargetInfo(const std::string& triple) : TargetInfo(triple) { 3015 BigEndian = false; 3016 DescriptionString = ("e-p:32:32:32-" 3017 "i64:64:64-i32:32:32-" 3018 "i16:16:16-i1:32:32-a:0:0"); 3019 3020 // {} in inline assembly are packet specifiers, not assembly variant 3021 // specifiers. 3022 NoAsmVariants = true; 3023 } 3024 3025 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3026 unsigned &NumRecords) const { 3027 Records = BuiltinInfo; 3028 NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin; 3029 } 3030 3031 virtual bool validateAsmConstraint(const char *&Name, 3032 TargetInfo::ConstraintInfo &Info) const { 3033 return true; 3034 } 3035 3036 virtual void getTargetDefines(const LangOptions &Opts, 3037 MacroBuilder &Builder) const; 3038 3039 virtual bool hasFeature(StringRef Feature) const { 3040 return Feature == "hexagon"; 3041 } 3042 3043 virtual const char *getVAListDeclaration() const { 3044 return "typedef char* __builtin_va_list;"; 3045 } 3046 virtual void getGCCRegNames(const char * const *&Names, 3047 unsigned &NumNames) const; 3048 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3049 unsigned &NumAliases) const; 3050 virtual const char *getClobbers() const { 3051 return ""; 3052 } 3053 3054 static const char *getHexagonCPUSuffix(StringRef Name) { 3055 return llvm::StringSwitch<const char*>(Name) 3056 .Case("hexagonv2", "2") 3057 .Case("hexagonv3", "3") 3058 .Case("hexagonv4", "4") 3059 .Default(0); 3060 } 3061 3062 virtual bool setCPU(const std::string &Name) { 3063 if (!getHexagonCPUSuffix(Name)) 3064 return false; 3065 3066 CPU = Name; 3067 return true; 3068 } 3069}; 3070 3071void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts, 3072 MacroBuilder &Builder) const { 3073 Builder.defineMacro("qdsp6"); 3074 Builder.defineMacro("__qdsp6", "1"); 3075 Builder.defineMacro("__qdsp6__", "1"); 3076 3077 Builder.defineMacro("hexagon"); 3078 Builder.defineMacro("__hexagon", "1"); 3079 Builder.defineMacro("__hexagon__", "1"); 3080 3081 if(CPU == "hexagonv1") { 3082 Builder.defineMacro("__HEXAGON_V1__"); 3083 Builder.defineMacro("__HEXAGON_ARCH__", "1"); 3084 if(Opts.HexagonQdsp6Compat) { 3085 Builder.defineMacro("__QDSP6_V1__"); 3086 Builder.defineMacro("__QDSP6_ARCH__", "1"); 3087 } 3088 } 3089 else if(CPU == "hexagonv2") { 3090 Builder.defineMacro("__HEXAGON_V2__"); 3091 Builder.defineMacro("__HEXAGON_ARCH__", "2"); 3092 if(Opts.HexagonQdsp6Compat) { 3093 Builder.defineMacro("__QDSP6_V2__"); 3094 Builder.defineMacro("__QDSP6_ARCH__", "2"); 3095 } 3096 } 3097 else if(CPU == "hexagonv3") { 3098 Builder.defineMacro("__HEXAGON_V3__"); 3099 Builder.defineMacro("__HEXAGON_ARCH__", "3"); 3100 if(Opts.HexagonQdsp6Compat) { 3101 Builder.defineMacro("__QDSP6_V3__"); 3102 Builder.defineMacro("__QDSP6_ARCH__", "3"); 3103 } 3104 } 3105 else if(CPU == "hexagonv4") { 3106 Builder.defineMacro("__HEXAGON_V4__"); 3107 Builder.defineMacro("__HEXAGON_ARCH__", "4"); 3108 if(Opts.HexagonQdsp6Compat) { 3109 Builder.defineMacro("__QDSP6_V4__"); 3110 Builder.defineMacro("__QDSP6_ARCH__", "4"); 3111 } 3112 } 3113} 3114 3115const char * const HexagonTargetInfo::GCCRegNames[] = { 3116 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3117 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3118 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3119 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 3120 "p0", "p1", "p2", "p3", 3121 "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp" 3122}; 3123 3124void HexagonTargetInfo::getGCCRegNames(const char * const *&Names, 3125 unsigned &NumNames) const { 3126 Names = GCCRegNames; 3127 NumNames = llvm::array_lengthof(GCCRegNames); 3128} 3129 3130 3131const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = { 3132 { { "sp" }, "r29" }, 3133 { { "fp" }, "r30" }, 3134 { { "lr" }, "r31" }, 3135 }; 3136 3137void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3138 unsigned &NumAliases) const { 3139 Aliases = GCCRegAliases; 3140 NumAliases = llvm::array_lengthof(GCCRegAliases); 3141} 3142 3143 3144const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = { 3145#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 3146#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 3147 ALL_LANGUAGES }, 3148#include "clang/Basic/BuiltinsHexagon.def" 3149}; 3150} 3151 3152 3153namespace { 3154class SparcV8TargetInfo : public TargetInfo { 3155 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 3156 static const char * const GCCRegNames[]; 3157 bool SoftFloat; 3158public: 3159 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 3160 // FIXME: Support Sparc quad-precision long double? 3161 BigEndian = false; 3162 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 3163 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3164 } 3165 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 3166 StringRef Name, 3167 bool Enabled) const { 3168 if (Name == "soft-float") 3169 Features[Name] = Enabled; 3170 else 3171 return false; 3172 3173 return true; 3174 } 3175 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 3176 SoftFloat = false; 3177 for (unsigned i = 0, e = Features.size(); i != e; ++i) 3178 if (Features[i] == "+soft-float") 3179 SoftFloat = true; 3180 } 3181 virtual void getTargetDefines(const LangOptions &Opts, 3182 MacroBuilder &Builder) const { 3183 DefineStd(Builder, "sparc", Opts); 3184 Builder.defineMacro("__sparcv8"); 3185 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3186 3187 if (SoftFloat) 3188 Builder.defineMacro("SOFT_FLOAT", "1"); 3189 } 3190 3191 virtual bool hasFeature(StringRef Feature) const { 3192 return llvm::StringSwitch<bool>(Feature) 3193 .Case("softfloat", SoftFloat) 3194 .Case("sparc", true) 3195 .Default(false); 3196 } 3197 3198 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3199 unsigned &NumRecords) const { 3200 // FIXME: Implement! 3201 } 3202 virtual const char *getVAListDeclaration() const { 3203 return "typedef void* __builtin_va_list;"; 3204 } 3205 virtual void getGCCRegNames(const char * const *&Names, 3206 unsigned &NumNames) const; 3207 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3208 unsigned &NumAliases) const; 3209 virtual bool validateAsmConstraint(const char *&Name, 3210 TargetInfo::ConstraintInfo &info) const { 3211 // FIXME: Implement! 3212 return false; 3213 } 3214 virtual const char *getClobbers() const { 3215 // FIXME: Implement! 3216 return ""; 3217 } 3218}; 3219 3220const char * const SparcV8TargetInfo::GCCRegNames[] = { 3221 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3222 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3223 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3224 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 3225}; 3226 3227void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 3228 unsigned &NumNames) const { 3229 Names = GCCRegNames; 3230 NumNames = llvm::array_lengthof(GCCRegNames); 3231} 3232 3233const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 3234 { { "g0" }, "r0" }, 3235 { { "g1" }, "r1" }, 3236 { { "g2" }, "r2" }, 3237 { { "g3" }, "r3" }, 3238 { { "g4" }, "r4" }, 3239 { { "g5" }, "r5" }, 3240 { { "g6" }, "r6" }, 3241 { { "g7" }, "r7" }, 3242 { { "o0" }, "r8" }, 3243 { { "o1" }, "r9" }, 3244 { { "o2" }, "r10" }, 3245 { { "o3" }, "r11" }, 3246 { { "o4" }, "r12" }, 3247 { { "o5" }, "r13" }, 3248 { { "o6", "sp" }, "r14" }, 3249 { { "o7" }, "r15" }, 3250 { { "l0" }, "r16" }, 3251 { { "l1" }, "r17" }, 3252 { { "l2" }, "r18" }, 3253 { { "l3" }, "r19" }, 3254 { { "l4" }, "r20" }, 3255 { { "l5" }, "r21" }, 3256 { { "l6" }, "r22" }, 3257 { { "l7" }, "r23" }, 3258 { { "i0" }, "r24" }, 3259 { { "i1" }, "r25" }, 3260 { { "i2" }, "r26" }, 3261 { { "i3" }, "r27" }, 3262 { { "i4" }, "r28" }, 3263 { { "i5" }, "r29" }, 3264 { { "i6", "fp" }, "r30" }, 3265 { { "i7" }, "r31" }, 3266}; 3267 3268void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3269 unsigned &NumAliases) const { 3270 Aliases = GCCRegAliases; 3271 NumAliases = llvm::array_lengthof(GCCRegAliases); 3272} 3273} // end anonymous namespace. 3274 3275namespace { 3276class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 3277public: 3278 AuroraUXSparcV8TargetInfo(const std::string& triple) : 3279 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 3280 SizeType = UnsignedInt; 3281 PtrDiffType = SignedInt; 3282 } 3283}; 3284class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 3285public: 3286 SolarisSparcV8TargetInfo(const std::string& triple) : 3287 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 3288 SizeType = UnsignedInt; 3289 PtrDiffType = SignedInt; 3290 } 3291}; 3292} // end anonymous namespace. 3293 3294namespace { 3295 class MSP430TargetInfo : public TargetInfo { 3296 static const char * const GCCRegNames[]; 3297 public: 3298 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 3299 BigEndian = false; 3300 TLSSupported = false; 3301 IntWidth = 16; IntAlign = 16; 3302 LongWidth = 32; LongLongWidth = 64; 3303 LongAlign = LongLongAlign = 16; 3304 PointerWidth = 16; PointerAlign = 16; 3305 SuitableAlign = 16; 3306 SizeType = UnsignedInt; 3307 IntMaxType = SignedLong; 3308 UIntMaxType = UnsignedLong; 3309 IntPtrType = SignedShort; 3310 PtrDiffType = SignedInt; 3311 SigAtomicType = SignedLong; 3312 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 3313 } 3314 virtual void getTargetDefines(const LangOptions &Opts, 3315 MacroBuilder &Builder) const { 3316 Builder.defineMacro("MSP430"); 3317 Builder.defineMacro("__MSP430__"); 3318 // FIXME: defines for different 'flavours' of MCU 3319 } 3320 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3321 unsigned &NumRecords) const { 3322 // FIXME: Implement. 3323 Records = 0; 3324 NumRecords = 0; 3325 } 3326 virtual bool hasFeature(StringRef Feature) const { 3327 return Feature == "msp430"; 3328 } 3329 virtual void getGCCRegNames(const char * const *&Names, 3330 unsigned &NumNames) const; 3331 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3332 unsigned &NumAliases) const { 3333 // No aliases. 3334 Aliases = 0; 3335 NumAliases = 0; 3336 } 3337 virtual bool validateAsmConstraint(const char *&Name, 3338 TargetInfo::ConstraintInfo &info) const { 3339 // No target constraints for now. 3340 return false; 3341 } 3342 virtual const char *getClobbers() const { 3343 // FIXME: Is this really right? 3344 return ""; 3345 } 3346 virtual const char *getVAListDeclaration() const { 3347 // FIXME: implement 3348 return "typedef char* __builtin_va_list;"; 3349 } 3350 }; 3351 3352 const char * const MSP430TargetInfo::GCCRegNames[] = { 3353 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3354 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 3355 }; 3356 3357 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 3358 unsigned &NumNames) const { 3359 Names = GCCRegNames; 3360 NumNames = llvm::array_lengthof(GCCRegNames); 3361 } 3362} 3363 3364namespace { 3365 3366 // LLVM and Clang cannot be used directly to output native binaries for 3367 // target, but is used to compile C code to llvm bitcode with correct 3368 // type and alignment information. 3369 // 3370 // TCE uses the llvm bitcode as input and uses it for generating customized 3371 // target processor and program binary. TCE co-design environment is 3372 // publicly available in http://tce.cs.tut.fi 3373 3374 static const unsigned TCEOpenCLAddrSpaceMap[] = { 3375 3, // opencl_global 3376 4, // opencl_local 3377 5 // opencl_constant 3378 }; 3379 3380 class TCETargetInfo : public TargetInfo{ 3381 public: 3382 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 3383 TLSSupported = false; 3384 IntWidth = 32; 3385 LongWidth = LongLongWidth = 32; 3386 PointerWidth = 32; 3387 IntAlign = 32; 3388 LongAlign = LongLongAlign = 32; 3389 PointerAlign = 32; 3390 SuitableAlign = 32; 3391 SizeType = UnsignedInt; 3392 IntMaxType = SignedLong; 3393 UIntMaxType = UnsignedLong; 3394 IntPtrType = SignedInt; 3395 PtrDiffType = SignedInt; 3396 FloatWidth = 32; 3397 FloatAlign = 32; 3398 DoubleWidth = 32; 3399 DoubleAlign = 32; 3400 LongDoubleWidth = 32; 3401 LongDoubleAlign = 32; 3402 FloatFormat = &llvm::APFloat::IEEEsingle; 3403 DoubleFormat = &llvm::APFloat::IEEEsingle; 3404 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3405 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3406 "i16:16:32-i32:32:32-i64:32:32-" 3407 "f32:32:32-f64:32:32-v64:32:32-" 3408 "v128:32:32-a0:0:32-n32"; 3409 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 3410 } 3411 3412 virtual void getTargetDefines(const LangOptions &Opts, 3413 MacroBuilder &Builder) const { 3414 DefineStd(Builder, "tce", Opts); 3415 Builder.defineMacro("__TCE__"); 3416 Builder.defineMacro("__TCE_V1__"); 3417 } 3418 virtual bool hasFeature(StringRef Feature) const { 3419 return Feature == "tce"; 3420 } 3421 3422 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3423 unsigned &NumRecords) const {} 3424 virtual const char *getClobbers() const { 3425 return ""; 3426 } 3427 virtual const char *getVAListDeclaration() const { 3428 return "typedef void* __builtin_va_list;"; 3429 } 3430 virtual void getGCCRegNames(const char * const *&Names, 3431 unsigned &NumNames) const {} 3432 virtual bool validateAsmConstraint(const char *&Name, 3433 TargetInfo::ConstraintInfo &info) const { 3434 return true; 3435 } 3436 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3437 unsigned &NumAliases) const {} 3438 }; 3439} 3440 3441namespace { 3442class MipsTargetInfoBase : public TargetInfo { 3443 std::string CPU; 3444 bool SoftFloat; 3445 bool SingleFloat; 3446 3447protected: 3448 std::string ABI; 3449 3450public: 3451 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr) 3452 : TargetInfo(triple), 3453 SoftFloat(false), SingleFloat(false), 3454 ABI(ABIStr) 3455 {} 3456 3457 virtual const char *getABI() const { return ABI.c_str(); } 3458 virtual bool setABI(const std::string &Name) = 0; 3459 virtual bool setCPU(const std::string &Name) { 3460 CPU = Name; 3461 return true; 3462 } 3463 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3464 Features[ABI] = true; 3465 Features[CPU] = true; 3466 } 3467 3468 virtual void getArchDefines(const LangOptions &Opts, 3469 MacroBuilder &Builder) const { 3470 if (SoftFloat) 3471 Builder.defineMacro("__mips_soft_float", Twine(1)); 3472 else if (SingleFloat) 3473 Builder.defineMacro("__mips_single_float", Twine(1)); 3474 else if (!SoftFloat && !SingleFloat) 3475 Builder.defineMacro("__mips_hard_float", Twine(1)); 3476 else 3477 llvm_unreachable("Invalid float ABI for Mips."); 3478 } 3479 3480 virtual void getTargetDefines(const LangOptions &Opts, 3481 MacroBuilder &Builder) const = 0; 3482 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3483 unsigned &NumRecords) const { 3484 // FIXME: Implement! 3485 } 3486 virtual bool hasFeature(StringRef Feature) const { 3487 return Feature == "mips"; 3488 } 3489 virtual const char *getVAListDeclaration() const { 3490 return "typedef void* __builtin_va_list;"; 3491 } 3492 virtual void getGCCRegNames(const char * const *&Names, 3493 unsigned &NumNames) const { 3494 static const char * const GCCRegNames[] = { 3495 // CPU register names 3496 // Must match second column of GCCRegAliases 3497 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3498 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3499 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3500 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", 3501 // Floating point register names 3502 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3503 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3504 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3505 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3506 // Hi/lo and condition register names 3507 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3508 "$fcc5","$fcc6","$fcc7" 3509 }; 3510 Names = GCCRegNames; 3511 NumNames = llvm::array_lengthof(GCCRegNames); 3512 } 3513 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3514 unsigned &NumAliases) const = 0; 3515 virtual bool validateAsmConstraint(const char *&Name, 3516 TargetInfo::ConstraintInfo &Info) const { 3517 switch (*Name) { 3518 default: 3519 return false; 3520 3521 case 'r': // CPU registers. 3522 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3523 case 'y': // Equivalent to "r", backwards compatibility only. 3524 case 'f': // floating-point registers. 3525 Info.setAllowsRegister(); 3526 return true; 3527 } 3528 } 3529 3530 virtual const char *getClobbers() const { 3531 // FIXME: Implement! 3532 return ""; 3533 } 3534 3535 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 3536 StringRef Name, 3537 bool Enabled) const { 3538 if (Name == "soft-float" || Name == "single-float") { 3539 Features[Name] = Enabled; 3540 return true; 3541 } 3542 return false; 3543 } 3544 3545 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 3546 SoftFloat = false; 3547 SingleFloat = false; 3548 3549 for (std::vector<std::string>::iterator it = Features.begin(), 3550 ie = Features.end(); it != ie; ++it) { 3551 if (*it == "+single-float") { 3552 SingleFloat = true; 3553 break; 3554 } 3555 3556 if (*it == "+soft-float") { 3557 SoftFloat = true; 3558 // This option is front-end specific. 3559 // Do not need to pass it to the backend. 3560 Features.erase(it); 3561 break; 3562 } 3563 } 3564 } 3565}; 3566 3567class Mips32TargetInfoBase : public MipsTargetInfoBase { 3568public: 3569 Mips32TargetInfoBase(const std::string& triple) : 3570 MipsTargetInfoBase(triple, "o32") { 3571 SizeType = UnsignedInt; 3572 PtrDiffType = SignedInt; 3573 } 3574 virtual bool setABI(const std::string &Name) { 3575 if ((Name == "o32") || (Name == "eabi")) { 3576 ABI = Name; 3577 return true; 3578 } else 3579 return false; 3580 } 3581 virtual void getArchDefines(const LangOptions &Opts, 3582 MacroBuilder &Builder) const { 3583 MipsTargetInfoBase::getArchDefines(Opts, Builder); 3584 3585 Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0))); 3586 Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth())); 3587 Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth())); 3588 3589 if (ABI == "o32") { 3590 Builder.defineMacro("__mips_o32"); 3591 Builder.defineMacro("_ABIO32", "1"); 3592 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3593 } 3594 else if (ABI == "eabi") 3595 Builder.defineMacro("__mips_eabi"); 3596 else 3597 llvm_unreachable("Invalid ABI for Mips32."); 3598 } 3599 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3600 unsigned &NumAliases) const { 3601 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3602 { { "at" }, "$1" }, 3603 { { "v0" }, "$2" }, 3604 { { "v1" }, "$3" }, 3605 { { "a0" }, "$4" }, 3606 { { "a1" }, "$5" }, 3607 { { "a2" }, "$6" }, 3608 { { "a3" }, "$7" }, 3609 { { "t0" }, "$8" }, 3610 { { "t1" }, "$9" }, 3611 { { "t2" }, "$10" }, 3612 { { "t3" }, "$11" }, 3613 { { "t4" }, "$12" }, 3614 { { "t5" }, "$13" }, 3615 { { "t6" }, "$14" }, 3616 { { "t7" }, "$15" }, 3617 { { "s0" }, "$16" }, 3618 { { "s1" }, "$17" }, 3619 { { "s2" }, "$18" }, 3620 { { "s3" }, "$19" }, 3621 { { "s4" }, "$20" }, 3622 { { "s5" }, "$21" }, 3623 { { "s6" }, "$22" }, 3624 { { "s7" }, "$23" }, 3625 { { "t8" }, "$24" }, 3626 { { "t9" }, "$25" }, 3627 { { "k0" }, "$26" }, 3628 { { "k1" }, "$27" }, 3629 { { "gp" }, "$28" }, 3630 { { "sp","$sp" }, "$29" }, 3631 { { "fp","$fp" }, "$30" }, 3632 { { "ra" }, "$31" } 3633 }; 3634 Aliases = GCCRegAliases; 3635 NumAliases = llvm::array_lengthof(GCCRegAliases); 3636 } 3637}; 3638 3639class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3640public: 3641 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3642 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3643 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3644 } 3645 virtual void getTargetDefines(const LangOptions &Opts, 3646 MacroBuilder &Builder) const { 3647 DefineStd(Builder, "mips", Opts); 3648 Builder.defineMacro("_mips"); 3649 DefineStd(Builder, "MIPSEB", Opts); 3650 Builder.defineMacro("_MIPSEB"); 3651 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3652 getArchDefines(Opts, Builder); 3653 } 3654}; 3655 3656class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3657public: 3658 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3659 BigEndian = false; 3660 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3661 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3662 } 3663 virtual void getTargetDefines(const LangOptions &Opts, 3664 MacroBuilder &Builder) const { 3665 DefineStd(Builder, "mips", Opts); 3666 Builder.defineMacro("_mips"); 3667 DefineStd(Builder, "MIPSEL", Opts); 3668 Builder.defineMacro("_MIPSEL"); 3669 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3670 getArchDefines(Opts, Builder); 3671 } 3672}; 3673 3674class Mips64TargetInfoBase : public MipsTargetInfoBase { 3675 virtual void SetDescriptionString(const std::string &Name) = 0; 3676public: 3677 Mips64TargetInfoBase(const std::string& triple) : 3678 MipsTargetInfoBase(triple, "n64") { 3679 LongWidth = LongAlign = 64; 3680 PointerWidth = PointerAlign = 64; 3681 LongDoubleWidth = LongDoubleAlign = 128; 3682 LongDoubleFormat = &llvm::APFloat::IEEEquad; 3683 SuitableAlign = 128; 3684 } 3685 virtual bool setABI(const std::string &Name) { 3686 SetDescriptionString(Name); 3687 3688 if (Name != "n32" && Name != "n64") 3689 return false; 3690 3691 ABI = Name; 3692 3693 if (Name == "n32") { 3694 LongWidth = LongAlign = 32; 3695 PointerWidth = PointerAlign = 32; 3696 } 3697 3698 return true; 3699 } 3700 virtual void getArchDefines(const LangOptions &Opts, 3701 MacroBuilder &Builder) const { 3702 MipsTargetInfoBase::getArchDefines(Opts, Builder); 3703 3704 if (ABI == "n32") { 3705 Builder.defineMacro("__mips_n32"); 3706 Builder.defineMacro("_ABIN32", "2"); 3707 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3708 } 3709 else if (ABI == "n64") { 3710 Builder.defineMacro("__mips_n64"); 3711 Builder.defineMacro("_ABI64", "3"); 3712 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3713 } 3714 else 3715 llvm_unreachable("Invalid ABI for Mips64."); 3716 } 3717 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3718 unsigned &NumAliases) const { 3719 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3720 { { "at" }, "$1" }, 3721 { { "v0" }, "$2" }, 3722 { { "v1" }, "$3" }, 3723 { { "a0" }, "$4" }, 3724 { { "a1" }, "$5" }, 3725 { { "a2" }, "$6" }, 3726 { { "a3" }, "$7" }, 3727 { { "a4" }, "$8" }, 3728 { { "a5" }, "$9" }, 3729 { { "a6" }, "$10" }, 3730 { { "a7" }, "$11" }, 3731 { { "t0" }, "$12" }, 3732 { { "t1" }, "$13" }, 3733 { { "t2" }, "$14" }, 3734 { { "t3" }, "$15" }, 3735 { { "s0" }, "$16" }, 3736 { { "s1" }, "$17" }, 3737 { { "s2" }, "$18" }, 3738 { { "s3" }, "$19" }, 3739 { { "s4" }, "$20" }, 3740 { { "s5" }, "$21" }, 3741 { { "s6" }, "$22" }, 3742 { { "s7" }, "$23" }, 3743 { { "t8" }, "$24" }, 3744 { { "t9" }, "$25" }, 3745 { { "k0" }, "$26" }, 3746 { { "k1" }, "$27" }, 3747 { { "gp" }, "$28" }, 3748 { { "sp","$sp" }, "$29" }, 3749 { { "fp","$fp" }, "$30" }, 3750 { { "ra" }, "$31" } 3751 }; 3752 Aliases = GCCRegAliases; 3753 NumAliases = llvm::array_lengthof(GCCRegAliases); 3754 } 3755}; 3756 3757class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3758 virtual void SetDescriptionString(const std::string &Name) { 3759 // Change DescriptionString only if ABI is n32. 3760 if (Name == "n32") 3761 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3762 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3763 "v64:64:64-n32"; 3764 } 3765public: 3766 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3767 // Default ABI is n64. 3768 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3769 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3770 "v64:64:64-n32"; 3771 } 3772 virtual void getTargetDefines(const LangOptions &Opts, 3773 MacroBuilder &Builder) const { 3774 DefineStd(Builder, "mips", Opts); 3775 Builder.defineMacro("_mips"); 3776 DefineStd(Builder, "MIPSEB", Opts); 3777 Builder.defineMacro("_MIPSEB"); 3778 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3779 getArchDefines(Opts, Builder); 3780 } 3781}; 3782 3783class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3784 virtual void SetDescriptionString(const std::string &Name) { 3785 // Change DescriptionString only if ABI is n32. 3786 if (Name == "n32") 3787 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3788 "i64:64:64-f32:32:32-f64:64:64-f128:128:128" 3789 "-v64:64:64-n32"; 3790 } 3791public: 3792 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3793 // Default ABI is n64. 3794 BigEndian = false; 3795 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3796 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3797 "v64:64:64-n32"; 3798 } 3799 virtual void getTargetDefines(const LangOptions &Opts, 3800 MacroBuilder &Builder) const { 3801 DefineStd(Builder, "mips", Opts); 3802 Builder.defineMacro("_mips"); 3803 DefineStd(Builder, "MIPSEL", Opts); 3804 Builder.defineMacro("_MIPSEL"); 3805 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3806 getArchDefines(Opts, Builder); 3807 } 3808}; 3809} // end anonymous namespace. 3810 3811namespace { 3812class PNaClTargetInfo : public TargetInfo { 3813public: 3814 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3815 BigEndian = false; 3816 this->UserLabelPrefix = ""; 3817 this->LongAlign = 32; 3818 this->LongWidth = 32; 3819 this->PointerAlign = 32; 3820 this->PointerWidth = 32; 3821 this->IntMaxType = TargetInfo::SignedLongLong; 3822 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3823 this->Int64Type = TargetInfo::SignedLongLong; 3824 this->DoubleAlign = 64; 3825 this->LongDoubleWidth = 64; 3826 this->LongDoubleAlign = 64; 3827 this->SizeType = TargetInfo::UnsignedInt; 3828 this->PtrDiffType = TargetInfo::SignedInt; 3829 this->IntPtrType = TargetInfo::SignedInt; 3830 this->RegParmMax = 2; 3831 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3832 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3833 } 3834 3835 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3836 } 3837 virtual void getArchDefines(const LangOptions &Opts, 3838 MacroBuilder &Builder) const { 3839 Builder.defineMacro("__le32__"); 3840 Builder.defineMacro("__pnacl__"); 3841 } 3842 virtual void getTargetDefines(const LangOptions &Opts, 3843 MacroBuilder &Builder) const { 3844 DefineStd(Builder, "unix", Opts); 3845 Builder.defineMacro("__ELF__"); 3846 if (Opts.POSIXThreads) 3847 Builder.defineMacro("_REENTRANT"); 3848 if (Opts.CPlusPlus) 3849 Builder.defineMacro("_GNU_SOURCE"); 3850 3851 Builder.defineMacro("__LITTLE_ENDIAN__"); 3852 Builder.defineMacro("__native_client__"); 3853 getArchDefines(Opts, Builder); 3854 } 3855 virtual bool hasFeature(StringRef Feature) const { 3856 return Feature == "pnacl"; 3857 } 3858 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3859 unsigned &NumRecords) const { 3860 } 3861 virtual const char *getVAListDeclaration() const { 3862 return "typedef int __builtin_va_list[4];"; 3863 } 3864 virtual void getGCCRegNames(const char * const *&Names, 3865 unsigned &NumNames) const; 3866 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3867 unsigned &NumAliases) const; 3868 virtual bool validateAsmConstraint(const char *&Name, 3869 TargetInfo::ConstraintInfo &Info) const { 3870 return false; 3871 } 3872 3873 virtual const char *getClobbers() const { 3874 return ""; 3875 } 3876}; 3877 3878void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 3879 unsigned &NumNames) const { 3880 Names = NULL; 3881 NumNames = 0; 3882} 3883 3884void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3885 unsigned &NumAliases) const { 3886 Aliases = NULL; 3887 NumAliases = 0; 3888} 3889} // end anonymous namespace. 3890 3891 3892//===----------------------------------------------------------------------===// 3893// Driver code 3894//===----------------------------------------------------------------------===// 3895 3896static TargetInfo *AllocateTarget(const std::string &T) { 3897 llvm::Triple Triple(T); 3898 llvm::Triple::OSType os = Triple.getOS(); 3899 3900 switch (Triple.getArch()) { 3901 default: 3902 return NULL; 3903 3904 case llvm::Triple::hexagon: 3905 return new HexagonTargetInfo(T); 3906 3907 case llvm::Triple::arm: 3908 case llvm::Triple::thumb: 3909 if (Triple.isOSDarwin()) 3910 return new DarwinARMTargetInfo(T); 3911 3912 switch (os) { 3913 case llvm::Triple::Linux: 3914 return new LinuxTargetInfo<ARMTargetInfo>(T); 3915 case llvm::Triple::FreeBSD: 3916 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 3917 case llvm::Triple::NetBSD: 3918 return new NetBSDTargetInfo<ARMTargetInfo>(T); 3919 case llvm::Triple::RTEMS: 3920 return new RTEMSTargetInfo<ARMTargetInfo>(T); 3921 default: 3922 return new ARMTargetInfo(T); 3923 } 3924 3925 case llvm::Triple::msp430: 3926 return new MSP430TargetInfo(T); 3927 3928 case llvm::Triple::mips: 3929 switch (os) { 3930 case llvm::Triple::Linux: 3931 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 3932 case llvm::Triple::RTEMS: 3933 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 3934 case llvm::Triple::FreeBSD: 3935 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 3936 case llvm::Triple::NetBSD: 3937 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 3938 default: 3939 return new Mips32EBTargetInfo(T); 3940 } 3941 3942 case llvm::Triple::mipsel: 3943 switch (os) { 3944 case llvm::Triple::Linux: 3945 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 3946 case llvm::Triple::RTEMS: 3947 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 3948 case llvm::Triple::FreeBSD: 3949 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 3950 case llvm::Triple::NetBSD: 3951 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 3952 default: 3953 return new Mips32ELTargetInfo(T); 3954 } 3955 3956 case llvm::Triple::mips64: 3957 switch (os) { 3958 case llvm::Triple::Linux: 3959 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 3960 case llvm::Triple::RTEMS: 3961 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 3962 case llvm::Triple::FreeBSD: 3963 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 3964 case llvm::Triple::NetBSD: 3965 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 3966 default: 3967 return new Mips64EBTargetInfo(T); 3968 } 3969 3970 case llvm::Triple::mips64el: 3971 switch (os) { 3972 case llvm::Triple::Linux: 3973 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 3974 case llvm::Triple::RTEMS: 3975 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 3976 case llvm::Triple::FreeBSD: 3977 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 3978 case llvm::Triple::NetBSD: 3979 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 3980 default: 3981 return new Mips64ELTargetInfo(T); 3982 } 3983 3984 case llvm::Triple::le32: 3985 switch (os) { 3986 case llvm::Triple::NativeClient: 3987 return new PNaClTargetInfo(T); 3988 default: 3989 return NULL; 3990 } 3991 3992 case llvm::Triple::ppc: 3993 if (Triple.isOSDarwin()) 3994 return new DarwinPPC32TargetInfo(T); 3995 switch (os) { 3996 case llvm::Triple::Linux: 3997 return new LinuxTargetInfo<PPC32TargetInfo>(T); 3998 case llvm::Triple::FreeBSD: 3999 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 4000 case llvm::Triple::NetBSD: 4001 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 4002 case llvm::Triple::RTEMS: 4003 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 4004 default: 4005 return new PPC32TargetInfo(T); 4006 } 4007 4008 case llvm::Triple::ppc64: 4009 if (Triple.isOSDarwin()) 4010 return new DarwinPPC64TargetInfo(T); 4011 switch (os) { 4012 case llvm::Triple::Linux: 4013 return new LinuxTargetInfo<PPC64TargetInfo>(T); 4014 case llvm::Triple::Lv2: 4015 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 4016 case llvm::Triple::FreeBSD: 4017 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 4018 case llvm::Triple::NetBSD: 4019 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 4020 default: 4021 return new PPC64TargetInfo(T); 4022 } 4023 4024 case llvm::Triple::ptx32: 4025 return new PTX32TargetInfo(T); 4026 case llvm::Triple::ptx64: 4027 return new PTX64TargetInfo(T); 4028 4029 case llvm::Triple::mblaze: 4030 return new MBlazeTargetInfo(T); 4031 4032 case llvm::Triple::sparc: 4033 switch (os) { 4034 case llvm::Triple::Linux: 4035 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 4036 case llvm::Triple::AuroraUX: 4037 return new AuroraUXSparcV8TargetInfo(T); 4038 case llvm::Triple::Solaris: 4039 return new SolarisSparcV8TargetInfo(T); 4040 case llvm::Triple::NetBSD: 4041 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 4042 case llvm::Triple::RTEMS: 4043 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 4044 default: 4045 return new SparcV8TargetInfo(T); 4046 } 4047 4048 // FIXME: Need a real SPU target. 4049 case llvm::Triple::cellspu: 4050 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 4051 4052 case llvm::Triple::tce: 4053 return new TCETargetInfo(T); 4054 4055 case llvm::Triple::x86: 4056 if (Triple.isOSDarwin()) 4057 return new DarwinI386TargetInfo(T); 4058 4059 switch (os) { 4060 case llvm::Triple::AuroraUX: 4061 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 4062 case llvm::Triple::Linux: 4063 return new LinuxTargetInfo<X86_32TargetInfo>(T); 4064 case llvm::Triple::DragonFly: 4065 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 4066 case llvm::Triple::NetBSD: 4067 return new NetBSDI386TargetInfo(T); 4068 case llvm::Triple::OpenBSD: 4069 return new OpenBSDI386TargetInfo(T); 4070 case llvm::Triple::FreeBSD: 4071 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 4072 case llvm::Triple::Minix: 4073 return new MinixTargetInfo<X86_32TargetInfo>(T); 4074 case llvm::Triple::Solaris: 4075 return new SolarisTargetInfo<X86_32TargetInfo>(T); 4076 case llvm::Triple::Cygwin: 4077 return new CygwinX86_32TargetInfo(T); 4078 case llvm::Triple::MinGW32: 4079 return new MinGWX86_32TargetInfo(T); 4080 case llvm::Triple::Win32: 4081 return new VisualStudioWindowsX86_32TargetInfo(T); 4082 case llvm::Triple::Haiku: 4083 return new HaikuX86_32TargetInfo(T); 4084 case llvm::Triple::RTEMS: 4085 return new RTEMSX86_32TargetInfo(T); 4086 default: 4087 return new X86_32TargetInfo(T); 4088 } 4089 4090 case llvm::Triple::x86_64: 4091 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 4092 return new DarwinX86_64TargetInfo(T); 4093 4094 switch (os) { 4095 case llvm::Triple::AuroraUX: 4096 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 4097 case llvm::Triple::Linux: 4098 return new LinuxTargetInfo<X86_64TargetInfo>(T); 4099 case llvm::Triple::DragonFly: 4100 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 4101 case llvm::Triple::NetBSD: 4102 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 4103 case llvm::Triple::OpenBSD: 4104 return new OpenBSDX86_64TargetInfo(T); 4105 case llvm::Triple::FreeBSD: 4106 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 4107 case llvm::Triple::Solaris: 4108 return new SolarisTargetInfo<X86_64TargetInfo>(T); 4109 case llvm::Triple::MinGW32: 4110 return new MinGWX86_64TargetInfo(T); 4111 case llvm::Triple::Win32: // This is what Triple.h supports now. 4112 return new VisualStudioWindowsX86_64TargetInfo(T); 4113 default: 4114 return new X86_64TargetInfo(T); 4115 } 4116 } 4117} 4118 4119/// CreateTargetInfo - Return the target info object for the specified target 4120/// triple. 4121TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 4122 TargetOptions &Opts) { 4123 llvm::Triple Triple(Opts.Triple); 4124 4125 // Construct the target 4126 OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 4127 if (!Target) { 4128 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 4129 return 0; 4130 } 4131 4132 // Set the target CPU if specified. 4133 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 4134 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 4135 return 0; 4136 } 4137 4138 // Set the target ABI if specified. 4139 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 4140 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 4141 return 0; 4142 } 4143 4144 // Set the target C++ ABI. 4145 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 4146 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 4147 return 0; 4148 } 4149 4150 // Compute the default target features, we need the target to handle this 4151 // because features may have dependencies on one another. 4152 llvm::StringMap<bool> Features; 4153 Target->getDefaultFeatures(Features); 4154 4155 // Apply the user specified deltas. 4156 // First the enables. 4157 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 4158 ie = Opts.Features.end(); it != ie; ++it) { 4159 const char *Name = it->c_str(); 4160 4161 if (Name[0] != '+') 4162 continue; 4163 4164 // Apply the feature via the target. 4165 if (!Target->setFeatureEnabled(Features, Name + 1, true)) { 4166 Diags.Report(diag::err_target_invalid_feature) << Name; 4167 return 0; 4168 } 4169 } 4170 4171 // Then the disables. 4172 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 4173 ie = Opts.Features.end(); it != ie; ++it) { 4174 const char *Name = it->c_str(); 4175 4176 if (Name[0] == '+') 4177 continue; 4178 4179 // Apply the feature via the target. 4180 if (Name[0] != '-' || 4181 !Target->setFeatureEnabled(Features, Name + 1, false)) { 4182 Diags.Report(diag::err_target_invalid_feature) << Name; 4183 return 0; 4184 } 4185 } 4186 4187 // Add the features to the compile options. 4188 // 4189 // FIXME: If we are completely confident that we have the right set, we only 4190 // need to pass the minuses. 4191 Opts.Features.clear(); 4192 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 4193 ie = Features.end(); it != ie; ++it) 4194 Opts.Features.push_back((it->second ? "+" : "-") + it->first().str()); 4195 Target->HandleTargetFeatures(Opts.Features); 4196 4197 return Target.take(); 4198} 4199