Targets.cpp revision edb66f38dbdc501342aa1f17c8a15a34ed73584d
1//===--- Targets.cpp - Implement -arch option and targets -----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements construction of a TargetInfo object from a 11// target triple. 12// 13//===----------------------------------------------------------------------===// 14 15#include "clang/Basic/TargetInfo.h" 16#include "clang/Basic/Builtins.h" 17#include "clang/Basic/Diagnostic.h" 18#include "clang/Basic/LangOptions.h" 19#include "clang/Basic/MacroBuilder.h" 20#include "clang/Basic/TargetBuiltins.h" 21#include "clang/Basic/TargetOptions.h" 22#include "llvm/ADT/APFloat.h" 23#include "llvm/ADT/OwningPtr.h" 24#include "llvm/ADT/STLExtras.h" 25#include "llvm/ADT/StringRef.h" 26#include "llvm/ADT/StringSwitch.h" 27#include "llvm/ADT/Triple.h" 28#include "llvm/MC/MCSectionMachO.h" 29#include "llvm/Support/ErrorHandling.h" 30#include "llvm/Type.h" 31#include <algorithm> 32using namespace clang; 33 34//===----------------------------------------------------------------------===// 35// Common code shared among targets. 36//===----------------------------------------------------------------------===// 37 38/// DefineStd - Define a macro name and standard variants. For example if 39/// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40/// when in GNU mode. 41static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55} 56 57static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName, 58 bool Tuning = true) { 59 Builder.defineMacro("__" + CPUName); 60 Builder.defineMacro("__" + CPUName + "__"); 61 if (Tuning) 62 Builder.defineMacro("__tune_" + CPUName + "__"); 63} 64 65//===----------------------------------------------------------------------===// 66// Defines specific to certain operating systems. 67//===----------------------------------------------------------------------===// 68 69namespace { 70template<typename TgtInfo> 71class OSTargetInfo : public TgtInfo { 72protected: 73 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 74 MacroBuilder &Builder) const=0; 75public: 76 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 77 virtual void getTargetDefines(const LangOptions &Opts, 78 MacroBuilder &Builder) const { 79 TgtInfo::getTargetDefines(Opts, Builder); 80 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 81 } 82 83}; 84} // end anonymous namespace 85 86 87static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 88 const llvm::Triple &Triple, 89 StringRef &PlatformName, 90 VersionTuple &PlatformMinVersion) { 91 Builder.defineMacro("__APPLE_CC__", "5621"); 92 Builder.defineMacro("__APPLE__"); 93 Builder.defineMacro("__MACH__"); 94 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 95 96 if (!Opts.ObjCAutoRefCount) { 97 // __weak is always defined, for use in blocks and with objc pointers. 98 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 99 100 // Darwin defines __strong even in C mode (just to nothing). 101 if (Opts.getGC() != LangOptions::NonGC) 102 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 103 else 104 Builder.defineMacro("__strong", ""); 105 106 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 107 // allow this in C, since one might have block pointers in structs that 108 // are used in pure C code and in Objective-C ARC. 109 Builder.defineMacro("__unsafe_unretained", ""); 110 } 111 112 if (Opts.Static) 113 Builder.defineMacro("__STATIC__"); 114 else 115 Builder.defineMacro("__DYNAMIC__"); 116 117 if (Opts.POSIXThreads) 118 Builder.defineMacro("_REENTRANT"); 119 120 // Get the platform type and version number from the triple. 121 unsigned Maj, Min, Rev; 122 if (Triple.isMacOSX()) { 123 Triple.getMacOSXVersion(Maj, Min, Rev); 124 PlatformName = "macosx"; 125 } else { 126 Triple.getOSVersion(Maj, Min, Rev); 127 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 128 } 129 130 // If -target arch-pc-win32-macho option specified, we're 131 // generating code for Win32 ABI. No need to emit 132 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 133 if (PlatformName == "win32") { 134 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 135 return; 136 } 137 138 // Set the appropriate OS version define. 139 if (Triple.getOS() == llvm::Triple::IOS) { 140 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 141 char Str[6]; 142 Str[0] = '0' + Maj; 143 Str[1] = '0' + (Min / 10); 144 Str[2] = '0' + (Min % 10); 145 Str[3] = '0' + (Rev / 10); 146 Str[4] = '0' + (Rev % 10); 147 Str[5] = '\0'; 148 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 149 } else { 150 // Note that the Driver allows versions which aren't representable in the 151 // define (because we only get a single digit for the minor and micro 152 // revision numbers). So, we limit them to the maximum representable 153 // version. 154 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 155 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 156 char Str[5]; 157 Str[0] = '0' + (Maj / 10); 158 Str[1] = '0' + (Maj % 10); 159 Str[2] = '0' + std::min(Min, 9U); 160 Str[3] = '0' + std::min(Rev, 9U); 161 Str[4] = '\0'; 162 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 163 } 164 165 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 166} 167 168namespace { 169template<typename Target> 170class DarwinTargetInfo : public OSTargetInfo<Target> { 171protected: 172 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 173 MacroBuilder &Builder) const { 174 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 175 this->PlatformMinVersion); 176 } 177 178public: 179 DarwinTargetInfo(const std::string& triple) : 180 OSTargetInfo<Target>(triple) { 181 llvm::Triple T = llvm::Triple(triple); 182 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 183 this->MCountName = "\01mcount"; 184 } 185 186 virtual std::string isValidSectionSpecifier(StringRef SR) const { 187 // Let MCSectionMachO validate this. 188 StringRef Segment, Section; 189 unsigned TAA, StubSize; 190 bool HasTAA; 191 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 192 TAA, HasTAA, StubSize); 193 } 194 195 virtual const char *getStaticInitSectionSpecifier() const { 196 // FIXME: We should return 0 when building kexts. 197 return "__TEXT,__StaticInit,regular,pure_instructions"; 198 } 199 200 /// Darwin does not support protected visibility. Darwin's "default" 201 /// is very similar to ELF's "protected"; Darwin requires a "weak" 202 /// attribute on declarations that can be dynamically replaced. 203 virtual bool hasProtectedVisibility() const { 204 return false; 205 } 206}; 207 208 209// DragonFlyBSD Target 210template<typename Target> 211class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 212protected: 213 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 214 MacroBuilder &Builder) const { 215 // DragonFly defines; list based off of gcc output 216 Builder.defineMacro("__DragonFly__"); 217 Builder.defineMacro("__DragonFly_cc_version", "100001"); 218 Builder.defineMacro("__ELF__"); 219 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 220 Builder.defineMacro("__tune_i386__"); 221 DefineStd(Builder, "unix", Opts); 222 } 223public: 224 DragonFlyBSDTargetInfo(const std::string &triple) 225 : OSTargetInfo<Target>(triple) { 226 this->UserLabelPrefix = ""; 227 228 llvm::Triple Triple(triple); 229 switch (Triple.getArch()) { 230 default: 231 case llvm::Triple::x86: 232 case llvm::Triple::x86_64: 233 this->MCountName = ".mcount"; 234 break; 235 } 236 } 237}; 238 239// FreeBSD Target 240template<typename Target> 241class FreeBSDTargetInfo : public OSTargetInfo<Target> { 242protected: 243 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 244 MacroBuilder &Builder) const { 245 // FreeBSD defines; list based off of gcc output 246 247 unsigned Release = Triple.getOSMajorVersion(); 248 if (Release == 0U) 249 Release = 8; 250 251 Builder.defineMacro("__FreeBSD__", Twine(Release)); 252 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U)); 253 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 254 DefineStd(Builder, "unix", Opts); 255 Builder.defineMacro("__ELF__"); 256 } 257public: 258 FreeBSDTargetInfo(const std::string &triple) 259 : OSTargetInfo<Target>(triple) { 260 this->UserLabelPrefix = ""; 261 262 llvm::Triple Triple(triple); 263 switch (Triple.getArch()) { 264 default: 265 case llvm::Triple::x86: 266 case llvm::Triple::x86_64: 267 this->MCountName = ".mcount"; 268 break; 269 case llvm::Triple::mips: 270 case llvm::Triple::mipsel: 271 case llvm::Triple::ppc: 272 case llvm::Triple::ppc64: 273 this->MCountName = "_mcount"; 274 break; 275 case llvm::Triple::arm: 276 this->MCountName = "__mcount"; 277 break; 278 } 279 280 } 281}; 282 283// Minix Target 284template<typename Target> 285class MinixTargetInfo : public OSTargetInfo<Target> { 286protected: 287 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 288 MacroBuilder &Builder) const { 289 // Minix defines 290 291 Builder.defineMacro("__minix", "3"); 292 Builder.defineMacro("_EM_WSIZE", "4"); 293 Builder.defineMacro("_EM_PSIZE", "4"); 294 Builder.defineMacro("_EM_SSIZE", "2"); 295 Builder.defineMacro("_EM_LSIZE", "4"); 296 Builder.defineMacro("_EM_FSIZE", "4"); 297 Builder.defineMacro("_EM_DSIZE", "8"); 298 Builder.defineMacro("__ELF__"); 299 DefineStd(Builder, "unix", Opts); 300 } 301public: 302 MinixTargetInfo(const std::string &triple) 303 : OSTargetInfo<Target>(triple) { 304 this->UserLabelPrefix = ""; 305 } 306}; 307 308// Linux target 309template<typename Target> 310class LinuxTargetInfo : public OSTargetInfo<Target> { 311protected: 312 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 313 MacroBuilder &Builder) const { 314 // Linux defines; list based off of gcc output 315 DefineStd(Builder, "unix", Opts); 316 DefineStd(Builder, "linux", Opts); 317 Builder.defineMacro("__gnu_linux__"); 318 Builder.defineMacro("__ELF__"); 319 if (Triple.getEnvironment() == llvm::Triple::ANDROIDEABI) 320 Builder.defineMacro("__ANDROID__", "1"); 321 if (Opts.POSIXThreads) 322 Builder.defineMacro("_REENTRANT"); 323 if (Opts.CPlusPlus) 324 Builder.defineMacro("_GNU_SOURCE"); 325 } 326public: 327 LinuxTargetInfo(const std::string& triple) 328 : OSTargetInfo<Target>(triple) { 329 this->UserLabelPrefix = ""; 330 this->WIntType = TargetInfo::UnsignedInt; 331 } 332 333 virtual const char *getStaticInitSectionSpecifier() const { 334 return ".text.startup"; 335 } 336}; 337 338// NetBSD Target 339template<typename Target> 340class NetBSDTargetInfo : public OSTargetInfo<Target> { 341protected: 342 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 343 MacroBuilder &Builder) const { 344 // NetBSD defines; list based off of gcc output 345 Builder.defineMacro("__NetBSD__"); 346 Builder.defineMacro("__unix__"); 347 Builder.defineMacro("__ELF__"); 348 if (Opts.POSIXThreads) 349 Builder.defineMacro("_POSIX_THREADS"); 350 } 351public: 352 NetBSDTargetInfo(const std::string &triple) 353 : OSTargetInfo<Target>(triple) { 354 this->UserLabelPrefix = ""; 355 } 356}; 357 358// OpenBSD Target 359template<typename Target> 360class OpenBSDTargetInfo : public OSTargetInfo<Target> { 361protected: 362 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 363 MacroBuilder &Builder) const { 364 // OpenBSD defines; list based off of gcc output 365 366 Builder.defineMacro("__OpenBSD__"); 367 DefineStd(Builder, "unix", Opts); 368 Builder.defineMacro("__ELF__"); 369 if (Opts.POSIXThreads) 370 Builder.defineMacro("_REENTRANT"); 371 } 372public: 373 OpenBSDTargetInfo(const std::string &triple) 374 : OSTargetInfo<Target>(triple) { 375 this->UserLabelPrefix = ""; 376 377 llvm::Triple Triple(triple); 378 switch (Triple.getArch()) { 379 default: 380 case llvm::Triple::x86: 381 case llvm::Triple::x86_64: 382 case llvm::Triple::arm: 383 case llvm::Triple::sparc: 384 this->MCountName = "__mcount"; 385 break; 386 case llvm::Triple::mips64: 387 case llvm::Triple::mips64el: 388 case llvm::Triple::ppc: 389 case llvm::Triple::sparcv9: 390 this->MCountName = "_mcount"; 391 break; 392 } 393 } 394}; 395 396// PSP Target 397template<typename Target> 398class PSPTargetInfo : public OSTargetInfo<Target> { 399protected: 400 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 401 MacroBuilder &Builder) const { 402 // PSP defines; list based on the output of the pspdev gcc toolchain. 403 Builder.defineMacro("PSP"); 404 Builder.defineMacro("_PSP"); 405 Builder.defineMacro("__psp__"); 406 Builder.defineMacro("__ELF__"); 407 } 408public: 409 PSPTargetInfo(const std::string& triple) 410 : OSTargetInfo<Target>(triple) { 411 this->UserLabelPrefix = ""; 412 } 413}; 414 415// PS3 PPU Target 416template<typename Target> 417class PS3PPUTargetInfo : public OSTargetInfo<Target> { 418protected: 419 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 420 MacroBuilder &Builder) const { 421 // PS3 PPU defines. 422 Builder.defineMacro("__PPC__"); 423 Builder.defineMacro("__PPU__"); 424 Builder.defineMacro("__CELLOS_LV2__"); 425 Builder.defineMacro("__ELF__"); 426 Builder.defineMacro("__LP32__"); 427 Builder.defineMacro("_ARCH_PPC64"); 428 Builder.defineMacro("__powerpc64__"); 429 } 430public: 431 PS3PPUTargetInfo(const std::string& triple) 432 : OSTargetInfo<Target>(triple) { 433 this->UserLabelPrefix = ""; 434 this->LongWidth = this->LongAlign = 32; 435 this->PointerWidth = this->PointerAlign = 32; 436 this->IntMaxType = TargetInfo::SignedLongLong; 437 this->UIntMaxType = TargetInfo::UnsignedLongLong; 438 this->Int64Type = TargetInfo::SignedLongLong; 439 this->SizeType = TargetInfo::UnsignedInt; 440 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 441 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 442 } 443}; 444 445// FIXME: Need a real SPU target. 446// PS3 SPU Target 447template<typename Target> 448class PS3SPUTargetInfo : public OSTargetInfo<Target> { 449protected: 450 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 451 MacroBuilder &Builder) const { 452 // PS3 PPU defines. 453 Builder.defineMacro("__SPU__"); 454 Builder.defineMacro("__ELF__"); 455 } 456public: 457 PS3SPUTargetInfo(const std::string& triple) 458 : OSTargetInfo<Target>(triple) { 459 this->UserLabelPrefix = ""; 460 } 461}; 462 463// AuroraUX target 464template<typename Target> 465class AuroraUXTargetInfo : public OSTargetInfo<Target> { 466protected: 467 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 468 MacroBuilder &Builder) const { 469 DefineStd(Builder, "sun", Opts); 470 DefineStd(Builder, "unix", Opts); 471 Builder.defineMacro("__ELF__"); 472 Builder.defineMacro("__svr4__"); 473 Builder.defineMacro("__SVR4"); 474 } 475public: 476 AuroraUXTargetInfo(const std::string& triple) 477 : OSTargetInfo<Target>(triple) { 478 this->UserLabelPrefix = ""; 479 this->WCharType = this->SignedLong; 480 // FIXME: WIntType should be SignedLong 481 } 482}; 483 484// Solaris target 485template<typename Target> 486class SolarisTargetInfo : public OSTargetInfo<Target> { 487protected: 488 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 489 MacroBuilder &Builder) const { 490 DefineStd(Builder, "sun", Opts); 491 DefineStd(Builder, "unix", Opts); 492 Builder.defineMacro("__ELF__"); 493 Builder.defineMacro("__svr4__"); 494 Builder.defineMacro("__SVR4"); 495 // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and 496 // newer, but to 500 for everything else. feature_test.h has a check to 497 // ensure that you are not using C99 with an old version of X/Open or C89 498 // with a new version. 499 if (Opts.C99 || Opts.C11) 500 Builder.defineMacro("_XOPEN_SOURCE", "600"); 501 else 502 Builder.defineMacro("_XOPEN_SOURCE", "500"); 503 if (Opts.CPlusPlus) 504 Builder.defineMacro("__C99FEATURES__"); 505 Builder.defineMacro("_LARGEFILE_SOURCE"); 506 Builder.defineMacro("_LARGEFILE64_SOURCE"); 507 Builder.defineMacro("__EXTENSIONS__"); 508 Builder.defineMacro("_REENTRANT"); 509 } 510public: 511 SolarisTargetInfo(const std::string& triple) 512 : OSTargetInfo<Target>(triple) { 513 this->UserLabelPrefix = ""; 514 this->WCharType = this->SignedInt; 515 // FIXME: WIntType should be SignedLong 516 } 517}; 518 519// Windows target 520template<typename Target> 521class WindowsTargetInfo : public OSTargetInfo<Target> { 522protected: 523 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 524 MacroBuilder &Builder) const { 525 Builder.defineMacro("_WIN32"); 526 } 527 void getVisualStudioDefines(const LangOptions &Opts, 528 MacroBuilder &Builder) const { 529 if (Opts.CPlusPlus) { 530 if (Opts.RTTI) 531 Builder.defineMacro("_CPPRTTI"); 532 533 if (Opts.Exceptions) 534 Builder.defineMacro("_CPPUNWIND"); 535 } 536 537 if (!Opts.CharIsSigned) 538 Builder.defineMacro("_CHAR_UNSIGNED"); 539 540 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 541 // but it works for now. 542 if (Opts.POSIXThreads) 543 Builder.defineMacro("_MT"); 544 545 if (Opts.MSCVersion != 0) 546 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 547 548 if (Opts.MicrosoftExt) { 549 Builder.defineMacro("_MSC_EXTENSIONS"); 550 551 if (Opts.CPlusPlus0x) { 552 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 553 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 554 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 555 } 556 } 557 558 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 559 } 560 561public: 562 WindowsTargetInfo(const std::string &triple) 563 : OSTargetInfo<Target>(triple) {} 564}; 565 566} // end anonymous namespace. 567 568//===----------------------------------------------------------------------===// 569// Specific target implementations. 570//===----------------------------------------------------------------------===// 571 572namespace { 573// PPC abstract base class 574class PPCTargetInfo : public TargetInfo { 575 static const Builtin::Info BuiltinInfo[]; 576 static const char * const GCCRegNames[]; 577 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 578public: 579 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) { 580 LongDoubleWidth = LongDoubleAlign = 128; 581 LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble; 582 } 583 584 virtual void getTargetBuiltins(const Builtin::Info *&Records, 585 unsigned &NumRecords) const { 586 Records = BuiltinInfo; 587 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 588 } 589 590 virtual bool isCLZForZeroUndef() const { return false; } 591 592 virtual void getTargetDefines(const LangOptions &Opts, 593 MacroBuilder &Builder) const; 594 595 virtual bool hasFeature(StringRef Feature) const; 596 597 virtual void getGCCRegNames(const char * const *&Names, 598 unsigned &NumNames) const; 599 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 600 unsigned &NumAliases) const; 601 virtual bool validateAsmConstraint(const char *&Name, 602 TargetInfo::ConstraintInfo &Info) const { 603 switch (*Name) { 604 default: return false; 605 case 'O': // Zero 606 break; 607 case 'b': // Base register 608 case 'f': // Floating point register 609 Info.setAllowsRegister(); 610 break; 611 // FIXME: The following are added to allow parsing. 612 // I just took a guess at what the actions should be. 613 // Also, is more specific checking needed? I.e. specific registers? 614 case 'd': // Floating point register (containing 64-bit value) 615 case 'v': // Altivec vector register 616 Info.setAllowsRegister(); 617 break; 618 case 'w': 619 switch (Name[1]) { 620 case 'd':// VSX vector register to hold vector double data 621 case 'f':// VSX vector register to hold vector float data 622 case 's':// VSX vector register to hold scalar float data 623 case 'a':// Any VSX register 624 break; 625 default: 626 return false; 627 } 628 Info.setAllowsRegister(); 629 Name++; // Skip over 'w'. 630 break; 631 case 'h': // `MQ', `CTR', or `LINK' register 632 case 'q': // `MQ' register 633 case 'c': // `CTR' register 634 case 'l': // `LINK' register 635 case 'x': // `CR' register (condition register) number 0 636 case 'y': // `CR' register (condition register) 637 case 'z': // `XER[CA]' carry bit (part of the XER register) 638 Info.setAllowsRegister(); 639 break; 640 case 'I': // Signed 16-bit constant 641 case 'J': // Unsigned 16-bit constant shifted left 16 bits 642 // (use `L' instead for SImode constants) 643 case 'K': // Unsigned 16-bit constant 644 case 'L': // Signed 16-bit constant shifted left 16 bits 645 case 'M': // Constant larger than 31 646 case 'N': // Exact power of 2 647 case 'P': // Constant whose negation is a signed 16-bit constant 648 case 'G': // Floating point constant that can be loaded into a 649 // register with one instruction per word 650 case 'H': // Integer/Floating point constant that can be loaded 651 // into a register using three instructions 652 break; 653 case 'm': // Memory operand. Note that on PowerPC targets, m can 654 // include addresses that update the base register. It 655 // is therefore only safe to use `m' in an asm statement 656 // if that asm statement accesses the operand exactly once. 657 // The asm statement must also use `%U<opno>' as a 658 // placeholder for the "update" flag in the corresponding 659 // load or store instruction. For example: 660 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 661 // is correct but: 662 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 663 // is not. Use es rather than m if you don't want the base 664 // register to be updated. 665 case 'e': 666 if (Name[1] != 's') 667 return false; 668 // es: A "stable" memory operand; that is, one which does not 669 // include any automodification of the base register. Unlike 670 // `m', this constraint can be used in asm statements that 671 // might access the operand several times, or that might not 672 // access it at all. 673 Info.setAllowsMemory(); 674 Name++; // Skip over 'e'. 675 break; 676 case 'Q': // Memory operand that is an offset from a register (it is 677 // usually better to use `m' or `es' in asm statements) 678 case 'Z': // Memory operand that is an indexed or indirect from a 679 // register (it is usually better to use `m' or `es' in 680 // asm statements) 681 Info.setAllowsMemory(); 682 Info.setAllowsRegister(); 683 break; 684 case 'R': // AIX TOC entry 685 case 'a': // Address operand that is an indexed or indirect from a 686 // register (`p' is preferable for asm statements) 687 case 'S': // Constant suitable as a 64-bit mask operand 688 case 'T': // Constant suitable as a 32-bit mask operand 689 case 'U': // System V Release 4 small data area reference 690 case 't': // AND masks that can be performed by two rldic{l, r} 691 // instructions 692 case 'W': // Vector constant that does not require memory 693 case 'j': // Vector constant that is all zeros. 694 break; 695 // End FIXME. 696 } 697 return true; 698 } 699 virtual const char *getClobbers() const { 700 return ""; 701 } 702}; 703 704const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 705#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 706#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 707 ALL_LANGUAGES }, 708#include "clang/Basic/BuiltinsPPC.def" 709}; 710 711 712/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 713/// #defines that are not tied to a specific subtarget. 714void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 715 MacroBuilder &Builder) const { 716 // Target identification. 717 Builder.defineMacro("__ppc__"); 718 Builder.defineMacro("_ARCH_PPC"); 719 Builder.defineMacro("__powerpc__"); 720 Builder.defineMacro("__POWERPC__"); 721 if (PointerWidth == 64) { 722 Builder.defineMacro("_ARCH_PPC64"); 723 Builder.defineMacro("_LP64"); 724 Builder.defineMacro("__LP64__"); 725 Builder.defineMacro("__powerpc64__"); 726 Builder.defineMacro("__ppc64__"); 727 } else { 728 Builder.defineMacro("__ppc__"); 729 } 730 731 // Target properties. 732 if (getTriple().getOS() != llvm::Triple::NetBSD) 733 Builder.defineMacro("_BIG_ENDIAN"); 734 Builder.defineMacro("__BIG_ENDIAN__"); 735 736 // Subtarget options. 737 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 738 Builder.defineMacro("__REGISTER_PREFIX__", ""); 739 740 // FIXME: Should be controlled by command line option. 741 Builder.defineMacro("__LONG_DOUBLE_128__"); 742 743 if (Opts.AltiVec) { 744 Builder.defineMacro("__VEC__", "10206"); 745 Builder.defineMacro("__ALTIVEC__"); 746 } 747} 748 749bool PPCTargetInfo::hasFeature(StringRef Feature) const { 750 return Feature == "powerpc"; 751} 752 753 754const char * const PPCTargetInfo::GCCRegNames[] = { 755 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 756 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 757 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 758 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 759 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 760 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 761 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 762 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 763 "mq", "lr", "ctr", "ap", 764 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 765 "xer", 766 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 767 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 768 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 769 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 770 "vrsave", "vscr", 771 "spe_acc", "spefscr", 772 "sfp" 773}; 774 775void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 776 unsigned &NumNames) const { 777 Names = GCCRegNames; 778 NumNames = llvm::array_lengthof(GCCRegNames); 779} 780 781const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 782 // While some of these aliases do map to different registers 783 // they still share the same register name. 784 { { "0" }, "r0" }, 785 { { "1"}, "r1" }, 786 { { "2" }, "r2" }, 787 { { "3" }, "r3" }, 788 { { "4" }, "r4" }, 789 { { "5" }, "r5" }, 790 { { "6" }, "r6" }, 791 { { "7" }, "r7" }, 792 { { "8" }, "r8" }, 793 { { "9" }, "r9" }, 794 { { "10" }, "r10" }, 795 { { "11" }, "r11" }, 796 { { "12" }, "r12" }, 797 { { "13" }, "r13" }, 798 { { "14" }, "r14" }, 799 { { "15" }, "r15" }, 800 { { "16" }, "r16" }, 801 { { "17" }, "r17" }, 802 { { "18" }, "r18" }, 803 { { "19" }, "r19" }, 804 { { "20" }, "r20" }, 805 { { "21" }, "r21" }, 806 { { "22" }, "r22" }, 807 { { "23" }, "r23" }, 808 { { "24" }, "r24" }, 809 { { "25" }, "r25" }, 810 { { "26" }, "r26" }, 811 { { "27" }, "r27" }, 812 { { "28" }, "r28" }, 813 { { "29" }, "r29" }, 814 { { "30" }, "r30" }, 815 { { "31" }, "r31" }, 816 { { "fr0" }, "f0" }, 817 { { "fr1" }, "f1" }, 818 { { "fr2" }, "f2" }, 819 { { "fr3" }, "f3" }, 820 { { "fr4" }, "f4" }, 821 { { "fr5" }, "f5" }, 822 { { "fr6" }, "f6" }, 823 { { "fr7" }, "f7" }, 824 { { "fr8" }, "f8" }, 825 { { "fr9" }, "f9" }, 826 { { "fr10" }, "f10" }, 827 { { "fr11" }, "f11" }, 828 { { "fr12" }, "f12" }, 829 { { "fr13" }, "f13" }, 830 { { "fr14" }, "f14" }, 831 { { "fr15" }, "f15" }, 832 { { "fr16" }, "f16" }, 833 { { "fr17" }, "f17" }, 834 { { "fr18" }, "f18" }, 835 { { "fr19" }, "f19" }, 836 { { "fr20" }, "f20" }, 837 { { "fr21" }, "f21" }, 838 { { "fr22" }, "f22" }, 839 { { "fr23" }, "f23" }, 840 { { "fr24" }, "f24" }, 841 { { "fr25" }, "f25" }, 842 { { "fr26" }, "f26" }, 843 { { "fr27" }, "f27" }, 844 { { "fr28" }, "f28" }, 845 { { "fr29" }, "f29" }, 846 { { "fr30" }, "f30" }, 847 { { "fr31" }, "f31" }, 848 { { "cc" }, "cr0" }, 849}; 850 851void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 852 unsigned &NumAliases) const { 853 Aliases = GCCRegAliases; 854 NumAliases = llvm::array_lengthof(GCCRegAliases); 855} 856} // end anonymous namespace. 857 858namespace { 859class PPC32TargetInfo : public PPCTargetInfo { 860public: 861 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 862 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 863 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 864 865 switch (getTriple().getOS()) { 866 case llvm::Triple::Linux: 867 case llvm::Triple::FreeBSD: 868 case llvm::Triple::NetBSD: 869 SizeType = UnsignedInt; 870 PtrDiffType = SignedInt; 871 IntPtrType = SignedInt; 872 break; 873 default: 874 break; 875 } 876 877 if (getTriple().getOS() == llvm::Triple::FreeBSD) { 878 LongDoubleWidth = LongDoubleAlign = 64; 879 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 880 } 881 } 882 883 virtual const char *getVAListDeclaration() const { 884 // This is the ELF definition, and is overridden by the Darwin sub-target 885 return "typedef struct __va_list_tag {" 886 " unsigned char gpr;" 887 " unsigned char fpr;" 888 " unsigned short reserved;" 889 " void* overflow_arg_area;" 890 " void* reg_save_area;" 891 "} __builtin_va_list[1];"; 892 } 893}; 894} // end anonymous namespace. 895 896namespace { 897class PPC64TargetInfo : public PPCTargetInfo { 898public: 899 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 900 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 901 IntMaxType = SignedLong; 902 UIntMaxType = UnsignedLong; 903 Int64Type = SignedLong; 904 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 905 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 906 907 if (getTriple().getOS() == llvm::Triple::FreeBSD) { 908 LongDoubleWidth = LongDoubleAlign = 64; 909 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 910 } 911 } 912 virtual const char *getVAListDeclaration() const { 913 return "typedef char* __builtin_va_list;"; 914 } 915}; 916} // end anonymous namespace. 917 918 919namespace { 920class DarwinPPC32TargetInfo : 921 public DarwinTargetInfo<PPC32TargetInfo> { 922public: 923 DarwinPPC32TargetInfo(const std::string& triple) 924 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 925 HasAlignMac68kSupport = true; 926 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 927 LongLongAlign = 32; 928 SuitableAlign = 128; 929 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 930 "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32"; 931 } 932 virtual const char *getVAListDeclaration() const { 933 return "typedef char* __builtin_va_list;"; 934 } 935}; 936 937class DarwinPPC64TargetInfo : 938 public DarwinTargetInfo<PPC64TargetInfo> { 939public: 940 DarwinPPC64TargetInfo(const std::string& triple) 941 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 942 HasAlignMac68kSupport = true; 943 SuitableAlign = 128; 944 } 945}; 946} // end anonymous namespace. 947 948namespace { 949 static const unsigned PTXAddrSpaceMap[] = { 950 0, // opencl_global 951 4, // opencl_local 952 1, // opencl_constant 953 0, // cuda_device 954 1, // cuda_constant 955 4, // cuda_shared 956 }; 957 class PTXTargetInfo : public TargetInfo { 958 static const char * const GCCRegNames[]; 959 static const Builtin::Info BuiltinInfo[]; 960 std::vector<llvm::StringRef> AvailableFeatures; 961 public: 962 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 963 BigEndian = false; 964 TLSSupported = false; 965 LongWidth = LongAlign = 64; 966 AddrSpaceMap = &PTXAddrSpaceMap; 967 // Define available target features 968 // These must be defined in sorted order! 969 AvailableFeatures.push_back("compute10"); 970 AvailableFeatures.push_back("compute11"); 971 AvailableFeatures.push_back("compute12"); 972 AvailableFeatures.push_back("compute13"); 973 AvailableFeatures.push_back("compute20"); 974 AvailableFeatures.push_back("double"); 975 AvailableFeatures.push_back("no-fma"); 976 AvailableFeatures.push_back("ptx20"); 977 AvailableFeatures.push_back("ptx21"); 978 AvailableFeatures.push_back("ptx22"); 979 AvailableFeatures.push_back("ptx23"); 980 AvailableFeatures.push_back("sm10"); 981 AvailableFeatures.push_back("sm11"); 982 AvailableFeatures.push_back("sm12"); 983 AvailableFeatures.push_back("sm13"); 984 AvailableFeatures.push_back("sm20"); 985 AvailableFeatures.push_back("sm21"); 986 AvailableFeatures.push_back("sm22"); 987 AvailableFeatures.push_back("sm23"); 988 } 989 virtual void getTargetDefines(const LangOptions &Opts, 990 MacroBuilder &Builder) const { 991 Builder.defineMacro("__PTX__"); 992 } 993 virtual void getTargetBuiltins(const Builtin::Info *&Records, 994 unsigned &NumRecords) const { 995 Records = BuiltinInfo; 996 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 997 } 998 virtual bool hasFeature(StringRef Feature) const { 999 return Feature == "ptx"; 1000 } 1001 1002 virtual void getGCCRegNames(const char * const *&Names, 1003 unsigned &NumNames) const; 1004 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1005 unsigned &NumAliases) const { 1006 // No aliases. 1007 Aliases = 0; 1008 NumAliases = 0; 1009 } 1010 virtual bool validateAsmConstraint(const char *&Name, 1011 TargetInfo::ConstraintInfo &info) const { 1012 // FIXME: implement 1013 return true; 1014 } 1015 virtual const char *getClobbers() const { 1016 // FIXME: Is this really right? 1017 return ""; 1018 } 1019 virtual const char *getVAListDeclaration() const { 1020 // FIXME: implement 1021 return "typedef char* __builtin_va_list;"; 1022 } 1023 1024 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1025 StringRef Name, 1026 bool Enabled) const; 1027 }; 1028 1029 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 1030#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1031#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1032 ALL_LANGUAGES }, 1033#include "clang/Basic/BuiltinsPTX.def" 1034 }; 1035 1036 const char * const PTXTargetInfo::GCCRegNames[] = { 1037 "r0" 1038 }; 1039 1040 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 1041 unsigned &NumNames) const { 1042 Names = GCCRegNames; 1043 NumNames = llvm::array_lengthof(GCCRegNames); 1044 } 1045 1046 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1047 StringRef Name, 1048 bool Enabled) const { 1049 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 1050 Name)) { 1051 Features[Name] = Enabled; 1052 return true; 1053 } else { 1054 return false; 1055 } 1056 } 1057 1058 class PTX32TargetInfo : public PTXTargetInfo { 1059 public: 1060 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1061 PointerWidth = PointerAlign = 32; 1062 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 1063 DescriptionString 1064 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 1065 } 1066 }; 1067 1068 class PTX64TargetInfo : public PTXTargetInfo { 1069 public: 1070 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1071 PointerWidth = PointerAlign = 64; 1072 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1073 DescriptionString 1074 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 1075 } 1076 }; 1077} 1078 1079namespace { 1080 static const unsigned NVPTXAddrSpaceMap[] = { 1081 1, // opencl_global 1082 3, // opencl_local 1083 4, // opencl_constant 1084 1, // cuda_device 1085 4, // cuda_constant 1086 3, // cuda_shared 1087 }; 1088 class NVPTXTargetInfo : public TargetInfo { 1089 static const char * const GCCRegNames[]; 1090 public: 1091 NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 1092 BigEndian = false; 1093 TLSSupported = false; 1094 LongWidth = LongAlign = 64; 1095 AddrSpaceMap = &NVPTXAddrSpaceMap; 1096 } 1097 virtual void getTargetDefines(const LangOptions &Opts, 1098 MacroBuilder &Builder) const { 1099 Builder.defineMacro("__PTX__"); 1100 } 1101 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1102 unsigned &NumRecords) const { 1103 // FIXME: implement. 1104 Records = 0; 1105 NumRecords = 0; 1106 } 1107 virtual bool hasFeature(StringRef Feature) const { 1108 return Feature == "nvptx"; 1109 } 1110 1111 virtual void getGCCRegNames(const char * const *&Names, 1112 unsigned &NumNames) const; 1113 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1114 unsigned &NumAliases) const { 1115 // No aliases. 1116 Aliases = 0; 1117 NumAliases = 0; 1118 } 1119 virtual bool validateAsmConstraint(const char *&Name, 1120 TargetInfo::ConstraintInfo &info) const { 1121 // FIXME: implement 1122 return true; 1123 } 1124 virtual const char *getClobbers() const { 1125 // FIXME: Is this really right? 1126 return ""; 1127 } 1128 virtual const char *getVAListDeclaration() const { 1129 // FIXME: implement 1130 return "typedef char* __builtin_va_list;"; 1131 } 1132 virtual bool setCPU(const std::string &Name) { 1133 return Name == "sm_10"; 1134 } 1135 }; 1136 1137 const char * const NVPTXTargetInfo::GCCRegNames[] = { 1138 "r0" 1139 }; 1140 1141 void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names, 1142 unsigned &NumNames) const { 1143 Names = GCCRegNames; 1144 NumNames = llvm::array_lengthof(GCCRegNames); 1145 } 1146 1147 class NVPTX32TargetInfo : public NVPTXTargetInfo { 1148 public: 1149 NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) { 1150 PointerWidth = PointerAlign = 32; 1151 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 1152 DescriptionString 1153 = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 1154 "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-" 1155 "n16:32:64"; 1156 } 1157 }; 1158 1159 class NVPTX64TargetInfo : public NVPTXTargetInfo { 1160 public: 1161 NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) { 1162 PointerWidth = PointerAlign = 64; 1163 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1164 DescriptionString 1165 = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 1166 "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-" 1167 "n16:32:64"; 1168 } 1169 }; 1170} 1171 1172namespace { 1173// MBlaze abstract base class 1174class MBlazeTargetInfo : public TargetInfo { 1175 static const char * const GCCRegNames[]; 1176 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1177 1178public: 1179 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1180 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1181 } 1182 1183 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1184 unsigned &NumRecords) const { 1185 // FIXME: Implement. 1186 Records = 0; 1187 NumRecords = 0; 1188 } 1189 1190 virtual void getTargetDefines(const LangOptions &Opts, 1191 MacroBuilder &Builder) const; 1192 1193 virtual bool hasFeature(StringRef Feature) const { 1194 return Feature == "mblaze"; 1195 } 1196 1197 virtual const char *getVAListDeclaration() const { 1198 return "typedef char* __builtin_va_list;"; 1199 } 1200 virtual const char *getTargetPrefix() const { 1201 return "mblaze"; 1202 } 1203 virtual void getGCCRegNames(const char * const *&Names, 1204 unsigned &NumNames) const; 1205 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1206 unsigned &NumAliases) const; 1207 virtual bool validateAsmConstraint(const char *&Name, 1208 TargetInfo::ConstraintInfo &Info) const { 1209 switch (*Name) { 1210 default: return false; 1211 case 'O': // Zero 1212 return true; 1213 case 'b': // Base register 1214 case 'f': // Floating point register 1215 Info.setAllowsRegister(); 1216 return true; 1217 } 1218 } 1219 virtual const char *getClobbers() const { 1220 return ""; 1221 } 1222}; 1223 1224/// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1225/// #defines that are not tied to a specific subtarget. 1226void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1227 MacroBuilder &Builder) const { 1228 // Target identification. 1229 Builder.defineMacro("__microblaze__"); 1230 Builder.defineMacro("_ARCH_MICROBLAZE"); 1231 Builder.defineMacro("__MICROBLAZE__"); 1232 1233 // Target properties. 1234 Builder.defineMacro("_BIG_ENDIAN"); 1235 Builder.defineMacro("__BIG_ENDIAN__"); 1236 1237 // Subtarget options. 1238 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1239} 1240 1241 1242const char * const MBlazeTargetInfo::GCCRegNames[] = { 1243 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1244 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1245 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1246 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1247 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1248 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1249 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1250 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1251 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1252 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1253}; 1254 1255void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1256 unsigned &NumNames) const { 1257 Names = GCCRegNames; 1258 NumNames = llvm::array_lengthof(GCCRegNames); 1259} 1260 1261const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1262 { {"f0"}, "r0" }, 1263 { {"f1"}, "r1" }, 1264 { {"f2"}, "r2" }, 1265 { {"f3"}, "r3" }, 1266 { {"f4"}, "r4" }, 1267 { {"f5"}, "r5" }, 1268 { {"f6"}, "r6" }, 1269 { {"f7"}, "r7" }, 1270 { {"f8"}, "r8" }, 1271 { {"f9"}, "r9" }, 1272 { {"f10"}, "r10" }, 1273 { {"f11"}, "r11" }, 1274 { {"f12"}, "r12" }, 1275 { {"f13"}, "r13" }, 1276 { {"f14"}, "r14" }, 1277 { {"f15"}, "r15" }, 1278 { {"f16"}, "r16" }, 1279 { {"f17"}, "r17" }, 1280 { {"f18"}, "r18" }, 1281 { {"f19"}, "r19" }, 1282 { {"f20"}, "r20" }, 1283 { {"f21"}, "r21" }, 1284 { {"f22"}, "r22" }, 1285 { {"f23"}, "r23" }, 1286 { {"f24"}, "r24" }, 1287 { {"f25"}, "r25" }, 1288 { {"f26"}, "r26" }, 1289 { {"f27"}, "r27" }, 1290 { {"f28"}, "r28" }, 1291 { {"f29"}, "r29" }, 1292 { {"f30"}, "r30" }, 1293 { {"f31"}, "r31" }, 1294}; 1295 1296void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1297 unsigned &NumAliases) const { 1298 Aliases = GCCRegAliases; 1299 NumAliases = llvm::array_lengthof(GCCRegAliases); 1300} 1301} // end anonymous namespace. 1302 1303namespace { 1304// Namespace for x86 abstract base class 1305const Builtin::Info BuiltinInfo[] = { 1306#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1307#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1308 ALL_LANGUAGES }, 1309#include "clang/Basic/BuiltinsX86.def" 1310}; 1311 1312static const char* const GCCRegNames[] = { 1313 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1314 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1315 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1316 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1317 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1318 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1319 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1320 "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", 1321 "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15", 1322}; 1323 1324const TargetInfo::AddlRegName AddlRegNames[] = { 1325 { { "al", "ah", "eax", "rax" }, 0 }, 1326 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1327 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1328 { { "dl", "dh", "edx", "rdx" }, 1 }, 1329 { { "esi", "rsi" }, 4 }, 1330 { { "edi", "rdi" }, 5 }, 1331 { { "esp", "rsp" }, 7 }, 1332 { { "ebp", "rbp" }, 6 }, 1333}; 1334 1335// X86 target abstract base class; x86-32 and x86-64 are very close, so 1336// most of the implementation can be shared. 1337class X86TargetInfo : public TargetInfo { 1338 enum X86SSEEnum { 1339 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2 1340 } SSELevel; 1341 enum MMX3DNowEnum { 1342 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1343 } MMX3DNowLevel; 1344 1345 bool HasAES; 1346 bool HasLZCNT; 1347 bool HasBMI; 1348 bool HasBMI2; 1349 bool HasPOPCNT; 1350 bool HasFMA4; 1351 1352 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1353 /// 1354 /// Each enumeration represents a particular CPU supported by Clang. These 1355 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1356 enum CPUKind { 1357 CK_Generic, 1358 1359 /// \name i386 1360 /// i386-generation processors. 1361 //@{ 1362 CK_i386, 1363 //@} 1364 1365 /// \name i486 1366 /// i486-generation processors. 1367 //@{ 1368 CK_i486, 1369 CK_WinChipC6, 1370 CK_WinChip2, 1371 CK_C3, 1372 //@} 1373 1374 /// \name i586 1375 /// i586-generation processors, P5 microarchitecture based. 1376 //@{ 1377 CK_i586, 1378 CK_Pentium, 1379 CK_PentiumMMX, 1380 //@} 1381 1382 /// \name i686 1383 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1384 //@{ 1385 CK_i686, 1386 CK_PentiumPro, 1387 CK_Pentium2, 1388 CK_Pentium3, 1389 CK_Pentium3M, 1390 CK_PentiumM, 1391 CK_C3_2, 1392 1393 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1394 /// Clang however has some logic to suport this. 1395 // FIXME: Warn, deprecate, and potentially remove this. 1396 CK_Yonah, 1397 //@} 1398 1399 /// \name Netburst 1400 /// Netburst microarchitecture based processors. 1401 //@{ 1402 CK_Pentium4, 1403 CK_Pentium4M, 1404 CK_Prescott, 1405 CK_Nocona, 1406 //@} 1407 1408 /// \name Core 1409 /// Core microarchitecture based processors. 1410 //@{ 1411 CK_Core2, 1412 1413 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1414 /// codename which GCC no longer accepts as an option to -march, but Clang 1415 /// has some logic for recognizing it. 1416 // FIXME: Warn, deprecate, and potentially remove this. 1417 CK_Penryn, 1418 //@} 1419 1420 /// \name Atom 1421 /// Atom processors 1422 //@{ 1423 CK_Atom, 1424 //@} 1425 1426 /// \name Nehalem 1427 /// Nehalem microarchitecture based processors. 1428 //@{ 1429 CK_Corei7, 1430 CK_Corei7AVX, 1431 CK_CoreAVXi, 1432 CK_CoreAVX2, 1433 //@} 1434 1435 /// \name K6 1436 /// K6 architecture processors. 1437 //@{ 1438 CK_K6, 1439 CK_K6_2, 1440 CK_K6_3, 1441 //@} 1442 1443 /// \name K7 1444 /// K7 architecture processors. 1445 //@{ 1446 CK_Athlon, 1447 CK_AthlonThunderbird, 1448 CK_Athlon4, 1449 CK_AthlonXP, 1450 CK_AthlonMP, 1451 //@} 1452 1453 /// \name K8 1454 /// K8 architecture processors. 1455 //@{ 1456 CK_Athlon64, 1457 CK_Athlon64SSE3, 1458 CK_AthlonFX, 1459 CK_K8, 1460 CK_K8SSE3, 1461 CK_Opteron, 1462 CK_OpteronSSE3, 1463 CK_AMDFAM10, 1464 //@} 1465 1466 /// \name Bobcat 1467 /// Bobcat architecture processors. 1468 //@{ 1469 CK_BTVER1, 1470 //@} 1471 1472 /// \name Bulldozer 1473 /// Bulldozer architecture processors. 1474 //@{ 1475 CK_BDVER1, 1476 CK_BDVER2, 1477 //@} 1478 1479 /// This specification is deprecated and will be removed in the future. 1480 /// Users should prefer \see CK_K8. 1481 // FIXME: Warn on this when the CPU is set to it. 1482 CK_x86_64, 1483 //@} 1484 1485 /// \name Geode 1486 /// Geode processors. 1487 //@{ 1488 CK_Geode 1489 //@} 1490 } CPU; 1491 1492public: 1493 X86TargetInfo(const std::string& triple) 1494 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1495 HasAES(false), HasLZCNT(false), HasBMI(false), HasBMI2(false), 1496 HasPOPCNT(false), HasFMA4(false), CPU(CK_Generic) { 1497 BigEndian = false; 1498 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1499 } 1500 virtual unsigned getFloatEvalMethod() const { 1501 // X87 evaluates with 80 bits "long double" precision. 1502 return SSELevel == NoSSE ? 2 : 0; 1503 } 1504 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1505 unsigned &NumRecords) const { 1506 Records = BuiltinInfo; 1507 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1508 } 1509 virtual void getGCCRegNames(const char * const *&Names, 1510 unsigned &NumNames) const { 1511 Names = GCCRegNames; 1512 NumNames = llvm::array_lengthof(GCCRegNames); 1513 } 1514 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1515 unsigned &NumAliases) const { 1516 Aliases = 0; 1517 NumAliases = 0; 1518 } 1519 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1520 unsigned &NumNames) const { 1521 Names = AddlRegNames; 1522 NumNames = llvm::array_lengthof(AddlRegNames); 1523 } 1524 virtual bool validateAsmConstraint(const char *&Name, 1525 TargetInfo::ConstraintInfo &info) const; 1526 virtual std::string convertConstraint(const char *&Constraint) const; 1527 virtual const char *getClobbers() const { 1528 return "~{dirflag},~{fpsr},~{flags}"; 1529 } 1530 virtual void getTargetDefines(const LangOptions &Opts, 1531 MacroBuilder &Builder) const; 1532 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1533 StringRef Name, 1534 bool Enabled) const; 1535 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1536 virtual bool hasFeature(StringRef Feature) const; 1537 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1538 virtual const char* getABI() const { 1539 if (PointerWidth == 64 && SSELevel >= AVX) 1540 return "avx"; 1541 else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow) 1542 return "no-mmx"; 1543 return ""; 1544 } 1545 virtual bool setCPU(const std::string &Name) { 1546 CPU = llvm::StringSwitch<CPUKind>(Name) 1547 .Case("i386", CK_i386) 1548 .Case("i486", CK_i486) 1549 .Case("winchip-c6", CK_WinChipC6) 1550 .Case("winchip2", CK_WinChip2) 1551 .Case("c3", CK_C3) 1552 .Case("i586", CK_i586) 1553 .Case("pentium", CK_Pentium) 1554 .Case("pentium-mmx", CK_PentiumMMX) 1555 .Case("i686", CK_i686) 1556 .Case("pentiumpro", CK_PentiumPro) 1557 .Case("pentium2", CK_Pentium2) 1558 .Case("pentium3", CK_Pentium3) 1559 .Case("pentium3m", CK_Pentium3M) 1560 .Case("pentium-m", CK_PentiumM) 1561 .Case("c3-2", CK_C3_2) 1562 .Case("yonah", CK_Yonah) 1563 .Case("pentium4", CK_Pentium4) 1564 .Case("pentium4m", CK_Pentium4M) 1565 .Case("prescott", CK_Prescott) 1566 .Case("nocona", CK_Nocona) 1567 .Case("core2", CK_Core2) 1568 .Case("penryn", CK_Penryn) 1569 .Case("atom", CK_Atom) 1570 .Case("corei7", CK_Corei7) 1571 .Case("corei7-avx", CK_Corei7AVX) 1572 .Case("core-avx-i", CK_CoreAVXi) 1573 .Case("core-avx2", CK_CoreAVX2) 1574 .Case("k6", CK_K6) 1575 .Case("k6-2", CK_K6_2) 1576 .Case("k6-3", CK_K6_3) 1577 .Case("athlon", CK_Athlon) 1578 .Case("athlon-tbird", CK_AthlonThunderbird) 1579 .Case("athlon-4", CK_Athlon4) 1580 .Case("athlon-xp", CK_AthlonXP) 1581 .Case("athlon-mp", CK_AthlonMP) 1582 .Case("athlon64", CK_Athlon64) 1583 .Case("athlon64-sse3", CK_Athlon64SSE3) 1584 .Case("athlon-fx", CK_AthlonFX) 1585 .Case("k8", CK_K8) 1586 .Case("k8-sse3", CK_K8SSE3) 1587 .Case("opteron", CK_Opteron) 1588 .Case("opteron-sse3", CK_OpteronSSE3) 1589 .Case("amdfam10", CK_AMDFAM10) 1590 .Case("btver1", CK_BTVER1) 1591 .Case("bdver1", CK_BDVER1) 1592 .Case("bdver2", CK_BDVER2) 1593 .Case("x86-64", CK_x86_64) 1594 .Case("geode", CK_Geode) 1595 .Default(CK_Generic); 1596 1597 // Perform any per-CPU checks necessary to determine if this CPU is 1598 // acceptable. 1599 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1600 // invalid without explaining *why*. 1601 switch (CPU) { 1602 case CK_Generic: 1603 // No processor selected! 1604 return false; 1605 1606 case CK_i386: 1607 case CK_i486: 1608 case CK_WinChipC6: 1609 case CK_WinChip2: 1610 case CK_C3: 1611 case CK_i586: 1612 case CK_Pentium: 1613 case CK_PentiumMMX: 1614 case CK_i686: 1615 case CK_PentiumPro: 1616 case CK_Pentium2: 1617 case CK_Pentium3: 1618 case CK_Pentium3M: 1619 case CK_PentiumM: 1620 case CK_Yonah: 1621 case CK_C3_2: 1622 case CK_Pentium4: 1623 case CK_Pentium4M: 1624 case CK_Prescott: 1625 case CK_K6: 1626 case CK_K6_2: 1627 case CK_K6_3: 1628 case CK_Athlon: 1629 case CK_AthlonThunderbird: 1630 case CK_Athlon4: 1631 case CK_AthlonXP: 1632 case CK_AthlonMP: 1633 case CK_Geode: 1634 // Only accept certain architectures when compiling in 32-bit mode. 1635 if (PointerWidth != 32) 1636 return false; 1637 1638 // Fallthrough 1639 case CK_Nocona: 1640 case CK_Core2: 1641 case CK_Penryn: 1642 case CK_Atom: 1643 case CK_Corei7: 1644 case CK_Corei7AVX: 1645 case CK_CoreAVXi: 1646 case CK_CoreAVX2: 1647 case CK_Athlon64: 1648 case CK_Athlon64SSE3: 1649 case CK_AthlonFX: 1650 case CK_K8: 1651 case CK_K8SSE3: 1652 case CK_Opteron: 1653 case CK_OpteronSSE3: 1654 case CK_AMDFAM10: 1655 case CK_BTVER1: 1656 case CK_BDVER1: 1657 case CK_BDVER2: 1658 case CK_x86_64: 1659 return true; 1660 } 1661 llvm_unreachable("Unhandled CPU kind"); 1662 } 1663}; 1664 1665void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1666 // FIXME: This should not be here. 1667 Features["3dnow"] = false; 1668 Features["3dnowa"] = false; 1669 Features["mmx"] = false; 1670 Features["sse"] = false; 1671 Features["sse2"] = false; 1672 Features["sse3"] = false; 1673 Features["ssse3"] = false; 1674 Features["sse41"] = false; 1675 Features["sse42"] = false; 1676 Features["sse4a"] = false; 1677 Features["aes"] = false; 1678 Features["avx"] = false; 1679 Features["avx2"] = false; 1680 Features["lzcnt"] = false; 1681 Features["bmi"] = false; 1682 Features["bmi2"] = false; 1683 Features["popcnt"] = false; 1684 Features["fma4"] = false; 1685 1686 // FIXME: This *really* should not be here. 1687 1688 // X86_64 always has SSE2. 1689 if (PointerWidth == 64) 1690 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1691 1692 switch (CPU) { 1693 case CK_Generic: 1694 case CK_i386: 1695 case CK_i486: 1696 case CK_i586: 1697 case CK_Pentium: 1698 case CK_i686: 1699 case CK_PentiumPro: 1700 break; 1701 case CK_PentiumMMX: 1702 case CK_Pentium2: 1703 setFeatureEnabled(Features, "mmx", true); 1704 break; 1705 case CK_Pentium3: 1706 case CK_Pentium3M: 1707 setFeatureEnabled(Features, "mmx", true); 1708 setFeatureEnabled(Features, "sse", true); 1709 break; 1710 case CK_PentiumM: 1711 case CK_Pentium4: 1712 case CK_Pentium4M: 1713 case CK_x86_64: 1714 setFeatureEnabled(Features, "mmx", true); 1715 setFeatureEnabled(Features, "sse2", true); 1716 break; 1717 case CK_Yonah: 1718 case CK_Prescott: 1719 case CK_Nocona: 1720 setFeatureEnabled(Features, "mmx", true); 1721 setFeatureEnabled(Features, "sse3", true); 1722 break; 1723 case CK_Core2: 1724 setFeatureEnabled(Features, "mmx", true); 1725 setFeatureEnabled(Features, "ssse3", true); 1726 break; 1727 case CK_Penryn: 1728 setFeatureEnabled(Features, "mmx", true); 1729 setFeatureEnabled(Features, "sse4.1", true); 1730 break; 1731 case CK_Atom: 1732 setFeatureEnabled(Features, "mmx", true); 1733 setFeatureEnabled(Features, "ssse3", true); 1734 break; 1735 case CK_Corei7: 1736 setFeatureEnabled(Features, "mmx", true); 1737 setFeatureEnabled(Features, "sse4", true); 1738 setFeatureEnabled(Features, "aes", true); 1739 break; 1740 case CK_Corei7AVX: 1741 case CK_CoreAVXi: 1742 setFeatureEnabled(Features, "mmx", true); 1743 setFeatureEnabled(Features, "avx", true); 1744 setFeatureEnabled(Features, "aes", true); 1745 break; 1746 case CK_CoreAVX2: 1747 setFeatureEnabled(Features, "mmx", true); 1748 setFeatureEnabled(Features, "avx2", true); 1749 setFeatureEnabled(Features, "aes", true); 1750 setFeatureEnabled(Features, "lzcnt", true); 1751 setFeatureEnabled(Features, "bmi", true); 1752 setFeatureEnabled(Features, "bmi2", true); 1753 break; 1754 case CK_K6: 1755 case CK_WinChipC6: 1756 setFeatureEnabled(Features, "mmx", true); 1757 break; 1758 case CK_K6_2: 1759 case CK_K6_3: 1760 case CK_WinChip2: 1761 case CK_C3: 1762 setFeatureEnabled(Features, "3dnow", true); 1763 break; 1764 case CK_Athlon: 1765 case CK_AthlonThunderbird: 1766 case CK_Geode: 1767 setFeatureEnabled(Features, "3dnowa", true); 1768 break; 1769 case CK_Athlon4: 1770 case CK_AthlonXP: 1771 case CK_AthlonMP: 1772 setFeatureEnabled(Features, "sse", true); 1773 setFeatureEnabled(Features, "3dnowa", true); 1774 break; 1775 case CK_K8: 1776 case CK_Opteron: 1777 case CK_Athlon64: 1778 case CK_AthlonFX: 1779 setFeatureEnabled(Features, "sse2", true); 1780 setFeatureEnabled(Features, "3dnowa", true); 1781 break; 1782 case CK_K8SSE3: 1783 case CK_OpteronSSE3: 1784 case CK_Athlon64SSE3: 1785 setFeatureEnabled(Features, "sse3", true); 1786 setFeatureEnabled(Features, "3dnowa", true); 1787 break; 1788 case CK_AMDFAM10: 1789 setFeatureEnabled(Features, "sse3", true); 1790 setFeatureEnabled(Features, "sse4a", true); 1791 setFeatureEnabled(Features, "3dnowa", true); 1792 break; 1793 case CK_BTVER1: 1794 setFeatureEnabled(Features, "ssse3", true); 1795 setFeatureEnabled(Features, "sse4a", true); 1796 case CK_BDVER1: 1797 case CK_BDVER2: 1798 setFeatureEnabled(Features, "avx", true); 1799 setFeatureEnabled(Features, "sse4a", true); 1800 setFeatureEnabled(Features, "aes", true); 1801 break; 1802 case CK_C3_2: 1803 setFeatureEnabled(Features, "mmx", true); 1804 setFeatureEnabled(Features, "sse", true); 1805 break; 1806 } 1807} 1808 1809bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1810 StringRef Name, 1811 bool Enabled) const { 1812 // FIXME: This *really* should not be here. We need some way of translating 1813 // options into llvm subtarget features. 1814 if (!Features.count(Name) && 1815 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1816 return false; 1817 1818 // FIXME: this should probably use a switch with fall through. 1819 1820 if (Enabled) { 1821 if (Name == "mmx") 1822 Features["mmx"] = true; 1823 else if (Name == "sse") 1824 Features["mmx"] = Features["sse"] = true; 1825 else if (Name == "sse2") 1826 Features["mmx"] = Features["sse"] = Features["sse2"] = true; 1827 else if (Name == "sse3") 1828 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1829 true; 1830 else if (Name == "ssse3") 1831 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1832 Features["ssse3"] = true; 1833 else if (Name == "sse4" || Name == "sse4.2") 1834 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1835 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1836 Features["popcnt"] = true; 1837 else if (Name == "sse4.1") 1838 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1839 Features["ssse3"] = Features["sse41"] = true; 1840 else if (Name == "3dnow") 1841 Features["mmx"] = Features["3dnow"] = true; 1842 else if (Name == "3dnowa") 1843 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1844 else if (Name == "aes") 1845 Features["aes"] = true; 1846 else if (Name == "avx") 1847 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1848 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1849 Features["popcnt"] = Features["avx"] = true; 1850 else if (Name == "avx2") 1851 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1852 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1853 Features["popcnt"] = Features["avx"] = Features["avx2"] = true; 1854 else if (Name == "fma4") 1855 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1856 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1857 Features["popcnt"] = Features["avx"] = Features["fma4"] = true; 1858 else if (Name == "sse4a") 1859 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1860 Features["lzcnt"] = Features["popcnt"] = Features["sse4a"] = true; 1861 else if (Name == "lzcnt") 1862 Features["lzcnt"] = true; 1863 else if (Name == "bmi") 1864 Features["bmi"] = true; 1865 else if (Name == "bmi2") 1866 Features["bmi2"] = true; 1867 else if (Name == "popcnt") 1868 Features["popcnt"] = true; 1869 } else { 1870 if (Name == "mmx") 1871 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1872 else if (Name == "sse") 1873 Features["sse"] = Features["sse2"] = Features["sse3"] = 1874 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1875 Features["sse4a"] = false; 1876 else if (Name == "sse2") 1877 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1878 Features["sse41"] = Features["sse42"] = Features["sse4a"] = false; 1879 else if (Name == "sse3") 1880 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1881 Features["sse42"] = Features["sse4a"] = false; 1882 else if (Name == "ssse3") 1883 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1884 else if (Name == "sse4" || Name == "sse4.1") 1885 Features["sse41"] = Features["sse42"] = false; 1886 else if (Name == "sse4.2") 1887 Features["sse42"] = false; 1888 else if (Name == "3dnow") 1889 Features["3dnow"] = Features["3dnowa"] = false; 1890 else if (Name == "3dnowa") 1891 Features["3dnowa"] = false; 1892 else if (Name == "aes") 1893 Features["aes"] = false; 1894 else if (Name == "avx") 1895 Features["avx"] = Features["avx2"] = Features["fma4"] = false; 1896 else if (Name == "avx2") 1897 Features["avx2"] = false; 1898 else if (Name == "sse4a") 1899 Features["sse4a"] = false; 1900 else if (Name == "lzcnt") 1901 Features["lzcnt"] = false; 1902 else if (Name == "bmi") 1903 Features["bmi"] = false; 1904 else if (Name == "bmi2") 1905 Features["bmi2"] = false; 1906 else if (Name == "popcnt") 1907 Features["popcnt"] = false; 1908 else if (Name == "fma4") 1909 Features["fma4"] = false; 1910 } 1911 1912 return true; 1913} 1914 1915/// HandleTargetOptions - Perform initialization based on the user 1916/// configured set of features. 1917void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1918 // Remember the maximum enabled sselevel. 1919 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1920 // Ignore disabled features. 1921 if (Features[i][0] == '-') 1922 continue; 1923 1924 StringRef Feature = StringRef(Features[i]).substr(1); 1925 1926 if (Feature == "aes") { 1927 HasAES = true; 1928 continue; 1929 } 1930 1931 if (Feature == "lzcnt") { 1932 HasLZCNT = true; 1933 continue; 1934 } 1935 1936 if (Feature == "bmi") { 1937 HasBMI = true; 1938 continue; 1939 } 1940 1941 if (Feature == "bmi2") { 1942 HasBMI2 = true; 1943 continue; 1944 } 1945 1946 if (Feature == "popcnt") { 1947 HasPOPCNT = true; 1948 continue; 1949 } 1950 1951 if (Feature == "fma4") { 1952 HasFMA4 = true; 1953 continue; 1954 } 1955 1956 assert(Features[i][0] == '+' && "Invalid target feature!"); 1957 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature) 1958 .Case("avx2", AVX2) 1959 .Case("avx", AVX) 1960 .Case("sse42", SSE42) 1961 .Case("sse41", SSE41) 1962 .Case("ssse3", SSSE3) 1963 .Case("sse3", SSE3) 1964 .Case("sse2", SSE2) 1965 .Case("sse", SSE1) 1966 .Default(NoSSE); 1967 SSELevel = std::max(SSELevel, Level); 1968 1969 MMX3DNowEnum ThreeDNowLevel = 1970 llvm::StringSwitch<MMX3DNowEnum>(Feature) 1971 .Case("3dnowa", AMD3DNowAthlon) 1972 .Case("3dnow", AMD3DNow) 1973 .Case("mmx", MMX) 1974 .Default(NoMMX3DNow); 1975 1976 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1977 } 1978 1979 // Don't tell the backend if we're turning off mmx; it will end up disabling 1980 // SSE, which we don't want. 1981 std::vector<std::string>::iterator it; 1982 it = std::find(Features.begin(), Features.end(), "-mmx"); 1983 if (it != Features.end()) 1984 Features.erase(it); 1985} 1986 1987/// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1988/// definitions for this particular subtarget. 1989void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1990 MacroBuilder &Builder) const { 1991 // Target identification. 1992 if (PointerWidth == 64) { 1993 if (getLongWidth() == 64) { 1994 Builder.defineMacro("_LP64"); 1995 Builder.defineMacro("__LP64__"); 1996 } 1997 Builder.defineMacro("__amd64__"); 1998 Builder.defineMacro("__amd64"); 1999 Builder.defineMacro("__x86_64"); 2000 Builder.defineMacro("__x86_64__"); 2001 } else { 2002 DefineStd(Builder, "i386", Opts); 2003 } 2004 2005 // Subtarget options. 2006 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 2007 // truly should be based on -mtune options. 2008 switch (CPU) { 2009 case CK_Generic: 2010 break; 2011 case CK_i386: 2012 // The rest are coming from the i386 define above. 2013 Builder.defineMacro("__tune_i386__"); 2014 break; 2015 case CK_i486: 2016 case CK_WinChipC6: 2017 case CK_WinChip2: 2018 case CK_C3: 2019 defineCPUMacros(Builder, "i486"); 2020 break; 2021 case CK_PentiumMMX: 2022 Builder.defineMacro("__pentium_mmx__"); 2023 Builder.defineMacro("__tune_pentium_mmx__"); 2024 // Fallthrough 2025 case CK_i586: 2026 case CK_Pentium: 2027 defineCPUMacros(Builder, "i586"); 2028 defineCPUMacros(Builder, "pentium"); 2029 break; 2030 case CK_Pentium3: 2031 case CK_Pentium3M: 2032 case CK_PentiumM: 2033 Builder.defineMacro("__tune_pentium3__"); 2034 // Fallthrough 2035 case CK_Pentium2: 2036 case CK_C3_2: 2037 Builder.defineMacro("__tune_pentium2__"); 2038 // Fallthrough 2039 case CK_PentiumPro: 2040 Builder.defineMacro("__tune_i686__"); 2041 Builder.defineMacro("__tune_pentiumpro__"); 2042 // Fallthrough 2043 case CK_i686: 2044 Builder.defineMacro("__i686"); 2045 Builder.defineMacro("__i686__"); 2046 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 2047 Builder.defineMacro("__pentiumpro"); 2048 Builder.defineMacro("__pentiumpro__"); 2049 break; 2050 case CK_Pentium4: 2051 case CK_Pentium4M: 2052 defineCPUMacros(Builder, "pentium4"); 2053 break; 2054 case CK_Yonah: 2055 case CK_Prescott: 2056 case CK_Nocona: 2057 defineCPUMacros(Builder, "nocona"); 2058 break; 2059 case CK_Core2: 2060 case CK_Penryn: 2061 defineCPUMacros(Builder, "core2"); 2062 break; 2063 case CK_Atom: 2064 defineCPUMacros(Builder, "atom"); 2065 break; 2066 case CK_Corei7: 2067 case CK_Corei7AVX: 2068 case CK_CoreAVXi: 2069 case CK_CoreAVX2: 2070 defineCPUMacros(Builder, "corei7"); 2071 break; 2072 case CK_K6_2: 2073 Builder.defineMacro("__k6_2__"); 2074 Builder.defineMacro("__tune_k6_2__"); 2075 // Fallthrough 2076 case CK_K6_3: 2077 if (CPU != CK_K6_2) { // In case of fallthrough 2078 // FIXME: GCC may be enabling these in cases where some other k6 2079 // architecture is specified but -m3dnow is explicitly provided. The 2080 // exact semantics need to be determined and emulated here. 2081 Builder.defineMacro("__k6_3__"); 2082 Builder.defineMacro("__tune_k6_3__"); 2083 } 2084 // Fallthrough 2085 case CK_K6: 2086 defineCPUMacros(Builder, "k6"); 2087 break; 2088 case CK_Athlon: 2089 case CK_AthlonThunderbird: 2090 case CK_Athlon4: 2091 case CK_AthlonXP: 2092 case CK_AthlonMP: 2093 defineCPUMacros(Builder, "athlon"); 2094 if (SSELevel != NoSSE) { 2095 Builder.defineMacro("__athlon_sse__"); 2096 Builder.defineMacro("__tune_athlon_sse__"); 2097 } 2098 break; 2099 case CK_K8: 2100 case CK_K8SSE3: 2101 case CK_x86_64: 2102 case CK_Opteron: 2103 case CK_OpteronSSE3: 2104 case CK_Athlon64: 2105 case CK_Athlon64SSE3: 2106 case CK_AthlonFX: 2107 defineCPUMacros(Builder, "k8"); 2108 break; 2109 case CK_AMDFAM10: 2110 defineCPUMacros(Builder, "amdfam10"); 2111 break; 2112 case CK_BTVER1: 2113 defineCPUMacros(Builder, "btver1"); 2114 break; 2115 case CK_BDVER1: 2116 defineCPUMacros(Builder, "bdver1"); 2117 break; 2118 case CK_BDVER2: 2119 defineCPUMacros(Builder, "bdver2"); 2120 break; 2121 case CK_Geode: 2122 defineCPUMacros(Builder, "geode"); 2123 break; 2124 } 2125 2126 // Target properties. 2127 Builder.defineMacro("__LITTLE_ENDIAN__"); 2128 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2129 2130 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 2131 // functions in glibc header files that use FP Stack inline asm which the 2132 // backend can't deal with (PR879). 2133 Builder.defineMacro("__NO_MATH_INLINES"); 2134 2135 if (HasAES) 2136 Builder.defineMacro("__AES__"); 2137 2138 if (HasLZCNT) 2139 Builder.defineMacro("__LZCNT__"); 2140 2141 if (HasBMI) 2142 Builder.defineMacro("__BMI__"); 2143 2144 if (HasBMI2) 2145 Builder.defineMacro("__BMI2__"); 2146 2147 if (HasPOPCNT) 2148 Builder.defineMacro("__POPCNT__"); 2149 2150 if (HasFMA4) 2151 Builder.defineMacro("__FMA4__"); 2152 2153 // Each case falls through to the previous one here. 2154 switch (SSELevel) { 2155 case AVX2: 2156 Builder.defineMacro("__AVX2__"); 2157 case AVX: 2158 Builder.defineMacro("__AVX__"); 2159 case SSE42: 2160 Builder.defineMacro("__SSE4_2__"); 2161 case SSE41: 2162 Builder.defineMacro("__SSE4_1__"); 2163 case SSSE3: 2164 Builder.defineMacro("__SSSE3__"); 2165 case SSE3: 2166 Builder.defineMacro("__SSE3__"); 2167 case SSE2: 2168 Builder.defineMacro("__SSE2__"); 2169 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 2170 case SSE1: 2171 Builder.defineMacro("__SSE__"); 2172 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 2173 case NoSSE: 2174 break; 2175 } 2176 2177 if (Opts.MicrosoftExt && PointerWidth == 32) { 2178 switch (SSELevel) { 2179 case AVX2: 2180 case AVX: 2181 case SSE42: 2182 case SSE41: 2183 case SSSE3: 2184 case SSE3: 2185 case SSE2: 2186 Builder.defineMacro("_M_IX86_FP", Twine(2)); 2187 break; 2188 case SSE1: 2189 Builder.defineMacro("_M_IX86_FP", Twine(1)); 2190 break; 2191 default: 2192 Builder.defineMacro("_M_IX86_FP", Twine(0)); 2193 } 2194 } 2195 2196 // Each case falls through to the previous one here. 2197 switch (MMX3DNowLevel) { 2198 case AMD3DNowAthlon: 2199 Builder.defineMacro("__3dNOW_A__"); 2200 case AMD3DNow: 2201 Builder.defineMacro("__3dNOW__"); 2202 case MMX: 2203 Builder.defineMacro("__MMX__"); 2204 case NoMMX3DNow: 2205 break; 2206 } 2207} 2208 2209bool X86TargetInfo::hasFeature(StringRef Feature) const { 2210 return llvm::StringSwitch<bool>(Feature) 2211 .Case("aes", HasAES) 2212 .Case("avx", SSELevel >= AVX) 2213 .Case("avx2", SSELevel >= AVX2) 2214 .Case("bmi", HasBMI) 2215 .Case("bmi2", HasBMI2) 2216 .Case("fma4", HasFMA4) 2217 .Case("lzcnt", HasLZCNT) 2218 .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow) 2219 .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon) 2220 .Case("mmx", MMX3DNowLevel >= MMX) 2221 .Case("popcnt", HasPOPCNT) 2222 .Case("sse", SSELevel >= SSE1) 2223 .Case("sse2", SSELevel >= SSE2) 2224 .Case("sse3", SSELevel >= SSE3) 2225 .Case("ssse3", SSELevel >= SSSE3) 2226 .Case("sse41", SSELevel >= SSE41) 2227 .Case("sse42", SSELevel >= SSE42) 2228 .Case("x86", true) 2229 .Case("x86_32", PointerWidth == 32) 2230 .Case("x86_64", PointerWidth == 64) 2231 .Default(false); 2232} 2233 2234bool 2235X86TargetInfo::validateAsmConstraint(const char *&Name, 2236 TargetInfo::ConstraintInfo &Info) const { 2237 switch (*Name) { 2238 default: return false; 2239 case 'Y': // first letter of a pair: 2240 switch (*(Name+1)) { 2241 default: return false; 2242 case '0': // First SSE register. 2243 case 't': // Any SSE register, when SSE2 is enabled. 2244 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 2245 case 'm': // any MMX register, when inter-unit moves enabled. 2246 break; // falls through to setAllowsRegister. 2247 } 2248 case 'a': // eax. 2249 case 'b': // ebx. 2250 case 'c': // ecx. 2251 case 'd': // edx. 2252 case 'S': // esi. 2253 case 'D': // edi. 2254 case 'A': // edx:eax. 2255 case 'f': // any x87 floating point stack register. 2256 case 't': // top of floating point stack. 2257 case 'u': // second from top of floating point stack. 2258 case 'q': // Any register accessible as [r]l: a, b, c, and d. 2259 case 'y': // Any MMX register. 2260 case 'x': // Any SSE register. 2261 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 2262 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 2263 case 'l': // "Index" registers: any general register that can be used as an 2264 // index in a base+index memory access. 2265 Info.setAllowsRegister(); 2266 return true; 2267 case 'C': // SSE floating point constant. 2268 case 'G': // x87 floating point constant. 2269 case 'e': // 32-bit signed integer constant for use with zero-extending 2270 // x86_64 instructions. 2271 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 2272 // x86_64 instructions. 2273 return true; 2274 } 2275} 2276 2277 2278std::string 2279X86TargetInfo::convertConstraint(const char *&Constraint) const { 2280 switch (*Constraint) { 2281 case 'a': return std::string("{ax}"); 2282 case 'b': return std::string("{bx}"); 2283 case 'c': return std::string("{cx}"); 2284 case 'd': return std::string("{dx}"); 2285 case 'S': return std::string("{si}"); 2286 case 'D': return std::string("{di}"); 2287 case 'p': // address 2288 return std::string("im"); 2289 case 't': // top of floating point stack. 2290 return std::string("{st}"); 2291 case 'u': // second from top of floating point stack. 2292 return std::string("{st(1)}"); // second from top of floating point stack. 2293 default: 2294 return std::string(1, *Constraint); 2295 } 2296} 2297} // end anonymous namespace 2298 2299namespace { 2300// X86-32 generic target 2301class X86_32TargetInfo : public X86TargetInfo { 2302public: 2303 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 2304 DoubleAlign = LongLongAlign = 32; 2305 LongDoubleWidth = 96; 2306 LongDoubleAlign = 32; 2307 SuitableAlign = 128; 2308 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2309 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2310 "a0:0:64-f80:32:32-n8:16:32-S128"; 2311 SizeType = UnsignedInt; 2312 PtrDiffType = SignedInt; 2313 IntPtrType = SignedInt; 2314 RegParmMax = 3; 2315 2316 // Use fpret for all types. 2317 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 2318 (1 << TargetInfo::Double) | 2319 (1 << TargetInfo::LongDouble)); 2320 2321 // x86-32 has atomics up to 8 bytes 2322 // FIXME: Check that we actually have cmpxchg8b before setting 2323 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) 2324 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 2325 } 2326 virtual const char *getVAListDeclaration() const { 2327 return "typedef char* __builtin_va_list;"; 2328 } 2329 2330 int getEHDataRegisterNumber(unsigned RegNo) const { 2331 if (RegNo == 0) return 0; 2332 if (RegNo == 1) return 2; 2333 return -1; 2334 } 2335}; 2336} // end anonymous namespace 2337 2338namespace { 2339class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> { 2340public: 2341 NetBSDI386TargetInfo(const std::string &triple) : 2342 NetBSDTargetInfo<X86_32TargetInfo>(triple) { 2343 } 2344 2345 virtual unsigned getFloatEvalMethod() const { 2346 // NetBSD defaults to "double" rounding 2347 return 1; 2348 } 2349}; 2350} // end anonymous namespace 2351 2352namespace { 2353class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2354public: 2355 OpenBSDI386TargetInfo(const std::string& triple) : 2356 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2357 SizeType = UnsignedLong; 2358 IntPtrType = SignedLong; 2359 PtrDiffType = SignedLong; 2360 } 2361}; 2362} // end anonymous namespace 2363 2364namespace { 2365class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2366public: 2367 DarwinI386TargetInfo(const std::string& triple) : 2368 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2369 LongDoubleWidth = 128; 2370 LongDoubleAlign = 128; 2371 SuitableAlign = 128; 2372 SizeType = UnsignedLong; 2373 IntPtrType = SignedLong; 2374 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2375 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2376 "a0:0:64-f80:128:128-n8:16:32-S128"; 2377 HasAlignMac68kSupport = true; 2378 } 2379 2380}; 2381} // end anonymous namespace 2382 2383namespace { 2384// x86-32 Windows target 2385class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2386public: 2387 WindowsX86_32TargetInfo(const std::string& triple) 2388 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2389 TLSSupported = false; 2390 WCharType = UnsignedShort; 2391 DoubleAlign = LongLongAlign = 64; 2392 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2393 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2394 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2395 } 2396 virtual void getTargetDefines(const LangOptions &Opts, 2397 MacroBuilder &Builder) const { 2398 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2399 } 2400}; 2401} // end anonymous namespace 2402 2403namespace { 2404 2405// x86-32 Windows Visual Studio target 2406class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2407public: 2408 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2409 : WindowsX86_32TargetInfo(triple) { 2410 LongDoubleWidth = LongDoubleAlign = 64; 2411 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2412 } 2413 virtual void getTargetDefines(const LangOptions &Opts, 2414 MacroBuilder &Builder) const { 2415 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2416 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2417 // The value of the following reflects processor type. 2418 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2419 // We lost the original triple, so we use the default. 2420 Builder.defineMacro("_M_IX86", "600"); 2421 } 2422}; 2423} // end anonymous namespace 2424 2425namespace { 2426// x86-32 MinGW target 2427class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2428public: 2429 MinGWX86_32TargetInfo(const std::string& triple) 2430 : WindowsX86_32TargetInfo(triple) { 2431 } 2432 virtual void getTargetDefines(const LangOptions &Opts, 2433 MacroBuilder &Builder) const { 2434 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2435 DefineStd(Builder, "WIN32", Opts); 2436 DefineStd(Builder, "WINNT", Opts); 2437 Builder.defineMacro("_X86_"); 2438 Builder.defineMacro("__MSVCRT__"); 2439 Builder.defineMacro("__MINGW32__"); 2440 2441 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2442 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2443 if (Opts.MicrosoftExt) 2444 // Provide "as-is" __declspec. 2445 Builder.defineMacro("__declspec", "__declspec"); 2446 else 2447 // Provide alias of __attribute__ like mingw32-gcc. 2448 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2449 } 2450}; 2451} // end anonymous namespace 2452 2453namespace { 2454// x86-32 Cygwin target 2455class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2456public: 2457 CygwinX86_32TargetInfo(const std::string& triple) 2458 : X86_32TargetInfo(triple) { 2459 TLSSupported = false; 2460 WCharType = UnsignedShort; 2461 DoubleAlign = LongLongAlign = 64; 2462 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2463 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2464 "a0:0:64-f80:32:32-n8:16:32-S32"; 2465 } 2466 virtual void getTargetDefines(const LangOptions &Opts, 2467 MacroBuilder &Builder) const { 2468 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2469 Builder.defineMacro("__CYGWIN__"); 2470 Builder.defineMacro("__CYGWIN32__"); 2471 DefineStd(Builder, "unix", Opts); 2472 if (Opts.CPlusPlus) 2473 Builder.defineMacro("_GNU_SOURCE"); 2474 } 2475}; 2476} // end anonymous namespace 2477 2478namespace { 2479// x86-32 Haiku target 2480class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2481public: 2482 HaikuX86_32TargetInfo(const std::string& triple) 2483 : X86_32TargetInfo(triple) { 2484 SizeType = UnsignedLong; 2485 IntPtrType = SignedLong; 2486 PtrDiffType = SignedLong; 2487 this->UserLabelPrefix = ""; 2488 } 2489 virtual void getTargetDefines(const LangOptions &Opts, 2490 MacroBuilder &Builder) const { 2491 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2492 Builder.defineMacro("__INTEL__"); 2493 Builder.defineMacro("__HAIKU__"); 2494 } 2495}; 2496} // end anonymous namespace 2497 2498// RTEMS Target 2499template<typename Target> 2500class RTEMSTargetInfo : public OSTargetInfo<Target> { 2501protected: 2502 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2503 MacroBuilder &Builder) const { 2504 // RTEMS defines; list based off of gcc output 2505 2506 Builder.defineMacro("__rtems__"); 2507 Builder.defineMacro("__ELF__"); 2508 } 2509public: 2510 RTEMSTargetInfo(const std::string &triple) 2511 : OSTargetInfo<Target>(triple) { 2512 this->UserLabelPrefix = ""; 2513 2514 llvm::Triple Triple(triple); 2515 switch (Triple.getArch()) { 2516 default: 2517 case llvm::Triple::x86: 2518 // this->MCountName = ".mcount"; 2519 break; 2520 case llvm::Triple::mips: 2521 case llvm::Triple::mipsel: 2522 case llvm::Triple::ppc: 2523 case llvm::Triple::ppc64: 2524 // this->MCountName = "_mcount"; 2525 break; 2526 case llvm::Triple::arm: 2527 // this->MCountName = "__mcount"; 2528 break; 2529 } 2530 2531 } 2532}; 2533 2534namespace { 2535// x86-32 RTEMS target 2536class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2537public: 2538 RTEMSX86_32TargetInfo(const std::string& triple) 2539 : X86_32TargetInfo(triple) { 2540 SizeType = UnsignedLong; 2541 IntPtrType = SignedLong; 2542 PtrDiffType = SignedLong; 2543 this->UserLabelPrefix = ""; 2544 } 2545 virtual void getTargetDefines(const LangOptions &Opts, 2546 MacroBuilder &Builder) const { 2547 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2548 Builder.defineMacro("__INTEL__"); 2549 Builder.defineMacro("__rtems__"); 2550 } 2551}; 2552} // end anonymous namespace 2553 2554namespace { 2555// x86-64 generic target 2556class X86_64TargetInfo : public X86TargetInfo { 2557public: 2558 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2559 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2560 LongDoubleWidth = 128; 2561 LongDoubleAlign = 128; 2562 LargeArrayMinWidth = 128; 2563 LargeArrayAlign = 128; 2564 SuitableAlign = 128; 2565 IntMaxType = SignedLong; 2566 UIntMaxType = UnsignedLong; 2567 Int64Type = SignedLong; 2568 RegParmMax = 6; 2569 2570 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2571 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2572 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2573 2574 // Use fpret only for long double. 2575 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2576 2577 // Use fp2ret for _Complex long double. 2578 ComplexLongDoubleUsesFP2Ret = true; 2579 2580 // x86-64 has atomics up to 16 bytes. 2581 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128 2582 // on CPUs with cmpxchg16b 2583 MaxAtomicPromoteWidth = 128; 2584 MaxAtomicInlineWidth = 64; 2585 } 2586 virtual const char *getVAListDeclaration() const { 2587 return "typedef struct __va_list_tag {" 2588 " unsigned gp_offset;" 2589 " unsigned fp_offset;" 2590 " void* overflow_arg_area;" 2591 " void* reg_save_area;" 2592 "} __va_list_tag;" 2593 "typedef __va_list_tag __builtin_va_list[1];"; 2594 } 2595 2596 int getEHDataRegisterNumber(unsigned RegNo) const { 2597 if (RegNo == 0) return 0; 2598 if (RegNo == 1) return 1; 2599 return -1; 2600 } 2601}; 2602} // end anonymous namespace 2603 2604namespace { 2605// x86-64 Windows target 2606class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2607public: 2608 WindowsX86_64TargetInfo(const std::string& triple) 2609 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2610 TLSSupported = false; 2611 WCharType = UnsignedShort; 2612 LongWidth = LongAlign = 32; 2613 DoubleAlign = LongLongAlign = 64; 2614 IntMaxType = SignedLongLong; 2615 UIntMaxType = UnsignedLongLong; 2616 Int64Type = SignedLongLong; 2617 SizeType = UnsignedLongLong; 2618 PtrDiffType = SignedLongLong; 2619 IntPtrType = SignedLongLong; 2620 this->UserLabelPrefix = ""; 2621 } 2622 virtual void getTargetDefines(const LangOptions &Opts, 2623 MacroBuilder &Builder) const { 2624 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2625 Builder.defineMacro("_WIN64"); 2626 } 2627 virtual const char *getVAListDeclaration() const { 2628 return "typedef char* __builtin_va_list;"; 2629 } 2630}; 2631} // end anonymous namespace 2632 2633namespace { 2634// x86-64 Windows Visual Studio target 2635class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2636public: 2637 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2638 : WindowsX86_64TargetInfo(triple) { 2639 LongDoubleWidth = LongDoubleAlign = 64; 2640 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2641 } 2642 virtual void getTargetDefines(const LangOptions &Opts, 2643 MacroBuilder &Builder) const { 2644 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2645 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2646 Builder.defineMacro("_M_X64"); 2647 Builder.defineMacro("_M_AMD64"); 2648 } 2649}; 2650} // end anonymous namespace 2651 2652namespace { 2653// x86-64 MinGW target 2654class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2655public: 2656 MinGWX86_64TargetInfo(const std::string& triple) 2657 : WindowsX86_64TargetInfo(triple) { 2658 } 2659 virtual void getTargetDefines(const LangOptions &Opts, 2660 MacroBuilder &Builder) const { 2661 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2662 DefineStd(Builder, "WIN64", Opts); 2663 Builder.defineMacro("__MSVCRT__"); 2664 Builder.defineMacro("__MINGW32__"); 2665 Builder.defineMacro("__MINGW64__"); 2666 2667 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2668 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2669 if (Opts.MicrosoftExt) 2670 // Provide "as-is" __declspec. 2671 Builder.defineMacro("__declspec", "__declspec"); 2672 else 2673 // Provide alias of __attribute__ like mingw32-gcc. 2674 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2675 } 2676}; 2677} // end anonymous namespace 2678 2679namespace { 2680class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2681public: 2682 DarwinX86_64TargetInfo(const std::string& triple) 2683 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2684 Int64Type = SignedLongLong; 2685 } 2686}; 2687} // end anonymous namespace 2688 2689namespace { 2690class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2691public: 2692 OpenBSDX86_64TargetInfo(const std::string& triple) 2693 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2694 IntMaxType = SignedLongLong; 2695 UIntMaxType = UnsignedLongLong; 2696 Int64Type = SignedLongLong; 2697 } 2698}; 2699} // end anonymous namespace 2700 2701namespace { 2702class ARMTargetInfo : public TargetInfo { 2703 // Possible FPU choices. 2704 enum FPUMode { 2705 NoFPU, 2706 VFP2FPU, 2707 VFP3FPU, 2708 NeonFPU 2709 }; 2710 2711 static bool FPUModeIsVFP(FPUMode Mode) { 2712 return Mode >= VFP2FPU && Mode <= NeonFPU; 2713 } 2714 2715 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2716 static const char * const GCCRegNames[]; 2717 2718 std::string ABI, CPU; 2719 2720 unsigned FPU : 3; 2721 2722 unsigned IsThumb : 1; 2723 2724 // Initialized via features. 2725 unsigned SoftFloat : 1; 2726 unsigned SoftFloatABI : 1; 2727 2728 static const Builtin::Info BuiltinInfo[]; 2729 2730public: 2731 ARMTargetInfo(const std::string &TripleStr) 2732 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2733 { 2734 BigEndian = false; 2735 SizeType = UnsignedInt; 2736 PtrDiffType = SignedInt; 2737 // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int. 2738 WCharType = UnsignedInt; 2739 2740 // {} in inline assembly are neon specifiers, not assembly variant 2741 // specifiers. 2742 NoAsmVariants = true; 2743 2744 // FIXME: Should we just treat this as a feature? 2745 IsThumb = getTriple().getArchName().startswith("thumb"); 2746 if (IsThumb) { 2747 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2748 // so set preferred for small types to 32. 2749 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2750 "i64:64:64-f32:32:32-f64:64:64-" 2751 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2752 } else { 2753 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2754 "i64:64:64-f32:32:32-f64:64:64-" 2755 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2756 } 2757 2758 // ARM targets default to using the ARM C++ ABI. 2759 CXXABI = CXXABI_ARM; 2760 2761 // ARM has atomics up to 8 bytes 2762 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e 2763 MaxAtomicPromoteWidth = 64; 2764 2765 // Do force alignment of members that follow zero length bitfields. If 2766 // the alignment of the zero-length bitfield is greater than the member 2767 // that follows it, `bar', `bar' will be aligned as the type of the 2768 // zero length bitfield. 2769 UseZeroLengthBitfieldAlignment = true; 2770 } 2771 virtual const char *getABI() const { return ABI.c_str(); } 2772 virtual bool setABI(const std::string &Name) { 2773 ABI = Name; 2774 2775 // The defaults (above) are for AAPCS, check if we need to change them. 2776 // 2777 // FIXME: We need support for -meabi... we could just mangle it into the 2778 // name. 2779 if (Name == "apcs-gnu") { 2780 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32; 2781 SizeType = UnsignedLong; 2782 2783 // Revert to using SignedInt on apcs-gnu to comply with existing behaviour. 2784 WCharType = SignedInt; 2785 2786 // Do not respect the alignment of bit-field types when laying out 2787 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2788 UseBitFieldTypeAlignment = false; 2789 2790 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2791 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2792 /// gcc. 2793 ZeroLengthBitfieldBoundary = 32; 2794 2795 if (IsThumb) { 2796 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2797 // so set preferred for small types to 32. 2798 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2799 "i64:32:64-f32:32:32-f64:32:64-" 2800 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2801 } else { 2802 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2803 "i64:32:64-f32:32:32-f64:32:64-" 2804 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2805 } 2806 2807 // FIXME: Override "preferred align" for double and long long. 2808 } else if (Name == "aapcs") { 2809 // FIXME: Enumerated types are variable width in straight AAPCS. 2810 } else if (Name == "aapcs-linux") { 2811 ; 2812 } else 2813 return false; 2814 2815 return true; 2816 } 2817 2818 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2819 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2820 Features["vfp2"] = true; 2821 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2822 Features["neon"] = true; 2823 } 2824 2825 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2826 StringRef Name, 2827 bool Enabled) const { 2828 if (Name == "soft-float" || Name == "soft-float-abi" || 2829 Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16" || 2830 Name == "neonfp") { 2831 Features[Name] = Enabled; 2832 } else 2833 return false; 2834 2835 return true; 2836 } 2837 2838 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2839 FPU = NoFPU; 2840 SoftFloat = SoftFloatABI = false; 2841 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2842 if (Features[i] == "+soft-float") 2843 SoftFloat = true; 2844 else if (Features[i] == "+soft-float-abi") 2845 SoftFloatABI = true; 2846 else if (Features[i] == "+vfp2") 2847 FPU = VFP2FPU; 2848 else if (Features[i] == "+vfp3") 2849 FPU = VFP3FPU; 2850 else if (Features[i] == "+neon") 2851 FPU = NeonFPU; 2852 } 2853 2854 // Remove front-end specific options which the backend handles differently. 2855 std::vector<std::string>::iterator it; 2856 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2857 if (it != Features.end()) 2858 Features.erase(it); 2859 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2860 if (it != Features.end()) 2861 Features.erase(it); 2862 } 2863 2864 virtual bool hasFeature(StringRef Feature) const { 2865 return llvm::StringSwitch<bool>(Feature) 2866 .Case("arm", true) 2867 .Case("softfloat", SoftFloat) 2868 .Case("thumb", IsThumb) 2869 .Case("neon", FPU == NeonFPU && !SoftFloat && 2870 StringRef(getCPUDefineSuffix(CPU)).startswith("7")) 2871 .Default(false); 2872 } 2873 static const char *getCPUDefineSuffix(StringRef Name) { 2874 return llvm::StringSwitch<const char*>(Name) 2875 .Cases("arm8", "arm810", "4") 2876 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2877 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2878 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2879 .Case("ep9312", "4T") 2880 .Cases("arm10tdmi", "arm1020t", "5T") 2881 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2882 .Case("arm926ej-s", "5TEJ") 2883 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2884 .Cases("xscale", "iwmmxt", "5TE") 2885 .Case("arm1136j-s", "6J") 2886 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2887 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2888 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2889 .Cases("cortex-a8", "cortex-a9", "7A") 2890 .Case("cortex-m3", "7M") 2891 .Case("cortex-m4", "7M") 2892 .Case("cortex-m0", "6M") 2893 .Default(0); 2894 } 2895 virtual bool setCPU(const std::string &Name) { 2896 if (!getCPUDefineSuffix(Name)) 2897 return false; 2898 2899 CPU = Name; 2900 return true; 2901 } 2902 virtual void getTargetDefines(const LangOptions &Opts, 2903 MacroBuilder &Builder) const { 2904 // Target identification. 2905 Builder.defineMacro("__arm"); 2906 Builder.defineMacro("__arm__"); 2907 2908 // Target properties. 2909 Builder.defineMacro("__ARMEL__"); 2910 Builder.defineMacro("__LITTLE_ENDIAN__"); 2911 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2912 2913 StringRef CPUArch = getCPUDefineSuffix(CPU); 2914 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2915 2916 // Subtarget options. 2917 2918 // FIXME: It's more complicated than this and we don't really support 2919 // interworking. 2920 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2921 Builder.defineMacro("__THUMB_INTERWORK__"); 2922 2923 if (ABI == "aapcs" || ABI == "aapcs-linux") 2924 Builder.defineMacro("__ARM_EABI__"); 2925 2926 if (SoftFloat) 2927 Builder.defineMacro("__SOFTFP__"); 2928 2929 if (CPU == "xscale") 2930 Builder.defineMacro("__XSCALE__"); 2931 2932 bool IsARMv7 = CPUArch.startswith("7"); 2933 if (IsThumb) { 2934 Builder.defineMacro("__THUMBEL__"); 2935 Builder.defineMacro("__thumb__"); 2936 if (CPUArch == "6T2" || IsARMv7) 2937 Builder.defineMacro("__thumb2__"); 2938 } 2939 2940 // Note, this is always on in gcc, even though it doesn't make sense. 2941 Builder.defineMacro("__APCS_32__"); 2942 2943 if (FPUModeIsVFP((FPUMode) FPU)) 2944 Builder.defineMacro("__VFP_FP__"); 2945 2946 // This only gets set when Neon instructions are actually available, unlike 2947 // the VFP define, hence the soft float and arch check. This is subtly 2948 // different from gcc, we follow the intent which was that it should be set 2949 // when Neon instructions are actually available. 2950 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2951 Builder.defineMacro("__ARM_NEON__"); 2952 } 2953 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2954 unsigned &NumRecords) const { 2955 Records = BuiltinInfo; 2956 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2957 } 2958 virtual bool isCLZForZeroUndef() const { return false; } 2959 virtual const char *getVAListDeclaration() const { 2960 return "typedef void* __builtin_va_list;"; 2961 } 2962 virtual void getGCCRegNames(const char * const *&Names, 2963 unsigned &NumNames) const; 2964 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2965 unsigned &NumAliases) const; 2966 virtual bool validateAsmConstraint(const char *&Name, 2967 TargetInfo::ConstraintInfo &Info) const { 2968 // FIXME: Check if this is complete 2969 switch (*Name) { 2970 default: 2971 case 'l': // r0-r7 2972 case 'h': // r8-r15 2973 case 'w': // VFP Floating point register single precision 2974 case 'P': // VFP Floating point register double precision 2975 Info.setAllowsRegister(); 2976 return true; 2977 case 'Q': // A memory address that is a single base register. 2978 Info.setAllowsMemory(); 2979 return true; 2980 case 'U': // a memory reference... 2981 switch (Name[1]) { 2982 case 'q': // ...ARMV4 ldrsb 2983 case 'v': // ...VFP load/store (reg+constant offset) 2984 case 'y': // ...iWMMXt load/store 2985 case 't': // address valid for load/store opaque types wider 2986 // than 128-bits 2987 case 'n': // valid address for Neon doubleword vector load/store 2988 case 'm': // valid address for Neon element and structure load/store 2989 case 's': // valid address for non-offset loads/stores of quad-word 2990 // values in four ARM registers 2991 Info.setAllowsMemory(); 2992 Name++; 2993 return true; 2994 } 2995 } 2996 return false; 2997 } 2998 virtual std::string convertConstraint(const char *&Constraint) const { 2999 std::string R; 3000 switch (*Constraint) { 3001 case 'U': // Two-character constraint; add "^" hint for later parsing. 3002 R = std::string("^") + std::string(Constraint, 2); 3003 Constraint++; 3004 break; 3005 case 'p': // 'p' should be translated to 'r' by default. 3006 R = std::string("r"); 3007 break; 3008 default: 3009 return std::string(1, *Constraint); 3010 } 3011 return R; 3012 } 3013 virtual const char *getClobbers() const { 3014 // FIXME: Is this really right? 3015 return ""; 3016 } 3017}; 3018 3019const char * const ARMTargetInfo::GCCRegNames[] = { 3020 // Integer registers 3021 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3022 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 3023 3024 // Float registers 3025 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 3026 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 3027 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 3028 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 3029 3030 // Double registers 3031 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 3032 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 3033 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 3034 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 3035 3036 // Quad registers 3037 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 3038 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 3039}; 3040 3041void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 3042 unsigned &NumNames) const { 3043 Names = GCCRegNames; 3044 NumNames = llvm::array_lengthof(GCCRegNames); 3045} 3046 3047const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 3048 { { "a1" }, "r0" }, 3049 { { "a2" }, "r1" }, 3050 { { "a3" }, "r2" }, 3051 { { "a4" }, "r3" }, 3052 { { "v1" }, "r4" }, 3053 { { "v2" }, "r5" }, 3054 { { "v3" }, "r6" }, 3055 { { "v4" }, "r7" }, 3056 { { "v5" }, "r8" }, 3057 { { "v6", "rfp" }, "r9" }, 3058 { { "sl" }, "r10" }, 3059 { { "fp" }, "r11" }, 3060 { { "ip" }, "r12" }, 3061 { { "r13" }, "sp" }, 3062 { { "r14" }, "lr" }, 3063 { { "r15" }, "pc" }, 3064 // The S, D and Q registers overlap, but aren't really aliases; we 3065 // don't want to substitute one of these for a different-sized one. 3066}; 3067 3068void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3069 unsigned &NumAliases) const { 3070 Aliases = GCCRegAliases; 3071 NumAliases = llvm::array_lengthof(GCCRegAliases); 3072} 3073 3074const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 3075#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 3076#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 3077 ALL_LANGUAGES }, 3078#include "clang/Basic/BuiltinsARM.def" 3079}; 3080} // end anonymous namespace. 3081 3082namespace { 3083class DarwinARMTargetInfo : 3084 public DarwinTargetInfo<ARMTargetInfo> { 3085protected: 3086 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 3087 MacroBuilder &Builder) const { 3088 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 3089 } 3090 3091public: 3092 DarwinARMTargetInfo(const std::string& triple) 3093 : DarwinTargetInfo<ARMTargetInfo>(triple) { 3094 HasAlignMac68kSupport = true; 3095 // iOS always has 64-bit atomic instructions. 3096 // FIXME: This should be based off of the target features in ARMTargetInfo. 3097 MaxAtomicInlineWidth = 64; 3098 } 3099}; 3100} // end anonymous namespace. 3101 3102 3103namespace { 3104// Hexagon abstract base class 3105class HexagonTargetInfo : public TargetInfo { 3106 static const Builtin::Info BuiltinInfo[]; 3107 static const char * const GCCRegNames[]; 3108 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 3109 std::string CPU; 3110public: 3111 HexagonTargetInfo(const std::string& triple) : TargetInfo(triple) { 3112 BigEndian = false; 3113 DescriptionString = ("e-p:32:32:32-" 3114 "i64:64:64-i32:32:32-i16:16:16-i1:32:32" 3115 "f64:64:64-f32:32:32-a0:0-n32"); 3116 3117 // {} in inline assembly are packet specifiers, not assembly variant 3118 // specifiers. 3119 NoAsmVariants = true; 3120 } 3121 3122 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3123 unsigned &NumRecords) const { 3124 Records = BuiltinInfo; 3125 NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin; 3126 } 3127 3128 virtual bool validateAsmConstraint(const char *&Name, 3129 TargetInfo::ConstraintInfo &Info) const { 3130 return true; 3131 } 3132 3133 virtual void getTargetDefines(const LangOptions &Opts, 3134 MacroBuilder &Builder) const; 3135 3136 virtual bool hasFeature(StringRef Feature) const { 3137 return Feature == "hexagon"; 3138 } 3139 3140 virtual const char *getVAListDeclaration() const { 3141 return "typedef char* __builtin_va_list;"; 3142 } 3143 virtual void getGCCRegNames(const char * const *&Names, 3144 unsigned &NumNames) const; 3145 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3146 unsigned &NumAliases) const; 3147 virtual const char *getClobbers() const { 3148 return ""; 3149 } 3150 3151 static const char *getHexagonCPUSuffix(StringRef Name) { 3152 return llvm::StringSwitch<const char*>(Name) 3153 .Case("hexagonv2", "2") 3154 .Case("hexagonv3", "3") 3155 .Case("hexagonv4", "4") 3156 .Case("hexagonv5", "5") 3157 .Default(0); 3158 } 3159 3160 virtual bool setCPU(const std::string &Name) { 3161 if (!getHexagonCPUSuffix(Name)) 3162 return false; 3163 3164 CPU = Name; 3165 return true; 3166 } 3167}; 3168 3169void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts, 3170 MacroBuilder &Builder) const { 3171 Builder.defineMacro("qdsp6"); 3172 Builder.defineMacro("__qdsp6", "1"); 3173 Builder.defineMacro("__qdsp6__", "1"); 3174 3175 Builder.defineMacro("hexagon"); 3176 Builder.defineMacro("__hexagon", "1"); 3177 Builder.defineMacro("__hexagon__", "1"); 3178 3179 if(CPU == "hexagonv1") { 3180 Builder.defineMacro("__HEXAGON_V1__"); 3181 Builder.defineMacro("__HEXAGON_ARCH__", "1"); 3182 if(Opts.HexagonQdsp6Compat) { 3183 Builder.defineMacro("__QDSP6_V1__"); 3184 Builder.defineMacro("__QDSP6_ARCH__", "1"); 3185 } 3186 } 3187 else if(CPU == "hexagonv2") { 3188 Builder.defineMacro("__HEXAGON_V2__"); 3189 Builder.defineMacro("__HEXAGON_ARCH__", "2"); 3190 if(Opts.HexagonQdsp6Compat) { 3191 Builder.defineMacro("__QDSP6_V2__"); 3192 Builder.defineMacro("__QDSP6_ARCH__", "2"); 3193 } 3194 } 3195 else if(CPU == "hexagonv3") { 3196 Builder.defineMacro("__HEXAGON_V3__"); 3197 Builder.defineMacro("__HEXAGON_ARCH__", "3"); 3198 if(Opts.HexagonQdsp6Compat) { 3199 Builder.defineMacro("__QDSP6_V3__"); 3200 Builder.defineMacro("__QDSP6_ARCH__", "3"); 3201 } 3202 } 3203 else if(CPU == "hexagonv4") { 3204 Builder.defineMacro("__HEXAGON_V4__"); 3205 Builder.defineMacro("__HEXAGON_ARCH__", "4"); 3206 if(Opts.HexagonQdsp6Compat) { 3207 Builder.defineMacro("__QDSP6_V4__"); 3208 Builder.defineMacro("__QDSP6_ARCH__", "4"); 3209 } 3210 } 3211 else if(CPU == "hexagonv5") { 3212 Builder.defineMacro("__HEXAGON_V5__"); 3213 Builder.defineMacro("__HEXAGON_ARCH__", "5"); 3214 if(Opts.HexagonQdsp6Compat) { 3215 Builder.defineMacro("__QDSP6_V5__"); 3216 Builder.defineMacro("__QDSP6_ARCH__", "5"); 3217 } 3218 } 3219} 3220 3221const char * const HexagonTargetInfo::GCCRegNames[] = { 3222 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3223 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3224 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3225 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 3226 "p0", "p1", "p2", "p3", 3227 "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp" 3228}; 3229 3230void HexagonTargetInfo::getGCCRegNames(const char * const *&Names, 3231 unsigned &NumNames) const { 3232 Names = GCCRegNames; 3233 NumNames = llvm::array_lengthof(GCCRegNames); 3234} 3235 3236 3237const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = { 3238 { { "sp" }, "r29" }, 3239 { { "fp" }, "r30" }, 3240 { { "lr" }, "r31" }, 3241 }; 3242 3243void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3244 unsigned &NumAliases) const { 3245 Aliases = GCCRegAliases; 3246 NumAliases = llvm::array_lengthof(GCCRegAliases); 3247} 3248 3249 3250const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = { 3251#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 3252#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 3253 ALL_LANGUAGES }, 3254#include "clang/Basic/BuiltinsHexagon.def" 3255}; 3256} 3257 3258 3259namespace { 3260class SparcV8TargetInfo : public TargetInfo { 3261 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 3262 static const char * const GCCRegNames[]; 3263 bool SoftFloat; 3264public: 3265 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 3266 // FIXME: Support Sparc quad-precision long double? 3267 BigEndian = false; 3268 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 3269 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3270 } 3271 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 3272 StringRef Name, 3273 bool Enabled) const { 3274 if (Name == "soft-float") 3275 Features[Name] = Enabled; 3276 else 3277 return false; 3278 3279 return true; 3280 } 3281 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 3282 SoftFloat = false; 3283 for (unsigned i = 0, e = Features.size(); i != e; ++i) 3284 if (Features[i] == "+soft-float") 3285 SoftFloat = true; 3286 } 3287 virtual void getTargetDefines(const LangOptions &Opts, 3288 MacroBuilder &Builder) const { 3289 DefineStd(Builder, "sparc", Opts); 3290 Builder.defineMacro("__sparcv8"); 3291 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3292 3293 if (SoftFloat) 3294 Builder.defineMacro("SOFT_FLOAT", "1"); 3295 } 3296 3297 virtual bool hasFeature(StringRef Feature) const { 3298 return llvm::StringSwitch<bool>(Feature) 3299 .Case("softfloat", SoftFloat) 3300 .Case("sparc", true) 3301 .Default(false); 3302 } 3303 3304 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3305 unsigned &NumRecords) const { 3306 // FIXME: Implement! 3307 } 3308 virtual const char *getVAListDeclaration() const { 3309 return "typedef void* __builtin_va_list;"; 3310 } 3311 virtual void getGCCRegNames(const char * const *&Names, 3312 unsigned &NumNames) const; 3313 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3314 unsigned &NumAliases) const; 3315 virtual bool validateAsmConstraint(const char *&Name, 3316 TargetInfo::ConstraintInfo &info) const { 3317 // FIXME: Implement! 3318 return false; 3319 } 3320 virtual const char *getClobbers() const { 3321 // FIXME: Implement! 3322 return ""; 3323 } 3324}; 3325 3326const char * const SparcV8TargetInfo::GCCRegNames[] = { 3327 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3328 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3329 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3330 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 3331}; 3332 3333void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 3334 unsigned &NumNames) const { 3335 Names = GCCRegNames; 3336 NumNames = llvm::array_lengthof(GCCRegNames); 3337} 3338 3339const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 3340 { { "g0" }, "r0" }, 3341 { { "g1" }, "r1" }, 3342 { { "g2" }, "r2" }, 3343 { { "g3" }, "r3" }, 3344 { { "g4" }, "r4" }, 3345 { { "g5" }, "r5" }, 3346 { { "g6" }, "r6" }, 3347 { { "g7" }, "r7" }, 3348 { { "o0" }, "r8" }, 3349 { { "o1" }, "r9" }, 3350 { { "o2" }, "r10" }, 3351 { { "o3" }, "r11" }, 3352 { { "o4" }, "r12" }, 3353 { { "o5" }, "r13" }, 3354 { { "o6", "sp" }, "r14" }, 3355 { { "o7" }, "r15" }, 3356 { { "l0" }, "r16" }, 3357 { { "l1" }, "r17" }, 3358 { { "l2" }, "r18" }, 3359 { { "l3" }, "r19" }, 3360 { { "l4" }, "r20" }, 3361 { { "l5" }, "r21" }, 3362 { { "l6" }, "r22" }, 3363 { { "l7" }, "r23" }, 3364 { { "i0" }, "r24" }, 3365 { { "i1" }, "r25" }, 3366 { { "i2" }, "r26" }, 3367 { { "i3" }, "r27" }, 3368 { { "i4" }, "r28" }, 3369 { { "i5" }, "r29" }, 3370 { { "i6", "fp" }, "r30" }, 3371 { { "i7" }, "r31" }, 3372}; 3373 3374void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3375 unsigned &NumAliases) const { 3376 Aliases = GCCRegAliases; 3377 NumAliases = llvm::array_lengthof(GCCRegAliases); 3378} 3379} // end anonymous namespace. 3380 3381namespace { 3382class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 3383public: 3384 AuroraUXSparcV8TargetInfo(const std::string& triple) : 3385 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 3386 SizeType = UnsignedInt; 3387 PtrDiffType = SignedInt; 3388 } 3389}; 3390class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 3391public: 3392 SolarisSparcV8TargetInfo(const std::string& triple) : 3393 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 3394 SizeType = UnsignedInt; 3395 PtrDiffType = SignedInt; 3396 } 3397}; 3398} // end anonymous namespace. 3399 3400namespace { 3401 class MSP430TargetInfo : public TargetInfo { 3402 static const char * const GCCRegNames[]; 3403 public: 3404 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 3405 BigEndian = false; 3406 TLSSupported = false; 3407 IntWidth = 16; IntAlign = 16; 3408 LongWidth = 32; LongLongWidth = 64; 3409 LongAlign = LongLongAlign = 16; 3410 PointerWidth = 16; PointerAlign = 16; 3411 SuitableAlign = 16; 3412 SizeType = UnsignedInt; 3413 IntMaxType = SignedLong; 3414 UIntMaxType = UnsignedLong; 3415 IntPtrType = SignedShort; 3416 PtrDiffType = SignedInt; 3417 SigAtomicType = SignedLong; 3418 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 3419 } 3420 virtual void getTargetDefines(const LangOptions &Opts, 3421 MacroBuilder &Builder) const { 3422 Builder.defineMacro("MSP430"); 3423 Builder.defineMacro("__MSP430__"); 3424 // FIXME: defines for different 'flavours' of MCU 3425 } 3426 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3427 unsigned &NumRecords) const { 3428 // FIXME: Implement. 3429 Records = 0; 3430 NumRecords = 0; 3431 } 3432 virtual bool hasFeature(StringRef Feature) const { 3433 return Feature == "msp430"; 3434 } 3435 virtual void getGCCRegNames(const char * const *&Names, 3436 unsigned &NumNames) const; 3437 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3438 unsigned &NumAliases) const { 3439 // No aliases. 3440 Aliases = 0; 3441 NumAliases = 0; 3442 } 3443 virtual bool validateAsmConstraint(const char *&Name, 3444 TargetInfo::ConstraintInfo &info) const { 3445 // No target constraints for now. 3446 return false; 3447 } 3448 virtual const char *getClobbers() const { 3449 // FIXME: Is this really right? 3450 return ""; 3451 } 3452 virtual const char *getVAListDeclaration() const { 3453 // FIXME: implement 3454 return "typedef char* __builtin_va_list;"; 3455 } 3456 }; 3457 3458 const char * const MSP430TargetInfo::GCCRegNames[] = { 3459 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3460 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 3461 }; 3462 3463 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 3464 unsigned &NumNames) const { 3465 Names = GCCRegNames; 3466 NumNames = llvm::array_lengthof(GCCRegNames); 3467 } 3468} 3469 3470namespace { 3471 3472 // LLVM and Clang cannot be used directly to output native binaries for 3473 // target, but is used to compile C code to llvm bitcode with correct 3474 // type and alignment information. 3475 // 3476 // TCE uses the llvm bitcode as input and uses it for generating customized 3477 // target processor and program binary. TCE co-design environment is 3478 // publicly available in http://tce.cs.tut.fi 3479 3480 static const unsigned TCEOpenCLAddrSpaceMap[] = { 3481 3, // opencl_global 3482 4, // opencl_local 3483 5, // opencl_constant 3484 0, // cuda_device 3485 0, // cuda_constant 3486 0 // cuda_shared 3487 }; 3488 3489 class TCETargetInfo : public TargetInfo{ 3490 public: 3491 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 3492 TLSSupported = false; 3493 IntWidth = 32; 3494 LongWidth = LongLongWidth = 32; 3495 PointerWidth = 32; 3496 IntAlign = 32; 3497 LongAlign = LongLongAlign = 32; 3498 PointerAlign = 32; 3499 SuitableAlign = 32; 3500 SizeType = UnsignedInt; 3501 IntMaxType = SignedLong; 3502 UIntMaxType = UnsignedLong; 3503 IntPtrType = SignedInt; 3504 PtrDiffType = SignedInt; 3505 FloatWidth = 32; 3506 FloatAlign = 32; 3507 DoubleWidth = 32; 3508 DoubleAlign = 32; 3509 LongDoubleWidth = 32; 3510 LongDoubleAlign = 32; 3511 FloatFormat = &llvm::APFloat::IEEEsingle; 3512 DoubleFormat = &llvm::APFloat::IEEEsingle; 3513 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3514 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3515 "i16:16:32-i32:32:32-i64:32:32-" 3516 "f32:32:32-f64:32:32-v64:32:32-" 3517 "v128:32:32-a0:0:32-n32"; 3518 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 3519 } 3520 3521 virtual void getTargetDefines(const LangOptions &Opts, 3522 MacroBuilder &Builder) const { 3523 DefineStd(Builder, "tce", Opts); 3524 Builder.defineMacro("__TCE__"); 3525 Builder.defineMacro("__TCE_V1__"); 3526 } 3527 virtual bool hasFeature(StringRef Feature) const { 3528 return Feature == "tce"; 3529 } 3530 3531 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3532 unsigned &NumRecords) const {} 3533 virtual const char *getClobbers() const { 3534 return ""; 3535 } 3536 virtual const char *getVAListDeclaration() const { 3537 return "typedef void* __builtin_va_list;"; 3538 } 3539 virtual void getGCCRegNames(const char * const *&Names, 3540 unsigned &NumNames) const {} 3541 virtual bool validateAsmConstraint(const char *&Name, 3542 TargetInfo::ConstraintInfo &info) const { 3543 return true; 3544 } 3545 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3546 unsigned &NumAliases) const {} 3547 }; 3548} 3549 3550namespace { 3551class MipsTargetInfoBase : public TargetInfo { 3552 std::string CPU; 3553 bool SoftFloat; 3554 bool SingleFloat; 3555 3556protected: 3557 std::string ABI; 3558 3559public: 3560 MipsTargetInfoBase(const std::string& triple, 3561 const std::string& ABIStr, 3562 const std::string& CPUStr) 3563 : TargetInfo(triple), 3564 CPU(CPUStr), 3565 SoftFloat(false), SingleFloat(false), 3566 ABI(ABIStr) 3567 {} 3568 3569 virtual const char *getABI() const { return ABI.c_str(); } 3570 virtual bool setABI(const std::string &Name) = 0; 3571 virtual bool setCPU(const std::string &Name) { 3572 CPU = Name; 3573 return true; 3574 } 3575 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3576 Features[ABI] = true; 3577 Features[CPU] = true; 3578 } 3579 3580 virtual void getArchDefines(const LangOptions &Opts, 3581 MacroBuilder &Builder) const { 3582 if (SoftFloat) 3583 Builder.defineMacro("__mips_soft_float", Twine(1)); 3584 else if (SingleFloat) 3585 Builder.defineMacro("__mips_single_float", Twine(1)); 3586 else if (!SoftFloat && !SingleFloat) 3587 Builder.defineMacro("__mips_hard_float", Twine(1)); 3588 else 3589 llvm_unreachable("Invalid float ABI for Mips."); 3590 3591 Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0))); 3592 Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth())); 3593 Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth())); 3594 } 3595 3596 virtual void getTargetDefines(const LangOptions &Opts, 3597 MacroBuilder &Builder) const = 0; 3598 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3599 unsigned &NumRecords) const { 3600 // FIXME: Implement! 3601 } 3602 virtual bool hasFeature(StringRef Feature) const { 3603 return Feature == "mips"; 3604 } 3605 virtual const char *getVAListDeclaration() const { 3606 return "typedef void* __builtin_va_list;"; 3607 } 3608 virtual void getGCCRegNames(const char * const *&Names, 3609 unsigned &NumNames) const { 3610 static const char * const GCCRegNames[] = { 3611 // CPU register names 3612 // Must match second column of GCCRegAliases 3613 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3614 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3615 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3616 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", 3617 // Floating point register names 3618 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3619 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3620 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3621 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3622 // Hi/lo and condition register names 3623 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3624 "$fcc5","$fcc6","$fcc7" 3625 }; 3626 Names = GCCRegNames; 3627 NumNames = llvm::array_lengthof(GCCRegNames); 3628 } 3629 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3630 unsigned &NumAliases) const = 0; 3631 virtual bool validateAsmConstraint(const char *&Name, 3632 TargetInfo::ConstraintInfo &Info) const { 3633 switch (*Name) { 3634 default: 3635 return false; 3636 3637 case 'r': // CPU registers. 3638 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3639 case 'y': // Equivalent to "r", backwards compatibility only. 3640 case 'f': // floating-point registers. 3641 case 'c': // $25 for indirect jumps 3642 case 'l': // lo register 3643 case 'x': // hilo register pair 3644 Info.setAllowsRegister(); 3645 return true; 3646 } 3647 } 3648 3649 virtual const char *getClobbers() const { 3650 // FIXME: Implement! 3651 return ""; 3652 } 3653 3654 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 3655 StringRef Name, 3656 bool Enabled) const { 3657 if (Name == "soft-float" || Name == "single-float" || 3658 Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" || 3659 Name == "mips32" || Name == "mips32r2" || 3660 Name == "mips64" || Name == "mips64r2") { 3661 Features[Name] = Enabled; 3662 return true; 3663 } 3664 return false; 3665 } 3666 3667 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 3668 SoftFloat = false; 3669 SingleFloat = false; 3670 3671 for (std::vector<std::string>::iterator it = Features.begin(), 3672 ie = Features.end(); it != ie; ++it) { 3673 if (*it == "+single-float") { 3674 SingleFloat = true; 3675 break; 3676 } 3677 3678 if (*it == "+soft-float") { 3679 SoftFloat = true; 3680 // This option is front-end specific. 3681 // Do not need to pass it to the backend. 3682 Features.erase(it); 3683 break; 3684 } 3685 } 3686 } 3687}; 3688 3689class Mips32TargetInfoBase : public MipsTargetInfoBase { 3690public: 3691 Mips32TargetInfoBase(const std::string& triple) : 3692 MipsTargetInfoBase(triple, "o32", "mips32") { 3693 SizeType = UnsignedInt; 3694 PtrDiffType = SignedInt; 3695 } 3696 virtual bool setABI(const std::string &Name) { 3697 if ((Name == "o32") || (Name == "eabi")) { 3698 ABI = Name; 3699 return true; 3700 } else 3701 return false; 3702 } 3703 virtual void getArchDefines(const LangOptions &Opts, 3704 MacroBuilder &Builder) const { 3705 MipsTargetInfoBase::getArchDefines(Opts, Builder); 3706 3707 if (ABI == "o32") { 3708 Builder.defineMacro("__mips_o32"); 3709 Builder.defineMacro("_ABIO32", "1"); 3710 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3711 } 3712 else if (ABI == "eabi") 3713 Builder.defineMacro("__mips_eabi"); 3714 else 3715 llvm_unreachable("Invalid ABI for Mips32."); 3716 } 3717 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3718 unsigned &NumAliases) const { 3719 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3720 { { "at" }, "$1" }, 3721 { { "v0" }, "$2" }, 3722 { { "v1" }, "$3" }, 3723 { { "a0" }, "$4" }, 3724 { { "a1" }, "$5" }, 3725 { { "a2" }, "$6" }, 3726 { { "a3" }, "$7" }, 3727 { { "t0" }, "$8" }, 3728 { { "t1" }, "$9" }, 3729 { { "t2" }, "$10" }, 3730 { { "t3" }, "$11" }, 3731 { { "t4" }, "$12" }, 3732 { { "t5" }, "$13" }, 3733 { { "t6" }, "$14" }, 3734 { { "t7" }, "$15" }, 3735 { { "s0" }, "$16" }, 3736 { { "s1" }, "$17" }, 3737 { { "s2" }, "$18" }, 3738 { { "s3" }, "$19" }, 3739 { { "s4" }, "$20" }, 3740 { { "s5" }, "$21" }, 3741 { { "s6" }, "$22" }, 3742 { { "s7" }, "$23" }, 3743 { { "t8" }, "$24" }, 3744 { { "t9" }, "$25" }, 3745 { { "k0" }, "$26" }, 3746 { { "k1" }, "$27" }, 3747 { { "gp" }, "$28" }, 3748 { { "sp","$sp" }, "$29" }, 3749 { { "fp","$fp" }, "$30" }, 3750 { { "ra" }, "$31" } 3751 }; 3752 Aliases = GCCRegAliases; 3753 NumAliases = llvm::array_lengthof(GCCRegAliases); 3754 } 3755}; 3756 3757class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3758public: 3759 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3760 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3761 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3762 } 3763 virtual void getTargetDefines(const LangOptions &Opts, 3764 MacroBuilder &Builder) const { 3765 DefineStd(Builder, "mips", Opts); 3766 Builder.defineMacro("_mips"); 3767 DefineStd(Builder, "MIPSEB", Opts); 3768 Builder.defineMacro("_MIPSEB"); 3769 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3770 getArchDefines(Opts, Builder); 3771 } 3772}; 3773 3774class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3775public: 3776 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3777 BigEndian = false; 3778 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3779 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3780 } 3781 virtual void getTargetDefines(const LangOptions &Opts, 3782 MacroBuilder &Builder) const { 3783 DefineStd(Builder, "mips", Opts); 3784 Builder.defineMacro("_mips"); 3785 DefineStd(Builder, "MIPSEL", Opts); 3786 Builder.defineMacro("_MIPSEL"); 3787 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3788 getArchDefines(Opts, Builder); 3789 } 3790}; 3791 3792class Mips64TargetInfoBase : public MipsTargetInfoBase { 3793 virtual void SetDescriptionString(const std::string &Name) = 0; 3794public: 3795 Mips64TargetInfoBase(const std::string& triple) : 3796 MipsTargetInfoBase(triple, "n64", "mips64") { 3797 LongWidth = LongAlign = 64; 3798 PointerWidth = PointerAlign = 64; 3799 LongDoubleWidth = LongDoubleAlign = 128; 3800 LongDoubleFormat = &llvm::APFloat::IEEEquad; 3801 SuitableAlign = 128; 3802 } 3803 virtual bool setABI(const std::string &Name) { 3804 SetDescriptionString(Name); 3805 3806 if (Name != "n32" && Name != "n64") 3807 return false; 3808 3809 ABI = Name; 3810 3811 if (Name == "n32") { 3812 LongWidth = LongAlign = 32; 3813 PointerWidth = PointerAlign = 32; 3814 } 3815 3816 return true; 3817 } 3818 virtual void getArchDefines(const LangOptions &Opts, 3819 MacroBuilder &Builder) const { 3820 MipsTargetInfoBase::getArchDefines(Opts, Builder); 3821 3822 if (ABI == "n32") { 3823 Builder.defineMacro("__mips_n32"); 3824 Builder.defineMacro("_ABIN32", "2"); 3825 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3826 } 3827 else if (ABI == "n64") { 3828 Builder.defineMacro("__mips_n64"); 3829 Builder.defineMacro("_ABI64", "3"); 3830 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3831 } 3832 else 3833 llvm_unreachable("Invalid ABI for Mips64."); 3834 } 3835 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3836 unsigned &NumAliases) const { 3837 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3838 { { "at" }, "$1" }, 3839 { { "v0" }, "$2" }, 3840 { { "v1" }, "$3" }, 3841 { { "a0" }, "$4" }, 3842 { { "a1" }, "$5" }, 3843 { { "a2" }, "$6" }, 3844 { { "a3" }, "$7" }, 3845 { { "a4" }, "$8" }, 3846 { { "a5" }, "$9" }, 3847 { { "a6" }, "$10" }, 3848 { { "a7" }, "$11" }, 3849 { { "t0" }, "$12" }, 3850 { { "t1" }, "$13" }, 3851 { { "t2" }, "$14" }, 3852 { { "t3" }, "$15" }, 3853 { { "s0" }, "$16" }, 3854 { { "s1" }, "$17" }, 3855 { { "s2" }, "$18" }, 3856 { { "s3" }, "$19" }, 3857 { { "s4" }, "$20" }, 3858 { { "s5" }, "$21" }, 3859 { { "s6" }, "$22" }, 3860 { { "s7" }, "$23" }, 3861 { { "t8" }, "$24" }, 3862 { { "t9" }, "$25" }, 3863 { { "k0" }, "$26" }, 3864 { { "k1" }, "$27" }, 3865 { { "gp" }, "$28" }, 3866 { { "sp","$sp" }, "$29" }, 3867 { { "fp","$fp" }, "$30" }, 3868 { { "ra" }, "$31" } 3869 }; 3870 Aliases = GCCRegAliases; 3871 NumAliases = llvm::array_lengthof(GCCRegAliases); 3872 } 3873}; 3874 3875class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3876 virtual void SetDescriptionString(const std::string &Name) { 3877 // Change DescriptionString only if ABI is n32. 3878 if (Name == "n32") 3879 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3880 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3881 "v64:64:64-n32"; 3882 } 3883public: 3884 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3885 // Default ABI is n64. 3886 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3887 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3888 "v64:64:64-n32"; 3889 } 3890 virtual void getTargetDefines(const LangOptions &Opts, 3891 MacroBuilder &Builder) const { 3892 DefineStd(Builder, "mips", Opts); 3893 Builder.defineMacro("_mips"); 3894 DefineStd(Builder, "MIPSEB", Opts); 3895 Builder.defineMacro("_MIPSEB"); 3896 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3897 getArchDefines(Opts, Builder); 3898 } 3899}; 3900 3901class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3902 virtual void SetDescriptionString(const std::string &Name) { 3903 // Change DescriptionString only if ABI is n32. 3904 if (Name == "n32") 3905 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3906 "i64:64:64-f32:32:32-f64:64:64-f128:128:128" 3907 "-v64:64:64-n32"; 3908 } 3909public: 3910 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3911 // Default ABI is n64. 3912 BigEndian = false; 3913 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3914 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3915 "v64:64:64-n32"; 3916 } 3917 virtual void getTargetDefines(const LangOptions &Opts, 3918 MacroBuilder &Builder) const { 3919 DefineStd(Builder, "mips", Opts); 3920 Builder.defineMacro("_mips"); 3921 DefineStd(Builder, "MIPSEL", Opts); 3922 Builder.defineMacro("_MIPSEL"); 3923 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3924 getArchDefines(Opts, Builder); 3925 } 3926}; 3927} // end anonymous namespace. 3928 3929namespace { 3930class PNaClTargetInfo : public TargetInfo { 3931public: 3932 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3933 BigEndian = false; 3934 this->UserLabelPrefix = ""; 3935 this->LongAlign = 32; 3936 this->LongWidth = 32; 3937 this->PointerAlign = 32; 3938 this->PointerWidth = 32; 3939 this->IntMaxType = TargetInfo::SignedLongLong; 3940 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3941 this->Int64Type = TargetInfo::SignedLongLong; 3942 this->DoubleAlign = 64; 3943 this->LongDoubleWidth = 64; 3944 this->LongDoubleAlign = 64; 3945 this->SizeType = TargetInfo::UnsignedInt; 3946 this->PtrDiffType = TargetInfo::SignedInt; 3947 this->IntPtrType = TargetInfo::SignedInt; 3948 this->RegParmMax = 2; 3949 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3950 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3951 } 3952 3953 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3954 } 3955 virtual void getArchDefines(const LangOptions &Opts, 3956 MacroBuilder &Builder) const { 3957 Builder.defineMacro("__le32__"); 3958 Builder.defineMacro("__pnacl__"); 3959 } 3960 virtual void getTargetDefines(const LangOptions &Opts, 3961 MacroBuilder &Builder) const { 3962 DefineStd(Builder, "unix", Opts); 3963 Builder.defineMacro("__ELF__"); 3964 if (Opts.POSIXThreads) 3965 Builder.defineMacro("_REENTRANT"); 3966 if (Opts.CPlusPlus) 3967 Builder.defineMacro("_GNU_SOURCE"); 3968 3969 Builder.defineMacro("__LITTLE_ENDIAN__"); 3970 Builder.defineMacro("__native_client__"); 3971 getArchDefines(Opts, Builder); 3972 } 3973 virtual bool hasFeature(StringRef Feature) const { 3974 return Feature == "pnacl"; 3975 } 3976 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3977 unsigned &NumRecords) const { 3978 } 3979 virtual const char *getVAListDeclaration() const { 3980 return "typedef int __builtin_va_list[4];"; 3981 } 3982 virtual void getGCCRegNames(const char * const *&Names, 3983 unsigned &NumNames) const; 3984 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3985 unsigned &NumAliases) const; 3986 virtual bool validateAsmConstraint(const char *&Name, 3987 TargetInfo::ConstraintInfo &Info) const { 3988 return false; 3989 } 3990 3991 virtual const char *getClobbers() const { 3992 return ""; 3993 } 3994}; 3995 3996void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 3997 unsigned &NumNames) const { 3998 Names = NULL; 3999 NumNames = 0; 4000} 4001 4002void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 4003 unsigned &NumAliases) const { 4004 Aliases = NULL; 4005 NumAliases = 0; 4006} 4007} // end anonymous namespace. 4008 4009 4010//===----------------------------------------------------------------------===// 4011// Driver code 4012//===----------------------------------------------------------------------===// 4013 4014static TargetInfo *AllocateTarget(const std::string &T) { 4015 llvm::Triple Triple(T); 4016 llvm::Triple::OSType os = Triple.getOS(); 4017 4018 switch (Triple.getArch()) { 4019 default: 4020 return NULL; 4021 4022 case llvm::Triple::hexagon: 4023 return new HexagonTargetInfo(T); 4024 4025 case llvm::Triple::arm: 4026 case llvm::Triple::thumb: 4027 if (Triple.isOSDarwin()) 4028 return new DarwinARMTargetInfo(T); 4029 4030 switch (os) { 4031 case llvm::Triple::Linux: 4032 return new LinuxTargetInfo<ARMTargetInfo>(T); 4033 case llvm::Triple::FreeBSD: 4034 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 4035 case llvm::Triple::NetBSD: 4036 return new NetBSDTargetInfo<ARMTargetInfo>(T); 4037 case llvm::Triple::RTEMS: 4038 return new RTEMSTargetInfo<ARMTargetInfo>(T); 4039 default: 4040 return new ARMTargetInfo(T); 4041 } 4042 4043 case llvm::Triple::msp430: 4044 return new MSP430TargetInfo(T); 4045 4046 case llvm::Triple::mips: 4047 switch (os) { 4048 case llvm::Triple::Linux: 4049 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 4050 case llvm::Triple::RTEMS: 4051 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 4052 case llvm::Triple::FreeBSD: 4053 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 4054 case llvm::Triple::NetBSD: 4055 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 4056 default: 4057 return new Mips32EBTargetInfo(T); 4058 } 4059 4060 case llvm::Triple::mipsel: 4061 switch (os) { 4062 case llvm::Triple::Linux: 4063 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 4064 case llvm::Triple::RTEMS: 4065 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 4066 case llvm::Triple::FreeBSD: 4067 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 4068 case llvm::Triple::NetBSD: 4069 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 4070 default: 4071 return new Mips32ELTargetInfo(T); 4072 } 4073 4074 case llvm::Triple::mips64: 4075 switch (os) { 4076 case llvm::Triple::Linux: 4077 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 4078 case llvm::Triple::RTEMS: 4079 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 4080 case llvm::Triple::FreeBSD: 4081 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 4082 case llvm::Triple::NetBSD: 4083 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 4084 default: 4085 return new Mips64EBTargetInfo(T); 4086 } 4087 4088 case llvm::Triple::mips64el: 4089 switch (os) { 4090 case llvm::Triple::Linux: 4091 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 4092 case llvm::Triple::RTEMS: 4093 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 4094 case llvm::Triple::FreeBSD: 4095 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 4096 case llvm::Triple::NetBSD: 4097 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 4098 default: 4099 return new Mips64ELTargetInfo(T); 4100 } 4101 4102 case llvm::Triple::le32: 4103 switch (os) { 4104 case llvm::Triple::NativeClient: 4105 return new PNaClTargetInfo(T); 4106 default: 4107 return NULL; 4108 } 4109 4110 case llvm::Triple::ppc: 4111 if (Triple.isOSDarwin()) 4112 return new DarwinPPC32TargetInfo(T); 4113 switch (os) { 4114 case llvm::Triple::Linux: 4115 return new LinuxTargetInfo<PPC32TargetInfo>(T); 4116 case llvm::Triple::FreeBSD: 4117 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 4118 case llvm::Triple::NetBSD: 4119 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 4120 case llvm::Triple::RTEMS: 4121 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 4122 default: 4123 return new PPC32TargetInfo(T); 4124 } 4125 4126 case llvm::Triple::ppc64: 4127 if (Triple.isOSDarwin()) 4128 return new DarwinPPC64TargetInfo(T); 4129 switch (os) { 4130 case llvm::Triple::Linux: 4131 return new LinuxTargetInfo<PPC64TargetInfo>(T); 4132 case llvm::Triple::Lv2: 4133 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 4134 case llvm::Triple::FreeBSD: 4135 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 4136 case llvm::Triple::NetBSD: 4137 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 4138 default: 4139 return new PPC64TargetInfo(T); 4140 } 4141 4142 case llvm::Triple::ptx32: 4143 return new PTX32TargetInfo(T); 4144 case llvm::Triple::ptx64: 4145 return new PTX64TargetInfo(T); 4146 4147 case llvm::Triple::nvptx: 4148 return new NVPTX32TargetInfo(T); 4149 case llvm::Triple::nvptx64: 4150 return new NVPTX64TargetInfo(T); 4151 4152 case llvm::Triple::mblaze: 4153 return new MBlazeTargetInfo(T); 4154 4155 case llvm::Triple::sparc: 4156 switch (os) { 4157 case llvm::Triple::Linux: 4158 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 4159 case llvm::Triple::AuroraUX: 4160 return new AuroraUXSparcV8TargetInfo(T); 4161 case llvm::Triple::Solaris: 4162 return new SolarisSparcV8TargetInfo(T); 4163 case llvm::Triple::NetBSD: 4164 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 4165 case llvm::Triple::RTEMS: 4166 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 4167 default: 4168 return new SparcV8TargetInfo(T); 4169 } 4170 4171 // FIXME: Need a real SPU target. 4172 case llvm::Triple::cellspu: 4173 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 4174 4175 case llvm::Triple::tce: 4176 return new TCETargetInfo(T); 4177 4178 case llvm::Triple::x86: 4179 if (Triple.isOSDarwin()) 4180 return new DarwinI386TargetInfo(T); 4181 4182 switch (os) { 4183 case llvm::Triple::AuroraUX: 4184 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 4185 case llvm::Triple::Linux: 4186 return new LinuxTargetInfo<X86_32TargetInfo>(T); 4187 case llvm::Triple::DragonFly: 4188 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 4189 case llvm::Triple::NetBSD: 4190 return new NetBSDI386TargetInfo(T); 4191 case llvm::Triple::OpenBSD: 4192 return new OpenBSDI386TargetInfo(T); 4193 case llvm::Triple::FreeBSD: 4194 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 4195 case llvm::Triple::Minix: 4196 return new MinixTargetInfo<X86_32TargetInfo>(T); 4197 case llvm::Triple::Solaris: 4198 return new SolarisTargetInfo<X86_32TargetInfo>(T); 4199 case llvm::Triple::Cygwin: 4200 return new CygwinX86_32TargetInfo(T); 4201 case llvm::Triple::MinGW32: 4202 return new MinGWX86_32TargetInfo(T); 4203 case llvm::Triple::Win32: 4204 return new VisualStudioWindowsX86_32TargetInfo(T); 4205 case llvm::Triple::Haiku: 4206 return new HaikuX86_32TargetInfo(T); 4207 case llvm::Triple::RTEMS: 4208 return new RTEMSX86_32TargetInfo(T); 4209 default: 4210 return new X86_32TargetInfo(T); 4211 } 4212 4213 case llvm::Triple::x86_64: 4214 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 4215 return new DarwinX86_64TargetInfo(T); 4216 4217 switch (os) { 4218 case llvm::Triple::AuroraUX: 4219 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 4220 case llvm::Triple::Linux: 4221 return new LinuxTargetInfo<X86_64TargetInfo>(T); 4222 case llvm::Triple::DragonFly: 4223 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 4224 case llvm::Triple::NetBSD: 4225 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 4226 case llvm::Triple::OpenBSD: 4227 return new OpenBSDX86_64TargetInfo(T); 4228 case llvm::Triple::FreeBSD: 4229 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 4230 case llvm::Triple::Solaris: 4231 return new SolarisTargetInfo<X86_64TargetInfo>(T); 4232 case llvm::Triple::MinGW32: 4233 return new MinGWX86_64TargetInfo(T); 4234 case llvm::Triple::Win32: // This is what Triple.h supports now. 4235 return new VisualStudioWindowsX86_64TargetInfo(T); 4236 default: 4237 return new X86_64TargetInfo(T); 4238 } 4239 } 4240} 4241 4242/// CreateTargetInfo - Return the target info object for the specified target 4243/// triple. 4244TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 4245 TargetOptions &Opts) { 4246 llvm::Triple Triple(Opts.Triple); 4247 4248 // Construct the target 4249 OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 4250 if (!Target) { 4251 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 4252 return 0; 4253 } 4254 4255 // Set the target CPU if specified. 4256 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 4257 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 4258 return 0; 4259 } 4260 4261 // Set the target ABI if specified. 4262 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 4263 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 4264 return 0; 4265 } 4266 4267 // Set the target C++ ABI. 4268 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 4269 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 4270 return 0; 4271 } 4272 4273 // Compute the default target features, we need the target to handle this 4274 // because features may have dependencies on one another. 4275 llvm::StringMap<bool> Features; 4276 Target->getDefaultFeatures(Features); 4277 4278 // Apply the user specified deltas. 4279 // First the enables. 4280 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 4281 ie = Opts.Features.end(); it != ie; ++it) { 4282 const char *Name = it->c_str(); 4283 4284 if (Name[0] != '+') 4285 continue; 4286 4287 // Apply the feature via the target. 4288 if (!Target->setFeatureEnabled(Features, Name + 1, true)) { 4289 Diags.Report(diag::err_target_invalid_feature) << Name; 4290 return 0; 4291 } 4292 } 4293 4294 // Then the disables. 4295 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 4296 ie = Opts.Features.end(); it != ie; ++it) { 4297 const char *Name = it->c_str(); 4298 4299 if (Name[0] == '+') 4300 continue; 4301 4302 // Apply the feature via the target. 4303 if (Name[0] != '-' || 4304 !Target->setFeatureEnabled(Features, Name + 1, false)) { 4305 Diags.Report(diag::err_target_invalid_feature) << Name; 4306 return 0; 4307 } 4308 } 4309 4310 // Add the features to the compile options. 4311 // 4312 // FIXME: If we are completely confident that we have the right set, we only 4313 // need to pass the minuses. 4314 Opts.Features.clear(); 4315 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 4316 ie = Features.end(); it != ie; ++it) 4317 Opts.Features.push_back((it->second ? "+" : "-") + it->first().str()); 4318 Target->HandleTargetFeatures(Opts.Features); 4319 4320 return Target.take(); 4321} 4322