AllocationOrder.cpp revision 14d1dd95c7c969e07defebb6fe65df2fae1b30cf 
1//===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements an allocation order for virtual registers.
11//
12// The preferred allocation order for a virtual register depends on allocation
13// hints and target hooks. The AllocationOrder class encapsulates all of that.
14//
15//===----------------------------------------------------------------------===//
16
17#include "AllocationOrder.h"
18#include "VirtRegMap.h"
19#include "llvm/CodeGen/MachineRegisterInfo.h"
20#include "llvm/CodeGen/RegisterClassInfo.h"
21
22using namespace llvm;
23
24// Compare VirtRegMap::getRegAllocPref().
25AllocationOrder::AllocationOrder(unsigned VirtReg,
26                                 const VirtRegMap &VRM,
27                                 const RegisterClassInfo &RegClassInfo)
28  : Begin(0), End(0), Pos(0), RCI(RegClassInfo), OwnedBegin(false) {
29  const TargetRegisterClass *RC = VRM.getRegInfo().getRegClass(VirtReg);
30  std::pair<unsigned, unsigned> HintPair =
31    VRM.getRegInfo().getRegAllocationHint(VirtReg);
32  const MachineRegisterInfo &MRI = VRM.getRegInfo();
33
34  // HintPair.second is a register, phys or virt.
35  Hint = HintPair.second;
36
37  // Translate to physreg, or 0 if not assigned yet.
38  if (TargetRegisterInfo::isVirtualRegister(Hint))
39    Hint = VRM.getPhys(Hint);
40
41  // The first hint pair component indicates a target-specific hint.
42  if (HintPair.first) {
43    const TargetRegisterInfo &TRI = VRM.getTargetRegInfo();
44    // The remaining allocation order may depend on the hint.
45    ArrayRef<uint16_t> Order =
46      TRI.getRawAllocationOrder(RC, HintPair.first, Hint,
47                                VRM.getMachineFunction());
48    if (Order.empty())
49      return;
50
51    // Copy the allocation order with reserved registers removed.
52    OwnedBegin = true;
53    unsigned *P = new unsigned[Order.size()];
54    Begin = P;
55    for (unsigned i = 0; i != Order.size(); ++i)
56      if (!MRI.isReserved(Order[i]))
57        *P++ = Order[i];
58    End = P;
59
60    // Target-dependent hints require resolution.
61    Hint = TRI.ResolveRegAllocHint(HintPair.first, Hint,
62                                   VRM.getMachineFunction());
63  } else {
64    // If there is no hint or just a normal hint, use the cached allocation
65    // order from RegisterClassInfo.
66    ArrayRef<unsigned> O = RCI.getOrder(RC);
67    Begin = O.begin();
68    End = O.end();
69  }
70
71  // The hint must be a valid physreg for allocation.
72  if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) ||
73               !RC->contains(Hint) || MRI.isReserved(Hint)))
74    Hint = 0;
75}
76
77AllocationOrder::~AllocationOrder() {
78  if (OwnedBegin)
79    delete [] Begin;
80}
81