AllocationOrder.cpp revision a1514e24cc24b050f53a12650e047799358833a1 
1//===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements an allocation order for virtual registers.
11//
12// The preferred allocation order for a virtual register depends on allocation
13// hints and target hooks. The AllocationOrder class encapsulates all of that.
14//
15//===----------------------------------------------------------------------===//
16
17#define DEBUG_TYPE "regalloc"
18#include "AllocationOrder.h"
19#include "llvm/CodeGen/MachineFunction.h"
20#include "llvm/CodeGen/MachineRegisterInfo.h"
21#include "llvm/CodeGen/RegisterClassInfo.h"
22#include "llvm/CodeGen/VirtRegMap.h"
23#include "llvm/Support/Debug.h"
24#include "llvm/Support/raw_ostream.h"
25#include "llvm/Target/TargetMachine.h"
26
27using namespace llvm;
28
29// Compare VirtRegMap::getRegAllocPref().
30AllocationOrder::AllocationOrder(unsigned VirtReg,
31                                 const VirtRegMap &VRM,
32                                 const RegisterClassInfo &RegClassInfo)
33  : Pos(0) {
34  const MachineFunction &MF = VRM.getMachineFunction();
35  const TargetRegisterInfo *TRI = &VRM.getTargetRegInfo();
36  Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg));
37  TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM);
38
39  DEBUG({
40    if (!Hints.empty()) {
41      dbgs() << "hints:";
42      for (unsigned I = 0, E = Hints.size(); I != E; ++I)
43        dbgs() << ' ' << PrintReg(Hints[I], TRI);
44      dbgs() << '\n';
45    }
46  });
47}
48
49bool AllocationOrder::isHint(unsigned PhysReg) const {
50  return std::find(Hints.begin(), Hints.end(), PhysReg) != Hints.end();
51}
52
53unsigned AllocationOrder::next() {
54  if (Pos < Hints.size())
55    return Hints[Pos++];
56  ArrayRef<MCPhysReg>::iterator I = Order.begin() + (Pos - Hints.size());
57  ArrayRef<MCPhysReg>::iterator E = Order.end();
58  while (I != E) {
59    unsigned Reg = *I++;
60    ++Pos;
61    if (!isHint(Reg))
62      return Reg;
63  }
64  return 0;
65}
66