LLVMTargetMachine.cpp revision 93f96d00bf10299246ea726956ce84dcb4b9a59e 
1//===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the LLVMTargetMachine class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/Target/TargetMachine.h"
15#include "llvm/PassManager.h"
16#include "llvm/Pass.h"
17#include "llvm/Assembly/PrintModulePass.h"
18#include "llvm/Analysis/LoopPass.h"
19#include "llvm/CodeGen/Passes.h"
20#include "llvm/CodeGen/Collector.h"
21#include "llvm/Target/TargetOptions.h"
22#include "llvm/Transforms/Scalar.h"
23#include "llvm/Support/CommandLine.h"
24using namespace llvm;
25
26static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
27    cl::desc("Print LLVM IR produced by the loop-reduce pass"));
28static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
29    cl::desc("Print LLVM IR input to isel pass"));
30static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
31    cl::desc("Dump emitter generated instructions as assembly"));
32static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
33    cl::desc("Dump garbage collector data"));
34
35// Hidden options to help debugging
36static cl::opt<bool>
37EnableSinking("enable-sinking", cl::init(false), cl::Hidden,
38              cl::desc("Perform sinking on machine code"));
39static cl::opt<bool>
40PerformLICM("machine-licm",
41            cl::init(false), cl::Hidden,
42            cl::desc("Perform loop-invariant code motion on machine code"));
43
44FileModel::Model
45LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
46                                       std::ostream &Out,
47                                       CodeGenFileType FileType,
48                                       bool Fast) {
49  // Standard LLVM-Level Passes.
50
51  // Run loop strength reduction before anything else.
52  if (!Fast) {
53    PM.add(createLoopStrengthReducePass(getTargetLowering()));
54    if (PrintLSR)
55      PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
56  }
57
58  PM.add(createGCLoweringPass());
59
60  if (!ExceptionHandling)
61    PM.add(createLowerInvokePass(getTargetLowering()));
62
63  // Make sure that no unreachable blocks are instruction selected.
64  PM.add(createUnreachableBlockEliminationPass());
65
66  if (!Fast)
67    PM.add(createCodeGenPreparePass(getTargetLowering()));
68
69  if (PrintISelInput)
70    PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
71                                 &cerr));
72
73  // Ask the target for an isel.
74  if (addInstSelector(PM, Fast))
75    return FileModel::Error;
76
77  // Print the instruction selected machine code...
78  if (PrintMachineCode)
79    PM.add(createMachineFunctionPrinterPass(cerr));
80
81  if (PerformLICM)
82    PM.add(createMachineLICMPass());
83
84  if (EnableSinking)
85    PM.add(createMachineSinkingPass());
86
87  // Perform register allocation to convert to a concrete x86 representation
88  PM.add(createRegisterAllocator());
89
90  if (PrintMachineCode)
91    PM.add(createMachineFunctionPrinterPass(cerr));
92
93  PM.add(createLowerSubregsPass());
94
95  if (PrintMachineCode)  // Print the subreg lowered code
96    PM.add(createMachineFunctionPrinterPass(cerr));
97
98  // Run post-ra passes.
99  if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
100    PM.add(createMachineFunctionPrinterPass(cerr));
101
102  // Insert prolog/epilog code.  Eliminate abstract frame index references...
103  PM.add(createPrologEpilogCodeInserter());
104
105  // Second pass scheduler.
106  if (!Fast)
107    PM.add(createPostRAScheduler());
108
109  // Branch folding must be run after regalloc and prolog/epilog insertion.
110  if (!Fast)
111    PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
112
113  PM.add(createGCMachineCodeAnalysisPass());
114  if (PrintMachineCode)
115    PM.add(createMachineFunctionPrinterPass(cerr));
116
117  if (PrintGCInfo)
118    PM.add(createCollectorMetadataPrinter(*cerr));
119
120  // Fold redundant debug labels.
121  PM.add(createDebugLabelFoldingPass());
122
123  if (PrintMachineCode)  // Print the register-allocated code
124    PM.add(createMachineFunctionPrinterPass(cerr));
125
126  if (addPreEmitPass(PM, Fast) && PrintMachineCode)
127    PM.add(createMachineFunctionPrinterPass(cerr));
128
129  switch (FileType) {
130  default:
131    break;
132  case TargetMachine::AssemblyFile:
133    if (addAssemblyEmitter(PM, Fast, Out))
134      return FileModel::Error;
135    return FileModel::AsmFile;
136  case TargetMachine::ObjectFile:
137    if (getMachOWriterInfo())
138      return FileModel::MachOFile;
139    else if (getELFWriterInfo())
140      return FileModel::ElfFile;
141  }
142
143  return FileModel::Error;
144}
145
146/// addPassesToEmitFileFinish - If the passes to emit the specified file had to
147/// be split up (e.g., to add an object writer pass), this method can be used to
148/// finish up adding passes to emit the file, if necessary.
149bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM,
150                                                  MachineCodeEmitter *MCE,
151                                                  bool Fast) {
152  if (MCE)
153    addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE);
154
155  PM.add(createCollectorMetadataDeleter());
156
157  // Delete machine code for this function
158  PM.add(createMachineCodeDeleter());
159
160  return false; // success!
161}
162
163/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
164/// get machine code emitted.  This uses a MachineCodeEmitter object to handle
165/// actually outputting the machine code and resolving things like the address
166/// of functions.  This method should returns true if machine code emission is
167/// not supported.
168///
169bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
170                                                   MachineCodeEmitter &MCE,
171                                                   bool Fast) {
172  // Standard LLVM-Level Passes.
173
174  // Run loop strength reduction before anything else.
175  if (!Fast) {
176    PM.add(createLoopStrengthReducePass(getTargetLowering()));
177    if (PrintLSR)
178      PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
179  }
180
181  PM.add(createGCLoweringPass());
182
183  // FIXME: Implement the invoke/unwind instructions!
184  PM.add(createLowerInvokePass(getTargetLowering()));
185
186  // Make sure that no unreachable blocks are instruction selected.
187  PM.add(createUnreachableBlockEliminationPass());
188
189  if (!Fast)
190    PM.add(createCodeGenPreparePass(getTargetLowering()));
191
192  if (PrintISelInput)
193    PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
194                                 &cerr));
195
196  // Ask the target for an isel.
197  if (addInstSelector(PM, Fast))
198    return true;
199
200  // Print the instruction selected machine code...
201  if (PrintMachineCode)
202    PM.add(createMachineFunctionPrinterPass(cerr));
203
204  if (PerformLICM)
205    PM.add(createMachineLICMPass());
206
207  if (EnableSinking)
208    PM.add(createMachineSinkingPass());
209
210  // Perform register allocation to convert to a concrete x86 representation
211  PM.add(createRegisterAllocator());
212
213  if (PrintMachineCode)
214    PM.add(createMachineFunctionPrinterPass(cerr));
215
216  PM.add(createLowerSubregsPass());
217
218  if (PrintMachineCode)  // Print the subreg lowered code
219    PM.add(createMachineFunctionPrinterPass(cerr));
220
221  // Run post-ra passes.
222  if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
223    PM.add(createMachineFunctionPrinterPass(cerr));
224
225  // Insert prolog/epilog code.  Eliminate abstract frame index references...
226  PM.add(createPrologEpilogCodeInserter());
227
228  if (PrintMachineCode)  // Print the register-allocated code
229    PM.add(createMachineFunctionPrinterPass(cerr));
230
231  // Second pass scheduler.
232  if (!Fast)
233    PM.add(createPostRAScheduler());
234
235  // Branch folding must be run after regalloc and prolog/epilog insertion.
236  if (!Fast)
237    PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
238
239  PM.add(createGCMachineCodeAnalysisPass());
240  if (PrintMachineCode)
241    PM.add(createMachineFunctionPrinterPass(cerr));
242
243  if (PrintGCInfo)
244    PM.add(createCollectorMetadataPrinter(*cerr));
245
246  if (addPreEmitPass(PM, Fast) && PrintMachineCode)
247    PM.add(createMachineFunctionPrinterPass(cerr));
248
249  addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
250
251  PM.add(createCollectorMetadataDeleter());
252
253  // Delete machine code for this function
254  PM.add(createMachineCodeDeleter());
255
256  return false; // success!
257}
258