MipsInstPrinter.cpp revision 70629abe31ec9737766f47611e72b422f6d7d129 
1//===-- MipsInstPrinter.cpp - Convert Mips MCInst to assembly syntax --------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This class prints an Mips MCInst to a .s file.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "asm-printer"
15#include "MipsInstPrinter.h"
16#include "llvm/MC/MCExpr.h"
17#include "llvm/MC/MCInst.h"
18#include "llvm/Support/ErrorHandling.h"
19#include "llvm/Support/raw_ostream.h"
20#include "llvm/ADT/StringExtras.h"
21using namespace llvm;
22
23#define GET_INSTRUCTION_NAME
24#include "MipsGenAsmWriter.inc"
25
26const char* Mips::MipsFCCToString(Mips::CondCode CC) {
27  switch (CC) {
28  case FCOND_F:
29  case FCOND_T:   return "f";
30  case FCOND_UN:
31  case FCOND_OR:  return "un";
32  case FCOND_OEQ:
33  case FCOND_UNE: return "eq";
34  case FCOND_UEQ:
35  case FCOND_ONE: return "ueq";
36  case FCOND_OLT:
37  case FCOND_UGE: return "olt";
38  case FCOND_ULT:
39  case FCOND_OGE: return "ult";
40  case FCOND_OLE:
41  case FCOND_UGT: return "ole";
42  case FCOND_ULE:
43  case FCOND_OGT: return "ule";
44  case FCOND_SF:
45  case FCOND_ST:  return "sf";
46  case FCOND_NGLE:
47  case FCOND_GLE: return "ngle";
48  case FCOND_SEQ:
49  case FCOND_SNE: return "seq";
50  case FCOND_NGL:
51  case FCOND_GL:  return "ngl";
52  case FCOND_LT:
53  case FCOND_NLT: return "lt";
54  case FCOND_NGE:
55  case FCOND_GE:  return "nge";
56  case FCOND_LE:
57  case FCOND_NLE: return "le";
58  case FCOND_NGT:
59  case FCOND_GT:  return "ngt";
60  }
61  llvm_unreachable("Impossible condition code!");
62}
63
64StringRef MipsInstPrinter::getOpcodeName(unsigned Opcode) const {
65  return getInstructionName(Opcode);
66}
67
68void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
69  OS << '$' << LowercaseString(getRegisterName(RegNo));
70}
71
72void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
73  printInstruction(MI, O);
74}
75
76void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
77                                   raw_ostream &O) {
78  const MCOperand &Op = MI->getOperand(OpNo);
79  if (Op.isReg()) {
80    printRegName(O, Op.getReg());
81    return;
82  }
83
84  if (Op.isImm()) {
85    O << Op.getImm();
86    return;
87  }
88
89  assert(Op.isExpr() && "unknown operand kind in printOperand");
90  O << *Op.getExpr();
91}
92
93void MipsInstPrinter::printUnsignedImm(const MCInst *MI, int opNum,
94                                       raw_ostream &O) {
95  const MCOperand &MO = MI->getOperand(opNum);
96  if (MO.isImm())
97    O << (unsigned short int)MO.getImm();
98  else
99    printOperand(MI, opNum, O);
100}
101
102void MipsInstPrinter::
103printMemOperand(const MCInst *MI, int opNum, raw_ostream &O) {
104  // Load/Store memory operands -- imm($reg)
105  // If PIC target the target is loaded as the
106  // pattern lw $25,%call16($28)
107  printOperand(MI, opNum+1, O);
108  O << "(";
109  printOperand(MI, opNum, O);
110  O << ")";
111}
112
113void MipsInstPrinter::
114printMemOperandEA(const MCInst *MI, int opNum, raw_ostream &O) {
115  // when using stack locations for not load/store instructions
116  // print the same way as all normal 3 operand instructions.
117  printOperand(MI, opNum, O);
118  O << ", ";
119  printOperand(MI, opNum+1, O);
120  return;
121}
122
123void MipsInstPrinter::
124printFCCOperand(const MCInst *MI, int opNum, raw_ostream &O) {
125  const MCOperand& MO = MI->getOperand(opNum);
126  O << MipsFCCToString((Mips::CondCode)MO.getImm());
127}
128