1f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===-- SIInstrInfo.h - SI Instruction Info Interface ---------------------===// 2f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 3f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// The LLVM Compiler Infrastructure 4f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 5f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// This file is distributed under the University of Illinois Open Source 6f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// License. See LICENSE.TXT for details. 7f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 8f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 9f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 10f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \file 11f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \brief Interface definition for SIInstrInfo. 12f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 13f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 14f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 15f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 16f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#ifndef SIINSTRINFO_H 17f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#define SIINSTRINFO_H 18f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 19f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "AMDGPUInstrInfo.h" 20f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "SIRegisterInfo.h" 21f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 22f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardnamespace llvm { 23f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 24f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardclass SIInstrInfo : public AMDGPUInstrInfo { 25f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardprivate: 26f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard const SIRegisterInfo RI; 27f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 28f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardpublic: 29f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard explicit SIInstrInfo(AMDGPUTargetMachine &tm); 30f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 31f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard const SIRegisterInfo &getRegisterInfo() const; 32f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 33f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard virtual void copyPhysReg(MachineBasicBlock &MBB, 34f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MachineBasicBlock::iterator MI, DebugLoc DL, 35f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard unsigned DestReg, unsigned SrcReg, 36f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard bool KillSrc) const; 37f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 38b3d1eaded7d7a874bbda2b0d322df7389c724bfcChristian Konig virtual MachineInstr *commuteInstruction(MachineInstr *MI, 39b3d1eaded7d7a874bbda2b0d322df7389c724bfcChristian Konig bool NewMI=false) const; 40b3d1eaded7d7a874bbda2b0d322df7389c724bfcChristian Konig 41f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg, 42f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard int64_t Imm) const; 43f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 44f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard virtual unsigned getIEQOpcode() const { assert(!"Implement"); return 0;} 45f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard virtual bool isMov(unsigned Opcode) const; 46f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 47f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard virtual bool isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const; 48c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 49c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard virtual int getIndirectIndexBegin(const MachineFunction &MF) const; 50c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 51c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard virtual int getIndirectIndexEnd(const MachineFunction &MF) const; 52c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 53c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard virtual unsigned calculateIndirectAddress(unsigned RegIndex, 54c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned Channel) const; 55c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 56c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard virtual const TargetRegisterClass *getIndirectAddrStoreRegClass( 57c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned SourceReg) const; 58c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 59c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard virtual const TargetRegisterClass *getIndirectAddrLoadRegClass() const; 60c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 61c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard virtual MachineInstrBuilder buildIndirectWrite(MachineBasicBlock *MBB, 62c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard MachineBasicBlock::iterator I, 63c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned ValueReg, 64c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned Address, 65c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned OffsetReg) const; 66c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 67c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard virtual MachineInstrBuilder buildIndirectRead(MachineBasicBlock *MBB, 68c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard MachineBasicBlock::iterator I, 69c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned ValueReg, 70c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned Address, 71c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned OffsetReg) const; 72c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 73c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard virtual const TargetRegisterClass *getSuperIndirectRegClass() const; 74f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard }; 75f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 76f767018b1048f228b0c2a71d7e4008750aff0ef5Christian Konignamespace AMDGPU { 77f767018b1048f228b0c2a71d7e4008750aff0ef5Christian Konig 78f767018b1048f228b0c2a71d7e4008750aff0ef5Christian Konig int getVOPe64(uint16_t Opcode); 79f767018b1048f228b0c2a71d7e4008750aff0ef5Christian Konig 80f767018b1048f228b0c2a71d7e4008750aff0ef5Christian Konig} // End namespace AMDGPU 81f767018b1048f228b0c2a71d7e4008750aff0ef5Christian Konig 82f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} // End namespace llvm 83f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 84f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardnamespace SIInstrFlags { 85f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard enum Flags { 86f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // First 4 bits are the instruction encoding 87184f5c1545e06a99951f14d846a1d853ff19a2b8Tom Stellard VM_CNT = 1 << 0, 88184f5c1545e06a99951f14d846a1d853ff19a2b8Tom Stellard EXP_CNT = 1 << 1, 89184f5c1545e06a99951f14d846a1d853ff19a2b8Tom Stellard LGKM_CNT = 1 << 2 90f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard }; 91f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 92f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 93f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#endif //SIINSTRINFO_H 94