X86.h revision a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576d 
1//===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the entry points for global functions defined in the x86
11// target library, as used by the LLVM JIT.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef TARGET_X86_H
16#define TARGET_X86_H
17
18#include "llvm/Support/DataTypes.h"
19#include "llvm/Target/TargetMachine.h"
20
21namespace llvm {
22
23class FunctionPass;
24class JITCodeEmitter;
25class MCCodeEmitter;
26class MCContext;
27class MCObjectWriter;
28class MachineCodeEmitter;
29class Target;
30class TargetAsmBackend;
31class X86TargetMachine;
32class formatted_raw_ostream;
33class raw_ostream;
34
35/// createX86ISelDag - This pass converts a legalized DAG into a
36/// X86-specific DAG, ready for instruction scheduling.
37///
38FunctionPass *createX86ISelDag(X86TargetMachine &TM,
39                               CodeGenOpt::Level OptLevel);
40
41/// createGlobalBaseRegPass - This pass initializes a global base
42/// register for PIC on x86-32.
43FunctionPass* createGlobalBaseRegPass();
44
45/// createX86FloatingPointStackifierPass - This function returns a pass which
46/// converts floating point register references and pseudo instructions into
47/// floating point stack references and physical instructions.
48///
49FunctionPass *createX86FloatingPointStackifierPass();
50
51/// createSSEDomainFixPass - This pass twiddles SSE opcodes to prevent domain
52/// crossings.
53FunctionPass *createSSEDomainFixPass();
54
55/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
56/// to the specified MCE object.
57FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
58                                          JITCodeEmitter &JCE);
59
60MCCodeEmitter *createX86_32MCCodeEmitter(const Target &, TargetMachine &TM,
61                                         MCContext &Ctx);
62MCCodeEmitter *createX86_64MCCodeEmitter(const Target &, TargetMachine &TM,
63                                         MCContext &Ctx);
64
65TargetAsmBackend *createX86_32AsmBackend(const Target &, const std::string &);
66TargetAsmBackend *createX86_64AsmBackend(const Target &, const std::string &);
67
68/// createX86EmitCodeToMemory - Returns a pass that converts a register
69/// allocated function into raw machine code in a dynamically
70/// allocated chunk of memory.
71///
72FunctionPass *createEmitX86CodeToMemory();
73
74/// createX86MaxStackAlignmentHeuristicPass - This function returns a pass
75/// which determines whether the frame pointer register should be
76/// reserved in case dynamic stack alignment is later required.
77///
78FunctionPass *createX86MaxStackAlignmentHeuristicPass();
79
80
81/// createX86MachObjectWriter - Construct an X86 Mach-O object writer.
82MCObjectWriter *createX86MachObjectWriter(raw_ostream &OS,
83                                          bool Is64Bit,
84                                          uint32_t CPUType,
85                                          uint32_t CPUSubtype);
86
87extern Target TheX86_32Target, TheX86_64Target;
88
89} // End llvm namespace
90
91#include "TargetDesc/X86TargetDesc.h"
92
93// Defines symbolic names for the X86 instructions.
94//
95#include "X86GenInstrNames.inc"
96
97#endif
98