131d157ae1ac2cd9c787dc3c1d28e64c682803844Jia Liu//===-- X86RegisterInfo.cpp - X86 Register Information --------------------===// 239354c99a158685d8bc91b0836c283e936a29cb2Alkis Evlogimenos// 3b576c94c15af9a440f69d9d03c2afead7971118cJohn Criswell// The LLVM Compiler Infrastructure 4b576c94c15af9a440f69d9d03c2afead7971118cJohn Criswell// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 739354c99a158685d8bc91b0836c283e936a29cb2Alkis Evlogimenos// 8b576c94c15af9a440f69d9d03c2afead7971118cJohn Criswell//===----------------------------------------------------------------------===// 9726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner// 106f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman// This file contains the X86 implementation of the TargetRegisterInfo class. 116f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman// This file is responsible for the frame pointer elimination optimization 126f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman// on X86. 13726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner// 14726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner//===----------------------------------------------------------------------===// 15726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner 16726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner#include "X86RegisterInfo.h" 1779aa3417eb6f58d668aadfedf075240a41d35a26Craig Topper#include "X86.h" 18cf2b9ac204078defaa01327a21a3fc15a25c2816Misha Brukman#include "X86InstrBuilder.h" 19e8bd0a332ab43c30a7745381075a9749070b6a50Evan Cheng#include "X86MachineFunctionInfo.h" 2025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng#include "X86Subtarget.h" 21e8bd0a332ab43c30a7745381075a9749070b6a50Evan Cheng#include "X86TargetMachine.h" 22d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/ADT/BitVector.h" 23d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/ADT/STLExtras.h" 24d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/CodeGen/MachineFrameInfo.h" 25198ab640bbb0b8e1cdda518b7f8b348764e4402cChris Lattner#include "llvm/CodeGen/MachineFunction.h" 262dad0250f683ac5b28a8984ce5be00d299f3c35eDan Gohman#include "llvm/CodeGen/MachineFunctionPass.h" 27d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/CodeGen/MachineInstrBuilder.h" 2884bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner#include "llvm/CodeGen/MachineModuleInfo.h" 2984bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner#include "llvm/CodeGen/MachineRegisterInfo.h" 30d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/CodeGen/ValueTypes.h" 310b8c9a80f20772c3793201ab5b251d3520b9cea3Chandler Carruth#include "llvm/IR/Constants.h" 320b8c9a80f20772c3793201ab5b251d3520b9cea3Chandler Carruth#include "llvm/IR/Function.h" 330b8c9a80f20772c3793201ab5b251d3520b9cea3Chandler Carruth#include "llvm/IR/Type.h" 34af76e592c7f9deff0e55c13dbb4a34f07f1c7f64Chris Lattner#include "llvm/MC/MCAsmInfo.h" 35d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/Support/CommandLine.h" 36d04a8d4b33ff316ca4cf961e06c9e312eff8e64fChandler Carruth#include "llvm/Support/ErrorHandling.h" 3716c29b5f285f375be53dabaa73e3e91107485fe4Anton Korobeynikov#include "llvm/Target/TargetFrameLowering.h" 3851cdcd197268a7abf19b2698fc824e0da3d98049Evan Cheng#include "llvm/Target/TargetInstrInfo.h" 3983eaa0b567156875d8d5f831dec0287627706da2Misha Brukman#include "llvm/Target/TargetMachine.h" 400cf0c3746995e8b95fc055cdf8e7210200cb942dChris Lattner#include "llvm/Target/TargetOptions.h" 4173f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng 4273f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng#define GET_REGINFO_TARGET_DESC 43a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576dEvan Cheng#include "X86GenRegisterInfo.inc" 4473f50d9bc3bd46cc0abeba9bb0d46977ba1aea42Evan Cheng 45300d0eda6fe644a32c931a9c4eee02eebd289902Chris Lattnerusing namespace llvm; 46d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 4733464912237efaa0ed7060829e66b59055bdd48bAnton Korobeynikovcl::opt<bool> 48e74a088d92e6010a1413a88865c85bb47a76f90cEric ChristopherForceStackAlign("force-align-stack", 49e74a088d92e6010a1413a88865c85bb47a76f90cEric Christopher cl::desc("Force align the stack to the minimum alignment" 50e74a088d92e6010a1413a88865c85bb47a76f90cEric Christopher " needed for the function."), 51e74a088d92e6010a1413a88865c85bb47a76f90cEric Christopher cl::init(false), cl::Hidden); 52e74a088d92e6010a1413a88865c85bb47a76f90cEric Christopher 5374b3c8da4800c7e8ba8f019879db29738ecc5f74Benjamin Kramerstatic cl::opt<bool> 543f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad RosierEnableBasePointer("x86-use-base-pointer", cl::Hidden, cl::init(true), 553f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier cl::desc("Enable use of a base pointer for complex stack frames")); 563f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier 5725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan ChengX86RegisterInfo::X86RegisterInfo(X86TargetMachine &tm, 5825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng const TargetInstrInfo &tii) 59fbf3b4a07690751f72302757058ab0298dfb832eJim Grosbach : X86GenRegisterInfo((tm.getSubtarget<X86Subtarget>().is64Bit() 60fbf3b4a07690751f72302757058ab0298dfb832eJim Grosbach ? X86::RIP : X86::EIP), 610e6a052331f674dd70e28af41f654a7874405eabEvan Cheng X86_MC::getDwarfRegFlavour(tm.getTargetTriple(), false), 62fbf3b4a07690751f72302757058ab0298dfb832eJim Grosbach X86_MC::getDwarfRegFlavour(tm.getTargetTriple(), true), 63fbf3b4a07690751f72302757058ab0298dfb832eJim Grosbach (tm.getSubtarget<X86Subtarget>().is64Bit() 64fbf3b4a07690751f72302757058ab0298dfb832eJim Grosbach ? X86::RIP : X86::EIP)), 650e6a052331f674dd70e28af41f654a7874405eabEvan Cheng TM(tm), TII(tii) { 660e6a052331f674dd70e28af41f654a7874405eabEvan Cheng X86_MC::InitLLVM2SEHRegisterMapping(this); 670e6a052331f674dd70e28af41f654a7874405eabEvan Cheng 6825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng // Cache some information. 6925ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>(); 7025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng Is64Bit = Subtarget->is64Bit(); 711dcce2148d855af67f845319414a94db5601be3eAnton Korobeynikov IsWin64 = Subtarget->isTargetWin64(); 7280c76436fe22a5481fac2cafe3c0a652fa6ddb31Bill Wendling 7325ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng if (Is64Bit) { 7425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng SlotSize = 8; 7525ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng StackPtr = X86::RSP; 7625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng FramePtr = X86::RBP; 7725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng } else { 7825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng SlotSize = 4; 7925ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng StackPtr = X86::ESP; 8025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng FramePtr = X86::EBP; 8125ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng } 82d97f3a5ab084485fe4931b6e7d8fa40ae4caa3c1Chad Rosier // Use a callee-saved register as the base pointer. These registers must 83a20e1e7ef596842127794372244fd5c646f71296Chad Rosier // not conflict with any ABI requirements. For example, in 32-bit mode PIC 84d97f3a5ab084485fe4931b6e7d8fa40ae4caa3c1Chad Rosier // requires GOT in the EBX register before function calls via PLT GOT pointer. 85d97f3a5ab084485fe4931b6e7d8fa40ae4caa3c1Chad Rosier BasePtr = Is64Bit ? X86::RBX : X86::ESI; 8625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng} 877ad3e063f508218a2823bd5cf092ef622ed7ba6cChris Lattner 885cd2791513919ee7504c309151321e4e37a05a58Bill Wendling/// getCompactUnwindRegNum - This function maps the register to the number for 895cd2791513919ee7504c309151321e4e37a05a58Bill Wendling/// compact unwind encoding. Return -1 if the register isn't valid. 90486dd90696545421c55346570b88fa03f6dd464fBill Wendlingint X86RegisterInfo::getCompactUnwindRegNum(unsigned RegNum, bool isEH) const { 91486dd90696545421c55346570b88fa03f6dd464fBill Wendling switch (getLLVMRegNum(RegNum, isEH)) { 925cd2791513919ee7504c309151321e4e37a05a58Bill Wendling case X86::EBX: case X86::RBX: return 1; 932374cb8e7d05082e15e2ae9950bab87aa2c664c9Bill Wendling case X86::ECX: case X86::R12: return 2; 942374cb8e7d05082e15e2ae9950bab87aa2c664c9Bill Wendling case X86::EDX: case X86::R13: return 3; 952374cb8e7d05082e15e2ae9950bab87aa2c664c9Bill Wendling case X86::EDI: case X86::R14: return 4; 962374cb8e7d05082e15e2ae9950bab87aa2c664c9Bill Wendling case X86::ESI: case X86::R15: return 5; 975cd2791513919ee7504c309151321e4e37a05a58Bill Wendling case X86::EBP: case X86::RBP: return 6; 985cd2791513919ee7504c309151321e4e37a05a58Bill Wendling } 995cd2791513919ee7504c309151321e4e37a05a58Bill Wendling 1005cd2791513919ee7504c309151321e4e37a05a58Bill Wendling return -1; 1015cd2791513919ee7504c309151321e4e37a05a58Bill Wendling} 1025cd2791513919ee7504c309151321e4e37a05a58Bill Wendling 1036a8c7bf8e72338e55f0f9583e1828f62da165d4aPreston Gurdbool 1046a8c7bf8e72338e55f0f9583e1828f62da165d4aPreston GurdX86RegisterInfo::trackLivenessAfterRegAlloc(const MachineFunction &MF) const { 1056a8c7bf8e72338e55f0f9583e1828f62da165d4aPreston Gurd // Only enable when post-RA scheduling is enabled and this is needed. 1066a8c7bf8e72338e55f0f9583e1828f62da165d4aPreston Gurd return TM.getSubtargetImpl()->postRAScheduler(); 1076a8c7bf8e72338e55f0f9583e1828f62da165d4aPreston Gurd} 1086a8c7bf8e72338e55f0f9583e1828f62da165d4aPreston Gurd 1096b918b84661687f7b5fc92dabd6d58e258bf39f2Charles Davisint 1106b918b84661687f7b5fc92dabd6d58e258bf39f2Charles DavisX86RegisterInfo::getSEHRegNum(unsigned i) const { 1117abf67a092c0a75d6d1631766d6a8ef14e38d526Michael Liao return getEncodingValue(i); 1126b918b84661687f7b5fc92dabd6d58e258bf39f2Charles Davis} 1136b918b84661687f7b5fc92dabd6d58e258bf39f2Charles Davis 1145248468473f0488a652b545ad95f7abda302b7b5Evan Chengconst TargetRegisterClass * 1159bb272c900b46ebf78aa1b9daa7e3991bec8ff18Jakob Stoklund OlesenX86RegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, 1169bb272c900b46ebf78aa1b9daa7e3991bec8ff18Jakob Stoklund Olesen unsigned Idx) const { 1179bb272c900b46ebf78aa1b9daa7e3991bec8ff18Jakob Stoklund Olesen // The sub_8bit sub-register index is more constrained in 32-bit mode. 1189bb272c900b46ebf78aa1b9daa7e3991bec8ff18Jakob Stoklund Olesen // It behaves just like the sub_8bit_hi index. 1199bb272c900b46ebf78aa1b9daa7e3991bec8ff18Jakob Stoklund Olesen if (!Is64Bit && Idx == X86::sub_8bit) 1209bb272c900b46ebf78aa1b9daa7e3991bec8ff18Jakob Stoklund Olesen Idx = X86::sub_8bit_hi; 1219bb272c900b46ebf78aa1b9daa7e3991bec8ff18Jakob Stoklund Olesen 1229bb272c900b46ebf78aa1b9daa7e3991bec8ff18Jakob Stoklund Olesen // Forward to TableGen's default version. 1239bb272c900b46ebf78aa1b9daa7e3991bec8ff18Jakob Stoklund Olesen return X86GenRegisterInfo::getSubClassWithSubReg(RC, Idx); 1249bb272c900b46ebf78aa1b9daa7e3991bec8ff18Jakob Stoklund Olesen} 1259bb272c900b46ebf78aa1b9daa7e3991bec8ff18Jakob Stoklund Olesen 1269bb272c900b46ebf78aa1b9daa7e3991bec8ff18Jakob Stoklund Olesenconst TargetRegisterClass * 1275248468473f0488a652b545ad95f7abda302b7b5Evan ChengX86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, 1285248468473f0488a652b545ad95f7abda302b7b5Evan Cheng const TargetRegisterClass *B, 1295248468473f0488a652b545ad95f7abda302b7b5Evan Cheng unsigned SubIdx) const { 130570f9a972e02830d1ca223743dd6b4cc4fdf9549Jakob Stoklund Olesen // The sub_8bit sub-register index is more constrained in 32-bit mode. 131570f9a972e02830d1ca223743dd6b4cc4fdf9549Jakob Stoklund Olesen if (!Is64Bit && SubIdx == X86::sub_8bit) { 132570f9a972e02830d1ca223743dd6b4cc4fdf9549Jakob Stoklund Olesen A = X86GenRegisterInfo::getSubClassWithSubReg(A, X86::sub_8bit_hi); 133570f9a972e02830d1ca223743dd6b4cc4fdf9549Jakob Stoklund Olesen if (!A) 134570f9a972e02830d1ca223743dd6b4cc4fdf9549Jakob Stoklund Olesen return 0; 1355248468473f0488a652b545ad95f7abda302b7b5Evan Cheng } 136570f9a972e02830d1ca223743dd6b4cc4fdf9549Jakob Stoklund Olesen return X86GenRegisterInfo::getMatchingSuperRegClass(A, B, SubIdx); 1375248468473f0488a652b545ad95f7abda302b7b5Evan Cheng} 1385248468473f0488a652b545ad95f7abda302b7b5Evan Cheng 139c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesenconst TargetRegisterClass* 140c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund OlesenX86RegisterInfo::getLargestLegalSuperClass(const TargetRegisterClass *RC) const{ 141b7994fedcbcf375ee70b0ad11e1c962c0ccfc1aeJakob Stoklund Olesen // Don't allow super-classes of GR8_NOREX. This class is only used after 142b7994fedcbcf375ee70b0ad11e1c962c0ccfc1aeJakob Stoklund Olesen // extrating sub_8bit_hi sub-registers. The H sub-registers cannot be copied 143b7994fedcbcf375ee70b0ad11e1c962c0ccfc1aeJakob Stoklund Olesen // to the full GR8 register class in 64-bit mode, so we cannot allow the 144b7994fedcbcf375ee70b0ad11e1c962c0ccfc1aeJakob Stoklund Olesen // reigster class inflation. 145b7994fedcbcf375ee70b0ad11e1c962c0ccfc1aeJakob Stoklund Olesen // 146b7994fedcbcf375ee70b0ad11e1c962c0ccfc1aeJakob Stoklund Olesen // The GR8_NOREX class is always used in a way that won't be constrained to a 147b7994fedcbcf375ee70b0ad11e1c962c0ccfc1aeJakob Stoklund Olesen // sub-class, so sub-classes like GR8_ABCD_L are allowed to expand to the 148b7994fedcbcf375ee70b0ad11e1c962c0ccfc1aeJakob Stoklund Olesen // full GR8 class. 149c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper if (RC == &X86::GR8_NOREXRegClass) 150b7994fedcbcf375ee70b0ad11e1c962c0ccfc1aeJakob Stoklund Olesen return RC; 151b7994fedcbcf375ee70b0ad11e1c962c0ccfc1aeJakob Stoklund Olesen 152c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen const TargetRegisterClass *Super = RC; 153c8e2bb68bbc4a71cc10084c8f89565b9f05e12efJakob Stoklund Olesen TargetRegisterClass::sc_iterator I = RC->getSuperClasses(); 154c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen do { 155c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen switch (Super->getID()) { 156c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen case X86::GR8RegClassID: 157c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen case X86::GR16RegClassID: 158c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen case X86::GR32RegClassID: 159c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen case X86::GR64RegClassID: 160c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen case X86::FR32RegClassID: 161c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen case X86::FR64RegClassID: 162c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen case X86::RFP32RegClassID: 163c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen case X86::RFP64RegClassID: 164c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen case X86::RFP80RegClassID: 165c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen case X86::VR128RegClassID: 166c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen case X86::VR256RegClassID: 167c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen // Don't return a super-class that would shrink the spill size. 168c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen // That can happen with the vector and float classes. 169c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen if (Super->getSize() == RC->getSize()) 170c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen return Super; 171c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen } 172c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen Super = *I++; 173c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen } while (Super); 174c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen return RC; 175c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen} 176c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen 17780c76436fe22a5481fac2cafe3c0a652fa6ddb31Bill Wendlingconst TargetRegisterClass * 178397fc4874efe9c17e737d4c5c50bd19dc3bf27f5Jakob Stoklund OlesenX86RegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind) 179397fc4874efe9c17e737d4c5c50bd19dc3bf27f5Jakob Stoklund Olesen const { 180a5597f0eaf1f93c6d0bc641a0cc54ecffb33955aEli Bendersky const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>(); 181a4714e025de720d0fcbaa78ab6c12dc789599233Dan Gohman switch (Kind) { 182a4714e025de720d0fcbaa78ab6c12dc789599233Dan Gohman default: llvm_unreachable("Unexpected Kind in getPointerRegClass!"); 183a4714e025de720d0fcbaa78ab6c12dc789599233Dan Gohman case 0: // Normal GPRs. 184a5597f0eaf1f93c6d0bc641a0cc54ecffb33955aEli Bendersky if (Subtarget.isTarget64BitLP64()) 185a4714e025de720d0fcbaa78ab6c12dc789599233Dan Gohman return &X86::GR64RegClass; 186a4714e025de720d0fcbaa78ab6c12dc789599233Dan Gohman return &X86::GR32RegClass; 187b9010763871a186d2a42c445431f9bdff9d83530NAKAMURA Takumi case 1: // Normal GPRs except the stack pointer (for encoding reasons). 188a5597f0eaf1f93c6d0bc641a0cc54ecffb33955aEli Bendersky if (Subtarget.isTarget64BitLP64()) 18974f6f9a931e313948782aed9d463ea83cc3e214cDan Gohman return &X86::GR64_NOSPRegClass; 19074f6f9a931e313948782aed9d463ea83cc3e214cDan Gohman return &X86::GR32_NOSPRegClass; 1917754f85885f8a961cb403ef13ab39583492d2b1eNAKAMURA Takumi case 2: // Available for tailcall (not callee-saved GPRs). 192a5597f0eaf1f93c6d0bc641a0cc54ecffb33955aEli Bendersky if (Subtarget.isTargetWin64()) 1937754f85885f8a961cb403ef13ab39583492d2b1eNAKAMURA Takumi return &X86::GR64_TCW64RegClass; 194a5597f0eaf1f93c6d0bc641a0cc54ecffb33955aEli Bendersky else if (Subtarget.is64Bit()) 1957754f85885f8a961cb403ef13ab39583492d2b1eNAKAMURA Takumi return &X86::GR64_TCRegClass; 196dc7f174b5e049172f085ff5957f58998bdc446a4Duncan Sands 197dc7f174b5e049172f085ff5957f58998bdc446a4Duncan Sands const Function *F = MF.getFunction(); 198dc7f174b5e049172f085ff5957f58998bdc446a4Duncan Sands bool hasHipeCC = (F ? F->getCallingConv() == CallingConv::HiPE : false); 199dc7f174b5e049172f085ff5957f58998bdc446a4Duncan Sands if (hasHipeCC) 200dc7f174b5e049172f085ff5957f58998bdc446a4Duncan Sands return &X86::GR32RegClass; 2017754f85885f8a961cb403ef13ab39583492d2b1eNAKAMURA Takumi return &X86::GR32_TCRegClass; 202a4714e025de720d0fcbaa78ab6c12dc789599233Dan Gohman } 203770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng} 204770bcc7b15adbc978800db70dbb1c3c22913b52cEvan Cheng 205ff110265753c19daf0468ee1facf357460497b7eEvan Chengconst TargetRegisterClass * 206ff110265753c19daf0468ee1facf357460497b7eEvan ChengX86RegisterInfo::getCrossCopyRegClass(const TargetRegisterClass *RC) const { 2074aefd6b7d4dadf8109221a89742725c116d8f8e0Anton Korobeynikov if (RC == &X86::CCRRegClass) { 2083f2d9ec186ce25b19bb36ae54eaee025150058fdEvan Cheng if (Is64Bit) 2093f2d9ec186ce25b19bb36ae54eaee025150058fdEvan Cheng return &X86::GR64RegClass; 2103f2d9ec186ce25b19bb36ae54eaee025150058fdEvan Cheng else 2113f2d9ec186ce25b19bb36ae54eaee025150058fdEvan Cheng return &X86::GR32RegClass; 2124aefd6b7d4dadf8109221a89742725c116d8f8e0Anton Korobeynikov } 213b0519e15f70cef7ba16b712f258d4782ade17e13Evan Cheng return RC; 214ff110265753c19daf0468ee1facf357460497b7eEvan Cheng} 215bf2c8b3c96f5c885095a10b0fcb29438f92d73c2Evan Cheng 216be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarichunsigned 217be2119e8e2bc7006cfd638a24367acbfda625d16Cameron ZwarichX86RegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, 218be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich MachineFunction &MF) const { 219be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); 220be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich 221be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich unsigned FPDiff = TFI->hasFP(MF) ? 1 : 0; 222be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich switch (RC->getID()) { 223be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich default: 224be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich return 0; 225be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich case X86::GR32RegClassID: 226be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich return 4 - FPDiff; 227be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich case X86::GR64RegClassID: 228be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich return 12 - FPDiff; 229be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich case X86::VR128RegClassID: 230be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich return TM.getSubtarget<X86Subtarget>().is64Bit() ? 10 : 4; 231be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich case X86::VR64RegClassID: 232be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich return 4; 233be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich } 234be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich} 235be2119e8e2bc7006cfd638a24367acbfda625d16Cameron Zwarich 236015f228861ef9b337366f92f637d4e8d624bb006Craig Topperconst uint16_t * 23764d80e3387f328d21cd9cc06464b5de7861e3f27Evan ChengX86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { 238c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne switch (MF->getFunction()->getCallingConv()) { 239c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne case CallingConv::GHC: 240c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne case CallingConv::HiPE: 2411910cb1e3d07d7139d0bb83e4f65188bd3a32622Jakob Stoklund Olesen return CSR_NoRegs_SaveList; 242c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne 243c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne case CallingConv::Intel_OCL_BI: { 244c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne bool HasAVX = TM.getSubtarget<X86Subtarget>().hasAVX(); 2453575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky if (HasAVX && IsWin64) 246c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne return CSR_Win64_Intel_OCL_BI_AVX_SaveList; 2473575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky if (HasAVX && Is64Bit) 248c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne return CSR_64_Intel_OCL_BI_AVX_SaveList; 2493575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky if (!HasAVX && !IsWin64 && Is64Bit) 250c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne return CSR_64_Intel_OCL_BI_SaveList; 251c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne break; 2523575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky } 253c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne 254c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne case CallingConv::Cold: 255c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne if (Is64Bit) 256c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne return CSR_MostRegs_64_SaveList; 257c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne break; 258c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne 259c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne default: 260c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne break; 261c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne } 262c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne 263c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne bool CallsEHReturn = MF->getMMI().callsEHReturn(); 2640bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesen if (Is64Bit) { 2651dcce2148d855af67f845319414a94db5601be3eAnton Korobeynikov if (IsWin64) 2660bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesen return CSR_Win64_SaveList; 267c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne if (CallsEHReturn) 2680bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesen return CSR_64EHRet_SaveList; 2690bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesen return CSR_64_SaveList; 2702365f51ed03afe6993bae962fdc2e5a956a64cd5Anton Korobeynikov } 271c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne if (CallsEHReturn) 2720bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesen return CSR_32EHRet_SaveList; 2730bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesen return CSR_32_SaveList; 2740bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesen} 2750bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesen 2760bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesenconst uint32_t* 2770bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund OlesenX86RegisterInfo::getCallPreservedMask(CallingConv::ID CC) const { 2783575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky bool HasAVX = TM.getSubtarget<X86Subtarget>().hasAVX(); 2793575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky 2803575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky if (CC == CallingConv::Intel_OCL_BI) { 2813575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky if (IsWin64 && HasAVX) 2823575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky return CSR_Win64_Intel_OCL_BI_AVX_RegMask; 2833575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky if (Is64Bit && HasAVX) 2843575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky return CSR_64_Intel_OCL_BI_AVX_RegMask; 2853575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky if (!HasAVX && !IsWin64 && Is64Bit) 2863575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky return CSR_64_Intel_OCL_BI_RegMask; 2873575222175b4982f380ff291bb17be67aadc0966Elena Demikhovsky } 288dc7f174b5e049172f085ff5957f58998bdc446a4Duncan Sands if (CC == CallingConv::GHC || CC == CallingConv::HiPE) 2891910cb1e3d07d7139d0bb83e4f65188bd3a32622Jakob Stoklund Olesen return CSR_NoRegs_RegMask; 2900bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesen if (!Is64Bit) 2910bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesen return CSR_32_RegMask; 292c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne if (CC == CallingConv::Cold) 293c4952bfc31ee437590eeba8f16800fda5e4d607ePeter Collingbourne return CSR_MostRegs_64_RegMask; 2940bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesen if (IsWin64) 2950bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesen return CSR_Win64_RegMask; 2960bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774Jakob Stoklund Olesen return CSR_64_RegMask; 2970f3ac8d8d4ce23eb2ae6f9d850f389250874eea5Evan Cheng} 2980f3ac8d8d4ce23eb2ae6f9d850f389250874eea5Evan Cheng 2996c0e04c823cf4034214b050e338c99a401edd2acMichael Liaoconst uint32_t* 3006c0e04c823cf4034214b050e338c99a401edd2acMichael LiaoX86RegisterInfo::getNoPreservedMask() const { 3016c0e04c823cf4034214b050e338c99a401edd2acMichael Liao return CSR_NoRegs_RegMask; 3026c0e04c823cf4034214b050e338c99a401edd2acMichael Liao} 3036c0e04c823cf4034214b050e338c99a401edd2acMichael Liao 304b371f457b0ea4a652a9f526ba4375c80ae542252Evan ChengBitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const { 305b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng BitVector Reserved(getNumRegs()); 30616c29b5f285f375be53dabaa73e3e91107485fe4Anton Korobeynikov const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); 307d0c38176690e9602a93a20a43f1bd084564a8116Anton Korobeynikov 308a32b7ac86f90b61731a1798768eef0403f16a869Dan Gohman // Set the stack-pointer register and its aliases as reserved. 309b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng Reserved.set(X86::RSP); 310547d8045fbf92eef358379f6e1446e33d8a8a0b8Chad Rosier for (MCSubRegIterator I(X86::RSP, this); I.isValid(); ++I) 311547d8045fbf92eef358379f6e1446e33d8a8a0b8Chad Rosier Reserved.set(*I); 31280c76436fe22a5481fac2cafe3c0a652fa6ddb31Bill Wendling 31352cd548525089056ac5be97e2b8eb05257bcdf3bJakob Stoklund Olesen // Set the instruction pointer register and its aliases as reserved. 31452cd548525089056ac5be97e2b8eb05257bcdf3bJakob Stoklund Olesen Reserved.set(X86::RIP); 315547d8045fbf92eef358379f6e1446e33d8a8a0b8Chad Rosier for (MCSubRegIterator I(X86::RIP, this); I.isValid(); ++I) 316547d8045fbf92eef358379f6e1446e33d8a8a0b8Chad Rosier Reserved.set(*I); 31752cd548525089056ac5be97e2b8eb05257bcdf3bJakob Stoklund Olesen 318a32b7ac86f90b61731a1798768eef0403f16a869Dan Gohman // Set the frame-pointer register and its aliases as reserved if needed. 319d0c38176690e9602a93a20a43f1bd084564a8116Anton Korobeynikov if (TFI->hasFP(MF)) { 320b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng Reserved.set(X86::RBP); 321547d8045fbf92eef358379f6e1446e33d8a8a0b8Chad Rosier for (MCSubRegIterator I(X86::RBP, this); I.isValid(); ++I) 322547d8045fbf92eef358379f6e1446e33d8a8a0b8Chad Rosier Reserved.set(*I); 323b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng } 32480c76436fe22a5481fac2cafe3c0a652fa6ddb31Bill Wendling 3253f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier // Set the base-pointer register and its aliases as reserved if needed. 3263f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier if (hasBasePointer(MF)) { 3273f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier CallingConv::ID CC = MF.getFunction()->getCallingConv(); 3283f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier const uint32_t* RegMask = getCallPreservedMask(CC); 3293f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier if (MachineOperand::clobbersPhysReg(RegMask, getBaseRegister())) 3303f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier report_fatal_error( 3313f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier "Stack realignment in presence of dynamic allocas is not supported with" 3323f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier "this calling convention."); 3333f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier 3343f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier Reserved.set(getBaseRegister()); 3353f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier for (MCSubRegIterator I(getBaseRegister(), this); I.isValid(); ++I) 3363f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier Reserved.set(*I); 3373f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier } 3383f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier 339e4c64454051962ab56187c966e981043ff17ae4fCameron Zwarich // Mark the segment registers as reserved. 340e4c64454051962ab56187c966e981043ff17ae4fCameron Zwarich Reserved.set(X86::CS); 341e4c64454051962ab56187c966e981043ff17ae4fCameron Zwarich Reserved.set(X86::SS); 342e4c64454051962ab56187c966e981043ff17ae4fCameron Zwarich Reserved.set(X86::DS); 343e4c64454051962ab56187c966e981043ff17ae4fCameron Zwarich Reserved.set(X86::ES); 344e4c64454051962ab56187c966e981043ff17ae4fCameron Zwarich Reserved.set(X86::FS); 345e4c64454051962ab56187c966e981043ff17ae4fCameron Zwarich Reserved.set(X86::GS); 346e4c64454051962ab56187c966e981043ff17ae4fCameron Zwarich 34766413b61f0fee8f8177aeadb27d16e8eb7d30472Preston Gurd // Mark the floating point stack registers as reserved. 34866413b61f0fee8f8177aeadb27d16e8eb7d30472Preston Gurd Reserved.set(X86::ST0); 34966413b61f0fee8f8177aeadb27d16e8eb7d30472Preston Gurd Reserved.set(X86::ST1); 35066413b61f0fee8f8177aeadb27d16e8eb7d30472Preston Gurd Reserved.set(X86::ST2); 35166413b61f0fee8f8177aeadb27d16e8eb7d30472Preston Gurd Reserved.set(X86::ST3); 35266413b61f0fee8f8177aeadb27d16e8eb7d30472Preston Gurd Reserved.set(X86::ST4); 35366413b61f0fee8f8177aeadb27d16e8eb7d30472Preston Gurd Reserved.set(X86::ST5); 35466413b61f0fee8f8177aeadb27d16e8eb7d30472Preston Gurd Reserved.set(X86::ST6); 35566413b61f0fee8f8177aeadb27d16e8eb7d30472Preston Gurd Reserved.set(X86::ST7); 35666413b61f0fee8f8177aeadb27d16e8eb7d30472Preston Gurd 3572a9d1ca9c244aeac98044a5fc9a081ff3df7b2ffJakob Stoklund Olesen // Reserve the registers that only exist in 64-bit mode. 3582a9d1ca9c244aeac98044a5fc9a081ff3df7b2ffJakob Stoklund Olesen if (!Is64Bit) { 359aad458d57f7ce2969da4d859b1cf705f61cb093eJakob Stoklund Olesen // These 8-bit registers are part of the x86-64 extension even though their 360aad458d57f7ce2969da4d859b1cf705f61cb093eJakob Stoklund Olesen // super-registers are old 32-bits. 361aad458d57f7ce2969da4d859b1cf705f61cb093eJakob Stoklund Olesen Reserved.set(X86::SIL); 362aad458d57f7ce2969da4d859b1cf705f61cb093eJakob Stoklund Olesen Reserved.set(X86::DIL); 363aad458d57f7ce2969da4d859b1cf705f61cb093eJakob Stoklund Olesen Reserved.set(X86::BPL); 364aad458d57f7ce2969da4d859b1cf705f61cb093eJakob Stoklund Olesen Reserved.set(X86::SPL); 365aad458d57f7ce2969da4d859b1cf705f61cb093eJakob Stoklund Olesen 3662a9d1ca9c244aeac98044a5fc9a081ff3df7b2ffJakob Stoklund Olesen for (unsigned n = 0; n != 8; ++n) { 367aad458d57f7ce2969da4d859b1cf705f61cb093eJakob Stoklund Olesen // R8, R9, ... 368e4fd907e72a599eddfa7a81eac4366b5b82523e3Craig Topper static const uint16_t GPR64[] = { 3692a9d1ca9c244aeac98044a5fc9a081ff3df7b2ffJakob Stoklund Olesen X86::R8, X86::R9, X86::R10, X86::R11, 3702a9d1ca9c244aeac98044a5fc9a081ff3df7b2ffJakob Stoklund Olesen X86::R12, X86::R13, X86::R14, X86::R15 3712a9d1ca9c244aeac98044a5fc9a081ff3df7b2ffJakob Stoklund Olesen }; 372396618b43a85e12d290a90b181c6af5d7c0c5f11Jakob Stoklund Olesen for (MCRegAliasIterator AI(GPR64[n], this, true); AI.isValid(); ++AI) 373396618b43a85e12d290a90b181c6af5d7c0c5f11Jakob Stoklund Olesen Reserved.set(*AI); 3742a9d1ca9c244aeac98044a5fc9a081ff3df7b2ffJakob Stoklund Olesen 3752a9d1ca9c244aeac98044a5fc9a081ff3df7b2ffJakob Stoklund Olesen // XMM8, XMM9, ... 3762a9d1ca9c244aeac98044a5fc9a081ff3df7b2ffJakob Stoklund Olesen assert(X86::XMM15 == X86::XMM8+7); 377396618b43a85e12d290a90b181c6af5d7c0c5f11Jakob Stoklund Olesen for (MCRegAliasIterator AI(X86::XMM8 + n, this, true); AI.isValid(); ++AI) 378396618b43a85e12d290a90b181c6af5d7c0c5f11Jakob Stoklund Olesen Reserved.set(*AI); 3792a9d1ca9c244aeac98044a5fc9a081ff3df7b2ffJakob Stoklund Olesen } 3802a9d1ca9c244aeac98044a5fc9a081ff3df7b2ffJakob Stoklund Olesen } 3812a9d1ca9c244aeac98044a5fc9a081ff3df7b2ffJakob Stoklund Olesen 382b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng return Reserved; 383b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng} 384b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng 3853c1c03d7a76e51f5a668fcf27fccc3fb91675cedChris Lattner//===----------------------------------------------------------------------===// 3863c1c03d7a76e51f5a668fcf27fccc3fb91675cedChris Lattner// Stack Frame Processing methods 3873c1c03d7a76e51f5a668fcf27fccc3fb91675cedChris Lattner//===----------------------------------------------------------------------===// 3883c1c03d7a76e51f5a668fcf27fccc3fb91675cedChris Lattner 3893f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosierbool X86RegisterInfo::hasBasePointer(const MachineFunction &MF) const { 3903f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier const MachineFrameInfo *MFI = MF.getFrameInfo(); 3913f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier 3923f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier if (!EnableBasePointer) 3933f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier return false; 3943f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier 395a20e1e7ef596842127794372244fd5c646f71296Chad Rosier // When we need stack realignment and there are dynamic allocas, we can't 3969b5b8b0b9439da2dd4167ece15db7e13d37f461cChad Rosier // reference off of the stack pointer, so we reserve a base pointer. 3979b5b8b0b9439da2dd4167ece15db7e13d37f461cChad Rosier // 3989b5b8b0b9439da2dd4167ece15db7e13d37f461cChad Rosier // This is also true if the function contain MS-style inline assembly. We 3999b5b8b0b9439da2dd4167ece15db7e13d37f461cChad Rosier // do this because if any stack changes occur in the inline assembly, e.g., 4009b5b8b0b9439da2dd4167ece15db7e13d37f461cChad Rosier // "pusha", then any C local variable or C argument references in the 4019b5b8b0b9439da2dd4167ece15db7e13d37f461cChad Rosier // inline assembly will be wrong because the SP is not properly tracked. 402b86f1e5e557f8a00209eef1c6ecb4532b33d7738Chad Rosier if ((needsStackRealignment(MF) && MFI->hasVarSizedObjects()) || 403b86f1e5e557f8a00209eef1c6ecb4532b33d7738Chad Rosier MF.hasMSInlineAsm()) 4043f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier return true; 4053f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier 4063f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier return false; 4073f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier} 4083f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier 409e45ab8a0a90e4f3a59d8c38038ae3e495ee1fef3Jim Grosbachbool X86RegisterInfo::canRealignStack(const MachineFunction &MF) const { 410e45ab8a0a90e4f3a59d8c38038ae3e495ee1fef3Jim Grosbach const MachineFrameInfo *MFI = MF.getFrameInfo(); 4113f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier const MachineRegisterInfo *MRI = &MF.getRegInfo(); 4123f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier if (!MF.getTarget().Options.RealignStack) 4133f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier return false; 4143f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier 4153f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier // Stack realignment requires a frame pointer. If we already started 4163f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier // register allocation with frame pointer elimination, it is too late now. 4173f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier if (!MRI->canReserveReg(FramePtr)) 4183f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier return false; 4193f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier 4203f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier // If a base pointer is necessary. Check that it isn't too late to reserve 4213f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier // it. 4223f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier if (MFI->hasVarSizedObjects()) 4233f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier return MRI->canReserveReg(BasePtr); 4243f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier return true; 425e45ab8a0a90e4f3a59d8c38038ae3e495ee1fef3Jim Grosbach} 426e45ab8a0a90e4f3a59d8c38038ae3e495ee1fef3Jim Grosbach 4279bbbea568c6a48a5be6a5f7c1449c164fed55e70Anton Korobeynikovbool X86RegisterInfo::needsStackRealignment(const MachineFunction &MF) const { 4289c0f146d50ccc3ba780d4854b8e14422430013efNick Lewycky const MachineFrameInfo *MFI = MF.getFrameInfo(); 4295dfa26795da9c521babd598ef911e6d95bd20d37Charles Davis const Function *F = MF.getFunction(); 4302fa82bc3da45d272f12a96a61074b637faa62e0bEvan Cheng unsigned StackAlign = TM.getFrameLowering()->getStackAlignment(); 4316765834754cbb3cb0f15b4b15e98c5e73fa50066Bill Wendling bool requiresRealignment = 4326765834754cbb3cb0f15b4b15e98c5e73fa50066Bill Wendling ((MFI->getMaxAlignment() > StackAlign) || 433831737d329a727f53a1fb0572f7b7a8127208881Bill Wendling F->getAttributes().hasAttribute(AttributeSet::FunctionIndex, 434831737d329a727f53a1fb0572f7b7a8127208881Bill Wendling Attribute::StackAlignment)); 4359bbbea568c6a48a5be6a5f7c1449c164fed55e70Anton Korobeynikov 436e74a088d92e6010a1413a88865c85bb47a76f90cEric Christopher // If we've requested that we force align the stack do so now. 437e74a088d92e6010a1413a88865c85bb47a76f90cEric Christopher if (ForceStackAlign) 438e74a088d92e6010a1413a88865c85bb47a76f90cEric Christopher return canRealignStack(MF); 439c5b7a4223d4d91abbfd98f016f2f173ce181003eNAKAMURA Takumi 440acdb4b920351b13c23b3795fe00079a8f8f4bff8Eric Christopher return requiresRealignment && canRealignStack(MF); 4419bbbea568c6a48a5be6a5f7c1449c164fed55e70Anton Korobeynikov} 4429bbbea568c6a48a5be6a5f7c1449c164fed55e70Anton Korobeynikov 44372852a8cfb605056d87b644d2e36b1346051413dEric Christopherbool X86RegisterInfo::hasReservedSpillSlot(const MachineFunction &MF, 44472852a8cfb605056d87b644d2e36b1346051413dEric Christopher unsigned Reg, int &FrameIdx) const { 44516c29b5f285f375be53dabaa73e3e91107485fe4Anton Korobeynikov const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); 446d0c38176690e9602a93a20a43f1bd084564a8116Anton Korobeynikov 447d0c38176690e9602a93a20a43f1bd084564a8116Anton Korobeynikov if (Reg == FramePtr && TFI->hasFP(MF)) { 448910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng FrameIdx = MF.getFrameInfo()->getObjectIndexBegin(); 449910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng return true; 450910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng } 451910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng return false; 452910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng} 453910139f9ca53fc20a680d51ae61bb1e072095141Evan Cheng 454fcb4a8ead3cd8d9540d5eaa448af5d14a0ee341aJim Grosbachvoid 455b58f498f7502e7e1833decbbbb4df771367c7341Jim GrosbachX86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, 456108fb3202af6f500073cdbb7be32c25d7a273a2eChad Rosier int SPAdj, unsigned FIOperandNum, 457108fb3202af6f500073cdbb7be32c25d7a273a2eChad Rosier RegScavenger *RS) const { 45897de9138217d6f76f25100df272ec1a3c4d31aadEvan Cheng assert(SPAdj == 0 && "Unexpected"); 45997de9138217d6f76f25100df272ec1a3c4d31aadEvan Cheng 460c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos MachineInstr &MI = *II; 461f8be5e94aaf70d53dc043f5e541fc0bf6771db22Nate Begeman MachineFunction &MF = *MI.getParent()->getParent(); 46216c29b5f285f375be53dabaa73e3e91107485fe4Anton Korobeynikov const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); 463108fb3202af6f500073cdbb7be32c25d7a273a2eChad Rosier int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 4648e91ec5e29d930fd07a7ebb7d9c4b34a41873962Anton Korobeynikov unsigned BasePtr; 46580c76436fe22a5481fac2cafe3c0a652fa6ddb31Bill Wendling 4663f54c64a9834f949fdd3abcf8bb68e596c87a6bdEvan Cheng unsigned Opc = MI.getOpcode(); 4673f54c64a9834f949fdd3abcf8bb68e596c87a6bdEvan Cheng bool AfterFPPop = Opc == X86::TAILJMPm64 || Opc == X86::TAILJMPm; 4683f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier if (hasBasePointer(MF)) 4693f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister()); 4703f0dbab963197cadb32f70e1ee1a106fe35f5c8eChad Rosier else if (needsStackRealignment(MF)) 4718e91ec5e29d930fd07a7ebb7d9c4b34a41873962Anton Korobeynikov BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); 4723f54c64a9834f949fdd3abcf8bb68e596c87a6bdEvan Cheng else if (AfterFPPop) 4733f54c64a9834f949fdd3abcf8bb68e596c87a6bdEvan Cheng BasePtr = StackPtr; 4748e91ec5e29d930fd07a7ebb7d9c4b34a41873962Anton Korobeynikov else 475d0c38176690e9602a93a20a43f1bd084564a8116Anton Korobeynikov BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); 4768e91ec5e29d930fd07a7ebb7d9c4b34a41873962Anton Korobeynikov 4773c1c03d7a76e51f5a668fcf27fccc3fb91675cedChris Lattner // This must be part of a four operand memory reference. Replace the 47825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng // FrameIndex with base register with EBP. Add an offset to the offset. 479108fb3202af6f500073cdbb7be32c25d7a273a2eChad Rosier MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); 48003c6fafd05c067d934d15ce8f472cb09740d0133Misha Brukman 48182779704ffd1723e57386e32b3bf6c096eadbbc7Dan Gohman // Now add the frame object offset to the offset from EBP. 4823f54c64a9834f949fdd3abcf8bb68e596c87a6bdEvan Cheng int FIOffset; 4833f54c64a9834f949fdd3abcf8bb68e596c87a6bdEvan Cheng if (AfterFPPop) { 4843f54c64a9834f949fdd3abcf8bb68e596c87a6bdEvan Cheng // Tail call jmp happens after FP is popped. 4853f54c64a9834f949fdd3abcf8bb68e596c87a6bdEvan Cheng const MachineFrameInfo *MFI = MF.getFrameInfo(); 486d0c38176690e9602a93a20a43f1bd084564a8116Anton Korobeynikov FIOffset = MFI->getObjectOffset(FrameIndex) - TFI->getOffsetOfLocalArea(); 4873f54c64a9834f949fdd3abcf8bb68e596c87a6bdEvan Cheng } else 48882f58740c76b42af8370247b23677a0318f6dde8Anton Korobeynikov FIOffset = TFI->getFrameIndexOffset(MF, FrameIndex); 4893f54c64a9834f949fdd3abcf8bb68e596c87a6bdEvan Cheng 490108fb3202af6f500073cdbb7be32c25d7a273a2eChad Rosier if (MI.getOperand(FIOperandNum+3).isImm()) { 49182779704ffd1723e57386e32b3bf6c096eadbbc7Dan Gohman // Offset is a 32-bit integer. 492108fb3202af6f500073cdbb7be32c25d7a273a2eChad Rosier int Imm = (int)(MI.getOperand(FIOperandNum + 3).getImm()); 4935cf2ee1f80e0d4c5c1ecb0717f3d9baefe7619e1Eli Friedman int Offset = FIOffset + Imm; 4947e9450107148895cd882dbaa21f17727b876998aEli Friedman assert((!Is64Bit || isInt<32>((long long)FIOffset + Imm)) && 4957e9450107148895cd882dbaa21f17727b876998aEli Friedman "Requesting 64-bit offset in 32-bit immediate!"); 496108fb3202af6f500073cdbb7be32c25d7a273a2eChad Rosier MI.getOperand(FIOperandNum + 3).ChangeToImmediate(Offset); 49782779704ffd1723e57386e32b3bf6c096eadbbc7Dan Gohman } else { 49882779704ffd1723e57386e32b3bf6c096eadbbc7Dan Gohman // Offset is symbolic. This is extremely rare. 499108fb3202af6f500073cdbb7be32c25d7a273a2eChad Rosier uint64_t Offset = FIOffset + 500108fb3202af6f500073cdbb7be32c25d7a273a2eChad Rosier (uint64_t)MI.getOperand(FIOperandNum+3).getOffset(); 501108fb3202af6f500073cdbb7be32c25d7a273a2eChad Rosier MI.getOperand(FIOperandNum + 3).setOffset(Offset); 50282779704ffd1723e57386e32b3bf6c096eadbbc7Dan Gohman } 50303c6fafd05c067d934d15ce8f472cb09740d0133Misha Brukman} 5042adb3959f629bdacab0e47b29e52139595523236Misha Brukman 5053f2bf85d14759cc4b28a86805f566ac805a54d00David Greeneunsigned X86RegisterInfo::getFrameRegister(const MachineFunction &MF) const { 50616c29b5f285f375be53dabaa73e3e91107485fe4Anton Korobeynikov const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); 507d0c38176690e9602a93a20a43f1bd084564a8116Anton Korobeynikov return TFI->hasFP(MF) ? FramePtr : StackPtr; 508f1d78e83356a412e525c30ac90dabf090a8cfc99Jim Laskey} 509f1d78e83356a412e525c30ac90dabf090a8cfc99Jim Laskey 51062819f31440fe1b1415473a89b8683b5b690d5faJim Laskeyunsigned X86RegisterInfo::getEHExceptionRegister() const { 511c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("What is the exception register"); 51262819f31440fe1b1415473a89b8683b5b690d5faJim Laskey} 51362819f31440fe1b1415473a89b8683b5b690d5faJim Laskey 51462819f31440fe1b1415473a89b8683b5b690d5faJim Laskeyunsigned X86RegisterInfo::getEHHandlerRegister() const { 515c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("What is the exception handler register"); 51662819f31440fe1b1415473a89b8683b5b690d5faJim Laskey} 51762819f31440fe1b1415473a89b8683b5b690d5faJim Laskey 5188f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Chengnamespace llvm { 519f4d25a2c461f7a64fcc643a6ea2541e87067d036Craig Topperunsigned getX86SubSuperRegister(unsigned Reg, MVT::SimpleValueType VT, 520f4d25a2c461f7a64fcc643a6ea2541e87067d036Craig Topper bool High) { 521f4d25a2c461f7a64fcc643a6ea2541e87067d036Craig Topper switch (VT) { 522f4d25a2c461f7a64fcc643a6ea2541e87067d036Craig Topper default: llvm_unreachable("Unexpected VT"); 523825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson case MVT::i8: 5248f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng if (High) { 5258f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng switch (Reg) { 5268389f24a66674e5776399f744fa8def3b217bc9eEli Bendersky default: return getX86SubSuperRegister(Reg, MVT::i64); 5278389f24a66674e5776399f744fa8def3b217bc9eEli Bendersky case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: 5288389f24a66674e5776399f744fa8def3b217bc9eEli Bendersky return X86::SI; 5298389f24a66674e5776399f744fa8def3b217bc9eEli Bendersky case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: 5308389f24a66674e5776399f744fa8def3b217bc9eEli Bendersky return X86::DI; 5318389f24a66674e5776399f744fa8def3b217bc9eEli Bendersky case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: 5328389f24a66674e5776399f744fa8def3b217bc9eEli Bendersky return X86::BP; 5338389f24a66674e5776399f744fa8def3b217bc9eEli Bendersky case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: 5348389f24a66674e5776399f744fa8def3b217bc9eEli Bendersky return X86::SP; 53525ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: 5368f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::AH; 53725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: 5388f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::DH; 53925ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: 5408f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::CH; 54125ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: 5428f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::BH; 5438f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng } 5448f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng } else { 5458f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng switch (Reg) { 546f4d25a2c461f7a64fcc643a6ea2541e87067d036Craig Topper default: llvm_unreachable("Unexpected register"); 54725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: 5488f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::AL; 54925ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: 5508f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::DL; 55125ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: 5528f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::CL; 55325ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: 5548f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::BL; 55525ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: 55625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::SIL; 55725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: 55825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::DIL; 55925ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: 56025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::BPL; 56125ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: 56225ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::SPL; 56325ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R8B: case X86::R8W: case X86::R8D: case X86::R8: 56425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R8B; 56525ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9: 56625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R9B; 56725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R10B: case X86::R10W: case X86::R10D: case X86::R10: 56825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R10B; 56925ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: 57025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R11B; 57125ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12: 57225ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R12B; 57325ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: 57425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R13B; 57525ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14: 57625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R14B; 57725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: 57825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R15B; 5798f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng } 5808f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng } 581825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson case MVT::i16: 5828f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng switch (Reg) { 583f4d25a2c461f7a64fcc643a6ea2541e87067d036Craig Topper default: llvm_unreachable("Unexpected register"); 58425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: 5858f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::AX; 58625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: 5878f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::DX; 58825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: 5898f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::CX; 59025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: 5918f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::BX; 59225ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: 5938f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::SI; 59425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: 5958f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::DI; 59625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: 5978f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::BP; 59825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: 5998f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::SP; 60025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R8B: case X86::R8W: case X86::R8D: case X86::R8: 60125ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R8W; 60225ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9: 60325ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R9W; 60425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R10B: case X86::R10W: case X86::R10D: case X86::R10: 60525ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R10W; 60625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: 60725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R11W; 60825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12: 60925ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R12W; 61025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: 61125ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R13W; 61225ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14: 61325ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R14W; 61425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: 61525ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R15W; 6168f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng } 617825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson case MVT::i32: 6188f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng switch (Reg) { 619f4d25a2c461f7a64fcc643a6ea2541e87067d036Craig Topper default: llvm_unreachable("Unexpected register"); 62025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: 6218f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::EAX; 62225ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: 6238f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::EDX; 62425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: 6258f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::ECX; 62625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: 6278f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::EBX; 62825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: 6298f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::ESI; 63025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: 6318f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::EDI; 63225ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: 6338f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::EBP; 63425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: 6358f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng return X86::ESP; 63625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R8B: case X86::R8W: case X86::R8D: case X86::R8: 63725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R8D; 63825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9: 63925ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R9D; 64025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R10B: case X86::R10W: case X86::R10D: case X86::R10: 64125ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R10D; 64225ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: 64325ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R11D; 64425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12: 64525ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R12D; 64625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: 64725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R13D; 64825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14: 64925ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R14D; 65025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: 65125ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R15D; 65225ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng } 653825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson case MVT::i64: 65425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng switch (Reg) { 655f4d25a2c461f7a64fcc643a6ea2541e87067d036Craig Topper default: llvm_unreachable("Unexpected register"); 65625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: 65725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::RAX; 65825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: 65925ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::RDX; 66025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: 66125ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::RCX; 66225ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: 66325ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::RBX; 66425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: 66525ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::RSI; 66625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: 66725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::RDI; 66825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: 66925ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::RBP; 67025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: 67125ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::RSP; 67225ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R8B: case X86::R8W: case X86::R8D: case X86::R8: 67325ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R8; 67425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9: 67525ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R9; 67625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R10B: case X86::R10W: case X86::R10D: case X86::R10: 67725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R10; 67825ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: 67925ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R11; 68025ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12: 68125ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R12; 68225ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: 68325ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R13; 68425ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14: 68525ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R14; 68625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: 68725ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng return X86::R15; 6888f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng } 6898f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng } 6908f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng} 6918f7f7125e95e4fce29a4b8acbc88f708e7fae42fEvan Cheng} 692