1/* Copyright (C) 2007-2008 The Android Open Source Project
2**
3** This software is licensed under the terms of the GNU General Public
4** License version 2, as published by the Free Software Foundation, and
5** may be copied, distributed, and modified under those terms.
6**
7** This program is distributed in the hope that it will be useful,
8** but WITHOUT ANY WARRANTY; without even the implied warranty of
9** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10** GNU General Public License for more details.
11*/
12#include "qemu_file.h"
13#include "arm_pic.h"
14#include "goldfish_device.h"
15#include "goldfish_vmem.h"
16#include "android/utils/debug.h"
17
18#define PDEV_BUS_OP_DONE        (0x00)
19#define PDEV_BUS_OP_REMOVE_DEV  (0x04)
20#define PDEV_BUS_OP_ADD_DEV     (0x08)
21
22#define PDEV_BUS_OP_INIT        (0x00)
23
24#define PDEV_BUS_OP             (0x00)
25#define PDEV_BUS_GET_NAME       (0x04)
26#define PDEV_BUS_NAME_LEN       (0x08)
27#define PDEV_BUS_ID             (0x0c)
28#define PDEV_BUS_IO_BASE        (0x10)
29#define PDEV_BUS_IO_SIZE        (0x14)
30#define PDEV_BUS_IRQ            (0x18)
31#define PDEV_BUS_IRQ_COUNT      (0x1c)
32
33struct bus_state {
34    struct goldfish_device dev;
35    struct goldfish_device *current;
36};
37
38qemu_irq *goldfish_pic;
39static struct goldfish_device *first_device;
40static struct goldfish_device *last_device;
41uint32_t goldfish_free_base;
42uint32_t goldfish_free_irq;
43
44void goldfish_device_set_irq(struct goldfish_device *dev, int irq, int level)
45{
46    if(irq >= dev->irq_count)
47        cpu_abort (cpu_single_env, "goldfish_device_set_irq: Bad irq %d >= %d\n", irq, dev->irq_count);
48    else
49        qemu_set_irq(goldfish_pic[dev->irq + irq], level);
50}
51
52int goldfish_add_device_no_io(struct goldfish_device *dev)
53{
54    if(dev->base == 0) {
55        dev->base = goldfish_free_base;
56        goldfish_free_base += dev->size;
57    }
58    if(dev->irq == 0 && dev->irq_count > 0) {
59        dev->irq = goldfish_free_irq;
60        goldfish_free_irq += dev->irq_count;
61#ifdef TARGET_I386
62        /* Make sure that we pass by the reserved IRQs. */
63        while (goldfish_free_irq == GFD_KBD_IRQ ||
64               goldfish_free_irq == GFD_MOUSE_IRQ ||
65               goldfish_free_irq == GFD_ERR_IRQ) {
66            goldfish_free_irq++;
67        }
68#endif
69        if (goldfish_free_irq >= GFD_MAX_IRQ) {
70            derror("Goldfish device has exceeded available IRQ number.");
71            exit(1);
72        }
73    }
74    //printf("goldfish_add_device: %s, base %x %x, irq %d %d\n",
75    //       dev->name, dev->base, dev->size, dev->irq, dev->irq_count);
76    dev->next = NULL;
77    if(last_device) {
78        last_device->next = dev;
79    }
80    else {
81        first_device = dev;
82    }
83    last_device = dev;
84    return 0;
85}
86
87int goldfish_device_add(struct goldfish_device *dev,
88                       CPUReadMemoryFunc **mem_read,
89                       CPUWriteMemoryFunc **mem_write,
90                       void *opaque)
91{
92    int iomemtype;
93    goldfish_add_device_no_io(dev);
94    iomemtype = cpu_register_io_memory(mem_read, mem_write, opaque);
95    cpu_register_physical_memory(dev->base, dev->size, iomemtype);
96    return 0;
97}
98
99static uint32_t goldfish_bus_read(void *opaque, target_phys_addr_t offset)
100{
101    struct bus_state *s = (struct bus_state *)opaque;
102
103    switch (offset) {
104        case PDEV_BUS_OP:
105            if(s->current) {
106                s->current->reported_state = 1;
107                s->current = s->current->next;
108            }
109            else {
110                s->current = first_device;
111            }
112            while(s->current && s->current->reported_state == 1)
113                s->current = s->current->next;
114            if(s->current)
115                return PDEV_BUS_OP_ADD_DEV;
116            else {
117                goldfish_device_set_irq(&s->dev, 0, 0);
118                return PDEV_BUS_OP_DONE;
119            }
120
121        case PDEV_BUS_NAME_LEN:
122            return s->current ? strlen(s->current->name) : 0;
123        case PDEV_BUS_ID:
124            return s->current ? s->current->id : 0;
125        case PDEV_BUS_IO_BASE:
126            return s->current ? s->current->base : 0;
127        case PDEV_BUS_IO_SIZE:
128            return s->current ? s->current->size : 0;
129        case PDEV_BUS_IRQ:
130            return s->current ? s->current->irq : 0;
131        case PDEV_BUS_IRQ_COUNT:
132            return s->current ? s->current->irq_count : 0;
133    default:
134        cpu_abort (cpu_single_env, "goldfish_bus_read: Bad offset %x\n", offset);
135        return 0;
136    }
137}
138
139static void goldfish_bus_op_init(struct bus_state *s)
140{
141    struct goldfish_device *dev = first_device;
142    while(dev) {
143        dev->reported_state = 0;
144        dev = dev->next;
145    }
146    s->current = NULL;
147    goldfish_device_set_irq(&s->dev, 0, first_device != NULL);
148}
149
150static void goldfish_bus_write(void *opaque, target_phys_addr_t offset, uint32_t value)
151{
152    struct bus_state *s = (struct bus_state *)opaque;
153
154    switch(offset) {
155        case PDEV_BUS_OP:
156            switch(value) {
157                case PDEV_BUS_OP_INIT:
158                    goldfish_bus_op_init(s);
159                    break;
160                default:
161                    cpu_abort (cpu_single_env, "goldfish_bus_write: Bad PDEV_BUS_OP value %x\n", value);
162            };
163            break;
164        case PDEV_BUS_GET_NAME:
165            if(s->current) {
166                safe_memory_rw_debug(cpu_single_env, value, (void*)s->current->name, strlen(s->current->name), 1);
167            }
168            break;
169        default:
170            cpu_abort (cpu_single_env, "goldfish_bus_write: Bad offset %x\n", offset);
171    }
172}
173
174static CPUReadMemoryFunc *goldfish_bus_readfn[] = {
175    goldfish_bus_read,
176    goldfish_bus_read,
177    goldfish_bus_read
178};
179
180static CPUWriteMemoryFunc *goldfish_bus_writefn[] = {
181    goldfish_bus_write,
182    goldfish_bus_write,
183    goldfish_bus_write
184};
185
186
187static struct bus_state bus_state = {
188    .dev = {
189        .name = "goldfish_device_bus",
190        .id = -1,
191        .base = 0x10001000,
192        .size = 0x1000,
193        .irq = 1,
194        .irq_count = 1,
195    }
196};
197
198void goldfish_device_init(qemu_irq *pic, uint32_t base, uint32_t size, uint32_t irq, uint32_t irq_count)
199{
200    goldfish_pic = pic;
201    goldfish_free_base = base;
202    goldfish_free_irq = irq;
203}
204
205int goldfish_device_bus_init(uint32_t base, uint32_t irq)
206{
207    bus_state.dev.base = base;
208    bus_state.dev.irq = irq;
209
210    return goldfish_device_add(&bus_state.dev, goldfish_bus_readfn, goldfish_bus_writefn, &bus_state);
211}
212
213