1ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/*---------------------------------------------------------------*/ 2ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/*--- begin host_arm_defs.h ---*/ 3ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/*---------------------------------------------------------------*/ 4ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 5ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* 6ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown This file is part of Valgrind, a dynamic binary instrumentation 7ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown framework. 8ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 9663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Copyright (C) 2004-2012 OpenWorks LLP 10ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown info@open-works.net 11ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 12ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown This program is free software; you can redistribute it and/or 13ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown modify it under the terms of the GNU General Public License as 14ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown published by the Free Software Foundation; either version 2 of the 15ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown License, or (at your option) any later version. 16ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 17ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown This program is distributed in the hope that it will be useful, but 18ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown WITHOUT ANY WARRANTY; without even the implied warranty of 19ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown General Public License for more details. 21ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 22ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown You should have received a copy of the GNU General Public License 23ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown along with this program; if not, write to the Free Software 24ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 25ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 02110-1301, USA. 26ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 27ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown The GNU General Public License is contained in the file COPYING. 28ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown*/ 29ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 30ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown#ifndef __VEX_HOST_ARM_DEFS_H 31ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown#define __VEX_HOST_ARM_DEFS_H 32ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 33ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern UInt arm_hwcaps; 34ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 35ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 36ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* --------- Registers. --------- */ 37ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 38ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* The usual HReg abstraction. 39ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown There are 16 general purpose regs. 40ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown*/ 41ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 42ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void ppHRegARM ( HReg ); 43ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 44ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R0 ( void ); 45ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R1 ( void ); 46ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R2 ( void ); 47ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R3 ( void ); 48ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R4 ( void ); 49ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R5 ( void ); 50ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R6 ( void ); 51ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R7 ( void ); 52ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R8 ( void ); 53ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R9 ( void ); 54ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R10 ( void ); 55ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R11 ( void ); 56ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R12 ( void ); 57ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R13 ( void ); 58ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R14 ( void ); 59ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_R15 ( void ); 60ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_D8 ( void ); 61ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_D9 ( void ); 62ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_D10 ( void ); 63ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_D11 ( void ); 64ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_D12 ( void ); 65ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_S26 ( void ); 66ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_S27 ( void ); 67ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_S28 ( void ); 68ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_S29 ( void ); 69ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_S30 ( void ); 70ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_Q8 ( void ); 71ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_Q9 ( void ); 72ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_Q10 ( void ); 73ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_Q11 ( void ); 74ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_Q12 ( void ); 75ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_Q13 ( void ); 76ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_Q14 ( void ); 77ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HReg hregARM_Q15 ( void ); 78ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 79ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* Number of registers used arg passing in function calls */ 80ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown#define ARM_N_ARGREGS 4 /* r0, r1, r2, r3 */ 81ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 82ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 83ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* --------- Condition codes. --------- */ 84ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 85ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 86ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 87ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_EQ = 0, /* equal : Z=1 */ 88ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_NE = 1, /* not equal : Z=0 */ 89ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 90ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_HS = 2, /* >=u (higher or same) : C=1 */ 91ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_LO = 3, /* <u (lower) : C=0 */ 92ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 93ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_MI = 4, /* minus (negative) : N=1 */ 94ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_PL = 5, /* plus (zero or +ve) : N=0 */ 95ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 96ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_VS = 6, /* overflow : V=1 */ 97ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_VC = 7, /* no overflow : V=0 */ 98ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 99ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_HI = 8, /* >u (higher) : C=1 && Z=0 */ 100ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_LS = 9, /* <=u (lower or same) : C=0 || Z=1 */ 101ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 102ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_GE = 10, /* >=s (signed greater or equal) : N=V */ 103ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_LT = 11, /* <s (signed less than) : N!=V */ 104ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 105ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_GT = 12, /* >s (signed greater) : Z=0 && N=V */ 106ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_LE = 13, /* <=s (signed less or equal) : Z=1 || N!=V */ 107ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 108ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_AL = 14, /* always (unconditional) */ 109ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMcc_NV = 15 /* never (basically undefined meaning), deprecated */ 110ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 111ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMCondCode; 112ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 113ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMCondCode ( ARMCondCode ); 114ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 115ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 116ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 117ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* --------- Memory address expressions (amodes). --------- */ 118ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 119ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* --- Addressing Mode 1 --- */ 120ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 121ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 122ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMam1_RI=1, /* reg +/- imm12 */ 123ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMam1_RRS /* reg1 + (reg2 << 0, 1 2 or 3) */ 124ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 125ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAMode1Tag; 126ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 127ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 128ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 129ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAMode1Tag tag; 130ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown union { 131ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 132ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg reg; 133ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Int simm13; /* -4095 .. +4095 */ 134ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } RI; 135ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 136ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg base; 137ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg index; 138ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt shift; /* 0, 1 2 or 3 */ 139ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } RRS; 140ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } ARMam1; 141ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 142ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAMode1; 143ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 144ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMAMode1* ARMAMode1_RI ( HReg reg, Int simm13 ); 145ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMAMode1* ARMAMode1_RRS ( HReg base, HReg index, UInt shift ); 146ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 147ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void ppARMAMode1 ( ARMAMode1* ); 148ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 149ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 150ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* --- Addressing Mode 2 --- */ 151ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 152ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 153ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMam2_RI=3, /* reg +/- imm8 */ 154ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMam2_RR /* reg1 + reg2 */ 155ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 156ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAMode2Tag; 157ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 158ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 159ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 160ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAMode2Tag tag; 161ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown union { 162ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 163ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg reg; 164ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Int simm9; /* -255 .. 255 */ 165ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } RI; 166ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 167ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg base; 168ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg index; 169ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } RR; 170ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } ARMam2; 171ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 172ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAMode2; 173ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 174ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMAMode2* ARMAMode2_RI ( HReg reg, Int simm9 ); 175ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMAMode2* ARMAMode2_RR ( HReg base, HReg index ); 176ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 177ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void ppARMAMode2 ( ARMAMode2* ); 178ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 179ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 180ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* --- Addressing Mode suitable for VFP --- */ 181ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* The simm11 is encoded as 8 bits + 1 sign bit, 182ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown so can only be 0 % 4. */ 183ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 184ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 185ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg reg; 186ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Int simm11; /* -1020, -1016 .. 1016, 1020 */ 187ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 188ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAModeV; 189ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 190ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMAModeV* mkARMAModeV ( HReg reg, Int simm11 ); 191ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 192ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void ppARMAModeV ( ARMAModeV* ); 193ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 194ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* --- Addressing Mode suitable for Neon --- */ 195ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 196ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 197ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMamN_R=5, 198ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMamN_RR 199ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* ... */ 200ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 201ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAModeNTag; 202ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 203ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 204ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 205ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAModeNTag tag; 206ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown union { 207ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 208ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rN; 209ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rM; 210ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } RR; 211ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 212ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rN; 213ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } R; 214ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* ... */ 215ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } ARMamN; 216ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 217ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAModeN; 218ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 219ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMAModeN* mkARMAModeN_RR ( HReg, HReg ); 220ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMAModeN* mkARMAModeN_R ( HReg ); 221ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void ppARMAModeN ( ARMAModeN* ); 222ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 223ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* --------- Reg or imm-8x4 operands --------- */ 224ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* a.k.a (a very restricted form of) Shifter Operand, 225ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown in the ARM parlance. */ 226ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 227ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 228ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 229ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMri84_I84=7, /* imm8 `ror` (2 * imm4) */ 230ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMri84_R /* reg */ 231ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 232ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMRI84Tag; 233ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 234ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 235ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 236ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMRI84Tag tag; 237ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown union { 238ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 239ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UShort imm8; 240ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UShort imm4; 241ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } I84; 242ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 243ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg reg; 244ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } R; 245ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } ARMri84; 246ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 247ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMRI84; 248ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 249ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 ); 250ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMRI84* ARMRI84_R ( HReg ); 251ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 252ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void ppARMRI84 ( ARMRI84* ); 253ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 254ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 255ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* --------- Reg or imm5 operands --------- */ 256ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 257ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 258ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMri5_I5=9, /* imm5, 1 .. 31 only (no zero!) */ 259ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMri5_R /* reg */ 260ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 261ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMRI5Tag; 262ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 263ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 264ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 265ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMRI5Tag tag; 266ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown union { 267ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 268ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt imm5; 269ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } I5; 270ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 271ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg reg; 272ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } R; 273ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } ARMri5; 274ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 275ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMRI5; 276ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 277ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMRI5* ARMRI5_I5 ( UInt imm5 ); 278ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMRI5* ARMRI5_R ( HReg ); 279ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 280ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void ppARMRI5 ( ARMRI5* ); 281ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 282ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* -------- Neon Immediate operand -------- */ 283ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 284ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* imm8 = abcdefgh, B = NOT(b); 285ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 286ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntype | value (64bit binary) 287ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown-----+------------------------------------------------------------------------- 288ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 0 | 00000000 00000000 00000000 abcdefgh 00000000 00000000 00000000 abcdefgh 289ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 1 | 00000000 00000000 abcdefgh 00000000 00000000 00000000 abcdefgh 00000000 290ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 2 | 00000000 abcdefgh 00000000 00000000 00000000 abcdefgh 00000000 00000000 291ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 3 | abcdefgh 00000000 00000000 00000000 abcdefgh 00000000 00000000 00000000 292ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 4 | 00000000 abcdefgh 00000000 abcdefgh 00000000 abcdefgh 00000000 abcdefgh 293ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 5 | abcdefgh 00000000 abcdefgh 00000000 abcdefgh 00000000 abcdefgh 00000000 294ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 6 | abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh 295ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 7 | 00000000 00000000 abcdefgh 11111111 00000000 00000000 abcdefgh 11111111 296ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 8 | 00000000 abcdefgh 11111111 11111111 00000000 abcdefgh 11111111 11111111 297ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 9 | aaaaaaaa bbbbbbbb cccccccc dddddddd eeeeeeee ffffffff gggggggg hhhhhhhh 298ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 10 | aBbbbbbc defgh000 00000000 00000000 aBbbbbbc defgh000 00000000 00000000 299ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown-----+------------------------------------------------------------------------- 300ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 301ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff BrownType 10 is: 302ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown (-1)^S * 2^exp * mantissa 303ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownwhere S = a, exp = UInt(B:c:d) - 3, mantissa = (16 + UInt(e:f:g:h)) / 16 304ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown*/ 305ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 306ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 307ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 308ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt type; 309ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt imm8; 310ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 311ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNImm; 312ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 313ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 ); 314ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ULong ARMNImm_to_Imm64 ( ARMNImm* ); 315ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMNImm* Imm64_to_ARMNImm ( ULong ); 316ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 317ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void ppARMNImm ( ARMNImm* ); 318ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 319ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* ------ Neon Register or Scalar Operand ------ */ 320ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 321ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 322ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 323ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNRS_Reg=11, 324ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNRS_Scalar 325ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 326ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNRS_tag; 327ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 328ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 329ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 330ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNRS_tag tag; 331ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg reg; 332ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt index; 333ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 334ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNRS; 335ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 336ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMNRS* mkARMNRS(ARMNRS_tag, HReg reg, UInt index); 337ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void ppARMNRS ( ARMNRS* ); 338ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 339ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* --------- Instructions. --------- */ 340ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 341ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* --------- */ 342ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 343ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 344ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMalu_ADD=20, /* plain 32-bit add */ 345ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMalu_ADDS, /* 32-bit add, and set the flags */ 346ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMalu_ADC, /* 32-bit add with carry */ 347ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMalu_SUB, /* plain 32-bit subtract */ 348ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMalu_SUBS, /* 32-bit subtract, and set the flags */ 349ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMalu_SBC, /* 32-bit subtract with carry */ 350ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMalu_AND, 351ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMalu_BIC, 352ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMalu_OR, 353ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMalu_XOR 354ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 355ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAluOp; 356ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 357ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMAluOp ( ARMAluOp op ); 358ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 359ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 360ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 361ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 362ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMsh_SHL=40, 363ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMsh_SHR, 364ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMsh_SAR 365ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 366ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMShiftOp; 367ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 368ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMShiftOp ( ARMShiftOp op ); 369ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 370ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 371ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 372ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 373ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMun_NEG=50, 374ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMun_NOT, 375ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMun_CLZ 376ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 377ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMUnaryOp; 378ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 379ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMUnaryOp ( ARMUnaryOp op ); 380ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 381ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 382ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 383ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 384ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMmul_PLAIN=60, 385ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMmul_ZX, 3866d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng ARMmul_SX, 3876d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng ARMdiv_S, 3886d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng ARMdiv_U 389ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 3906d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng ARMMulDivOp; 391ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 3926d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Chengextern HChar* showARMMulOp ( ARMMulDivOp op ); 393ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 3946d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Chengextern HChar* showARMDivOp ( ARMMulDivOp op ); 395ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 396ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 397ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 398ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMvfp_ADD=70, 399ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMvfp_SUB, 400ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMvfp_MUL, 401ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMvfp_DIV 402ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 403ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMVfpOp; 404ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 405ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMVfpOp ( ARMVfpOp op ); 406ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 407ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 408ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 409ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 410ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMvfpu_COPY=80, 411ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMvfpu_NEG, 412ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMvfpu_ABS, 413ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMvfpu_SQRT 414ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 415ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMVfpUnaryOp; 416ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 417ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMVfpUnaryOp ( ARMVfpUnaryOp op ); 418ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 419ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 420ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 421ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VAND=90, 422ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VORR, 423ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VXOR, 424ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VADD, 425ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VADDFP, 426ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VRHADDS, 427ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VRHADDU, 428ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VPADDFP, 429ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VABDFP, 430ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VSUB, 431ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VSUBFP, 432ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VMAXU, 433ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VMAXS, 434ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VMAXF, 435ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VMINU, 436ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VMINS, 437ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VMINF, 438ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VQADDU, 439ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VQADDS, 440ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VQSUBU, 441ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VQSUBS, 442ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCGTU, 443ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCGTS, 444ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCGEU, 445ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCGES, 446ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCGTF, 447ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCGEF, 448ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCEQ, 449ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCEQF, 450ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VEXT, 451ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VMUL, 452ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VMULFP, 453ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VMULLU, 454ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VMULLS, 455ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VMULP, 456ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VMULLP, 457ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VQDMULH, 458ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VQRDMULH, 459ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VPADD, 460ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VPMINU, 461ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VPMINS, 462ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VPMINF, 463ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VPMAXU, 464ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VPMAXS, 465ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VPMAXF, 466ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VTBL, 467ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VQDMULL, 468ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VRECPS, 469ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VRSQRTS, 470ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* ... */ 471ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 472ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNeonBinOp; 473ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 474ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 475ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 476ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VSHL=150, 477ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VSAL, /* Yah, not SAR but SAL */ 478ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VQSHL, 479ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VQSAL 480ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 481ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNeonShiftOp; 482ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 483ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 484ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 485ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_COPY=160, 486ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_COPYLU, 487ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_COPYLS, 488ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_COPYN, 489ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_COPYQNSS, 490ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_COPYQNUS, 491ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_COPYQNUU, 492ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_NOT, 493ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_EQZ, 494ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_DUP, 495ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_PADDLS, 496ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_PADDLU, 497ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_CNT, 498ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_CLZ, 499ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_CLS, 500ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCVTxFPxINT, 501ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VQSHLNSS, 502ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VQSHLNUU, 503ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VQSHLNUS, 504ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCVTFtoU, 505ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCVTFtoS, 506ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCVTUtoF, 507ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCVTStoF, 508ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCVTFtoFixedU, 509ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCVTFtoFixedS, 510ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCVTFixedUtoF, 511ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCVTFixedStoF, 512ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCVTF16toF32, 513ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VCVTF32toF16, 514ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_REV16, 515ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_REV32, 516ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_REV64, 517ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_ABS, 518ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VNEGF, 519ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VRECIP, 520ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VRECIPF, 521ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VABSFP, 522ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VRSQRTEFP, 523ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VRSQRTE 524ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* ... */ 525ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 526ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNeonUnOp; 527ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 528ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 529ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 530ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_SETELEM=200, 531ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_GETELEMU, 532ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_GETELEMS, 533ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_VDUP, 534ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 535ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNeonUnOpS; 536ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 537ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 538ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 539ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_TRN=210, 540ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_ZIP, 541ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMneon_UZP 542ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* ... */ 543ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 544ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNeonDualOp; 545ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 546ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMNeonBinOp ( ARMNeonBinOp op ); 547ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMNeonUnOp ( ARMNeonUnOp op ); 548ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMNeonUnOpS ( ARMNeonUnOpS op ); 549ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMNeonShiftOp ( ARMNeonShiftOp op ); 550ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMNeonDualOp ( ARMNeonDualOp op ); 551ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMNeonBinOpDataType ( ARMNeonBinOp op ); 552ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMNeonUnOpDataType ( ARMNeonUnOp op ); 553ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMNeonUnOpSDataType ( ARMNeonUnOpS op ); 554ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMNeonShiftOpDataType ( ARMNeonShiftOp op ); 555ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern HChar* showARMNeonDualOpDataType ( ARMNeonDualOp op ); 556ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 557ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 558ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown enum { 559ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* baseline */ 560ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_Alu=220, 561ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_Shift, 562ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_Unary, 563ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_CmpOrTst, 564ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_Mov, 565ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_Imm32, 566ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_LdSt32, 567ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_LdSt16, 568ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_LdSt8U, 569ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_Ld8S, 570663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMin_XDirect, /* direct transfer to GA */ 571663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMin_XIndir, /* indirect transfer to GA */ 572663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMin_XAssisted, /* assisted transfer to GA */ 573ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_CMov, 574ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_Call, 575ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_Mul, 5766d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng ARMin_Div, 577ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_LdrEX, 578ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_StrEX, 579ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* vfp */ 580ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_VLdStD, 581ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_VLdStS, 582ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_VAluD, 583ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_VAluS, 584ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_VUnaryD, 585ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_VUnaryS, 586ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_VCmpD, 587ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_VCMovD, 588ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_VCMovS, 589ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_VCvtSD, 590ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_VXferD, 591ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_VXferS, 592ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_VCvtID, 593ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_FPSCR, 594ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_MFence, 595b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanov ARMin_CLREX, 596ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* Neon */ 597ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_NLdStQ, 598ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_NLdStD, 599ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_NUnary, 600ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_NUnaryS, 601ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_NDual, 602ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_NBinary, 603ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_NBinaryS, 604ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_NShift, 605ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_NeonImm, 606ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMin_NCMovQ, 607ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* This is not a NEON instruction. Actually there is no corresponding 608ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown instruction in ARM instruction set at all. We need this one to 609ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown generate spill/reload of 128-bit registers since current register 610ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown allocator demands them to consist of no more than two instructions. 611ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown We will split this instruction into 2 or 3 ARM instructions on the 612ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown emiting phase. 613ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown NOTE: source and destination registers should be different! */ 614663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMin_Add32, 615663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMin_EvCheck, /* Event check */ 616663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMin_ProfInc /* 64-bit profile counter increment */ 617ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 618ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMInstrTag; 619ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 620ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* Destinations are on the LEFT (first operand) */ 621ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 622ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Browntypedef 623ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 624ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMInstrTag tag; 625ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown union { 626ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* ADD/SUB/AND/OR/XOR, vanilla ALU op */ 627ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 628ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAluOp op; 629ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 630ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg argL; 631ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMRI84* argR; 632ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } Alu; 633ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* SHL/SHR/SAR, 2nd arg is reg or imm */ 634ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 635ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMShiftOp op; 636ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 637ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg argL; 638ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMRI5* argR; 639ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } Shift; 640ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* NOT/NEG/CLZ */ 641ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 642ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMUnaryOp op; 643ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 644ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg src; 645ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } Unary; 646ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* CMP/TST; subtract/and, discard result, set NZCV */ 647ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 648ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool isCmp; 649ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg argL; 650ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMRI84* argR; 651ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } CmpOrTst; 652ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* MOV dst, src -- reg-reg (or reg-imm8x4) move */ 653ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 654ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 655ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMRI84* src; 656ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } Mov; 657ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* Pseudo-insn; make a 32-bit immediate */ 658ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 659ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 660ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt imm32; 661ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } Imm32; 662ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 32-bit load or store */ 663ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 664ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool isLoad; 665ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rD; 666ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAMode1* amode; 667ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } LdSt32; 668ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 16-bit load or store */ 669ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 670ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool isLoad; 671ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool signedLoad; 672ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rD; 673ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAMode2* amode; 674ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } LdSt16; 675ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 8-bit (unsigned) load or store */ 676ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 677ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool isLoad; 678ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rD; 679ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAMode1* amode; 680ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } LdSt8U; 681ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 8-bit signed load */ 682ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 683ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rD; 684ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAMode2* amode; 685ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } Ld8S; 686663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng /* Update the guest R15T value, then exit requesting to chain 687663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng to it. May be conditional. Urr, use of Addr32 implicitly 688663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng assumes that wordsize(guest) == wordsize(host). */ 689663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng struct { 690663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Addr32 dstGA; /* next guest address */ 691663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMAMode1* amR15T; /* amode in guest state for R15T */ 692663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMCondCode cond; /* can be ARMcc_AL */ 693663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Bool toFastEP; /* chain to the slow or fast point? */ 694663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng } XDirect; 695663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng /* Boring transfer to a guest address not known at JIT time. 696663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Not chainable. May be conditional. */ 697ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 698663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng HReg dstGA; 699663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMAMode1* amR15T; 700663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMCondCode cond; /* can be ARMcc_AL */ 701663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng } XIndir; 702663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng /* Assisted transfer to a guest address, most general case. 703663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Not chainable. May be conditional. */ 704663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng struct { 705663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng HReg dstGA; 706663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMAMode1* amR15T; 707663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMCondCode cond; /* can be ARMcc_AL */ 708ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown IRJumpKind jk; 709663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng } XAssisted; 710ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* Mov src to dst on the given condition, which may not 711ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown be ARMcc_AL. */ 712ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 713ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMCondCode cond; 714ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 715ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMRI84* src; 716ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } CMov; 717ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* Pseudo-insn. Call target (an absolute address), on given 718ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown condition (which could be ARMcc_AL). */ 719ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 720ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMCondCode cond; 721ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HWord target; 722ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Int nArgRegs; /* # regs carrying args: 0 .. 4 */ 723ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } Call; 724ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* (PLAIN) 32 * 32 -> 32: r0 = r2 * r3 725ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown (ZX) 32 *u 32 -> 64: r1:r0 = r2 *u r3 726ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown (SX) 32 *s 32 -> 64: r1:r0 = r2 *s r3 727ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Why hardwired registers? Because the ARM ARM specifies 728ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown (eg for straight MUL) the result (Rd) and the left arg (Rm) 729ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown may not be the same register. That's not a constraint we 730ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown can enforce in the register allocator (without mucho extra 731ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown complexity). Hence hardwire it. At least using caller-saves 732ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown registers, which are less likely to be in use. */ 733ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 7346d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng ARMMulDivOp op; 735ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } Mul; 7366d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng /* ARMdiv_S/ARMdiv_U: signed/unsigned integer divides, respectively. */ 7376d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng struct { 7386d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng ARMMulDivOp op; 7396d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng HReg dst; 7406d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng HReg argL; 7416d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng HReg argR; 7426d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng } Div; 743b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanov /* LDREX{,H,B} r2, [r4] and 744b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanov LDREXD r2, r3, [r4] (on LE hosts, transferred value is r3:r2) 745ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Again, hardwired registers since this is not performance 746ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown critical, and there are possibly constraints on the 747ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown registers that we can't express in the register allocator.*/ 748ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 749b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanov Int szB; /* 1, 2, 4 or 8 */ 750ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } LdrEX; 751b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanov /* STREX{,H,B} r0, r2, [r4] and 752b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanov STREXD r0, r2, r3, [r4] (on LE hosts, transferred value is r3:r2) 753b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanov r0 = SC( [r4] = r2 ) (8, 16, 32 bit transfers) 754b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanov r0 = SC( [r4] = r3:r2) (64 bit transfers) 755ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Ditto comment re fixed registers. */ 756ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 757b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanov Int szB; /* 1, 2, 4 or 8 */ 758ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } StrEX; 759ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* VFP INSTRUCTIONS */ 760ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 64-bit Fp load/store */ 761ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 762ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool isLoad; 763ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dD; 764ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAModeV* amode; 765ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } VLdStD; 766ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 32-bit Fp load/store */ 767ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 768ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool isLoad; 769ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg fD; 770ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAModeV* amode; 771ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } VLdStS; 772ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 64-bit FP binary arithmetic */ 773ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 774ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMVfpOp op; 775ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 776ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg argL; 777ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg argR; 778ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } VAluD; 779ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 32-bit FP binary arithmetic */ 780ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 781ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMVfpOp op; 782ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 783ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg argL; 784ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg argR; 785ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } VAluS; 786ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 64-bit FP unary, also reg-reg move */ 787ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 788ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMVfpUnaryOp op; 789ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 790ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg src; 791ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } VUnaryD; 792ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 32-bit FP unary, also reg-reg move */ 793ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 794ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMVfpUnaryOp op; 795ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 796ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg src; 797ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } VUnaryS; 798ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 64-bit FP compare and move results to CPSR (FCMPD;FMSTAT) */ 799ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 800ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg argL; 801ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg argR; 802ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } VCmpD; 803ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 64-bit FP mov src to dst on the given condition, which may 804ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown not be ARMcc_AL. */ 805ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 806ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMCondCode cond; 807ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 808ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg src; 809ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } VCMovD; 810ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 32-bit FP mov src to dst on the given condition, which may 811ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown not be ARMcc_AL. */ 812ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 813ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMCondCode cond; 814ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 815ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg src; 816ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } VCMovS; 817ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* Convert between 32-bit and 64-bit FP values (both ways). 818ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown (FCVTSD, FCVTDS) */ 819ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 820ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool sToD; /* True: F32->F64. False: F64->F32 */ 821ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 822ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg src; 823ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } VCvtSD; 824ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* Transfer a VFP D reg to/from two integer registers (VMOV) */ 825ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 826ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool toD; 827ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dD; 828ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rHi; 829ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rLo; 830ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } VXferD; 831ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* Transfer a VFP S reg to/from an integer register (VMOV) */ 832ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 833ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool toS; 834ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg fD; 835ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rLo; 836ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } VXferS; 837ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* Convert between 32-bit ints and 64-bit FP values (both ways 838ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown and both signednesses). (FSITOD, FUITOD, FTOSID, FTOUID) */ 839ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 840ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool iToD; /* True: I32->F64. False: F64->I32 */ 841ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool syned; /* True: I32 is signed. False: I32 is unsigned */ 842ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 843ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg src; 844ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } VCvtID; 845ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* Move a 32-bit value to/from the FPSCR (FMXR, FMRX) */ 846ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 847ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool toFPSCR; 848ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg iReg; 849ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } FPSCR; 850ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* Mem fence. An insn which fences all loads and stores as 851ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown much as possible before continuing. On ARM we emit the 852ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown sequence 853ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown mcr 15,0,r0,c7,c10,4 (DSB) 854ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown mcr 15,0,r0,c7,c10,5 (DMB) 855ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown mcr 15,0,r0,c7,c5,4 (ISB) 856ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown which is probably total overkill, but better safe than 857ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown sorry. 858ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown */ 859ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 860ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } MFence; 861b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanov /* A CLREX instruction. */ 862b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanov struct { 863b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanov } CLREX; 864ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* Neon data processing instruction: 3 registers of the same 865ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown length */ 866ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 867ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNeonBinOp op; 868ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 869ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg argL; 870ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg argR; 871ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt size; 872ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool Q; 873ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } NBinary; 874ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 875ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNeonBinOp op; 876ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNRS* dst; 877ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNRS* argL; 878ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNRS* argR; 879ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt size; 880ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool Q; 881ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } NBinaryS; 882ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 883ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNeonShiftOp op; 884ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 885ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg argL; 886ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg argR; 887ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt size; 888ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool Q; 889ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } NShift; 890ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 891ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool isLoad; 892ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dQ; 893ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAModeN *amode; 894ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } NLdStQ; 895ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 896ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool isLoad; 897ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dD; 898ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMAModeN *amode; 899ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } NLdStD; 900ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 901ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNeonUnOpS op; 902ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNRS* dst; 903ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNRS* src; 904ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt size; 905ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool Q; 906ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } NUnaryS; 907ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 908ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNeonUnOp op; 909ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 910ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg src; 911ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt size; 912ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool Q; 913ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } NUnary; 914ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* Takes two arguments and modifies them both. */ 915ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 916ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNeonDualOp op; 917ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg arg1; 918ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg arg2; 919ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt size; 920ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown Bool Q; 921ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } NDual; 922ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 923ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 924ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMNImm* imm; 925ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } NeonImm; 926ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* 128-bit Neon move src to dst on the given condition, which 927ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown may not be ARMcc_AL. */ 928ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 929ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMCondCode cond; 930ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst; 931ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg src; 932ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } NCMovQ; 933ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown struct { 934ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown /* Note: rD != rN */ 935ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rD; 936ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rN; 937ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt imm32; 938ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } Add32; 939663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng struct { 940663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMAMode1* amCounter; 941663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMAMode1* amFailAddr; 942663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng } EvCheck; 943663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng struct { 944663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng /* No fields. The address of the counter to inc is 945663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng installed later, post-translation, by patching it in, 946663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng as it is not known at translation time. */ 947663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng } ProfInc; 948ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } ARMin; 949ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown } 950ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown ARMInstr; 951ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 952ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 953ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_Alu ( ARMAluOp, HReg, HReg, ARMRI84* ); 954ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_Shift ( ARMShiftOp, HReg, HReg, ARMRI5* ); 955ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_Unary ( ARMUnaryOp, HReg, HReg ); 956ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_CmpOrTst ( Bool isCmp, HReg, ARMRI84* ); 957ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_Mov ( HReg, ARMRI84* ); 958ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_Imm32 ( HReg, UInt ); 959ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_LdSt32 ( Bool isLoad, HReg, ARMAMode1* ); 960ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_LdSt16 ( Bool isLoad, Bool signedLoad, 961ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg, ARMAMode2* ); 962ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_LdSt8U ( Bool isLoad, HReg, ARMAMode1* ); 963ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_Ld8S ( HReg, ARMAMode2* ); 964663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern ARMInstr* ARMInstr_XDirect ( Addr32 dstGA, ARMAMode1* amR15T, 965663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMCondCode cond, Bool toFastEP ); 966663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern ARMInstr* ARMInstr_XIndir ( HReg dstGA, ARMAMode1* amR15T, 967663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMCondCode cond ); 968663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern ARMInstr* ARMInstr_XAssisted ( HReg dstGA, ARMAMode1* amR15T, 969663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMCondCode cond, IRJumpKind jk ); 970ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_CMov ( ARMCondCode, HReg dst, ARMRI84* src ); 971ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_Call ( ARMCondCode, HWord, Int nArgRegs ); 9726d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Chengextern ARMInstr* ARMInstr_Mul ( ARMMulDivOp op ); 9736d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Chengextern ARMInstr* ARMInstr_Div ( ARMMulDivOp op, HReg dst, HReg argL, 9746d67c5925dfb5eae9a15380403fa2a81e18a91eaBen Cheng HReg argR ); 975ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_LdrEX ( Int szB ); 976ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_StrEX ( Int szB ); 977ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_VLdStD ( Bool isLoad, HReg, ARMAModeV* ); 978ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_VLdStS ( Bool isLoad, HReg, ARMAModeV* ); 979ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_VAluD ( ARMVfpOp op, HReg, HReg, HReg ); 980ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_VAluS ( ARMVfpOp op, HReg, HReg, HReg ); 981ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_VUnaryD ( ARMVfpUnaryOp, HReg dst, HReg src ); 982ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_VUnaryS ( ARMVfpUnaryOp, HReg dst, HReg src ); 983ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_VCmpD ( HReg argL, HReg argR ); 984ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_VCMovD ( ARMCondCode, HReg dst, HReg src ); 985ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_VCMovS ( ARMCondCode, HReg dst, HReg src ); 986ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_VCvtSD ( Bool sToD, HReg dst, HReg src ); 987ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_VXferD ( Bool toD, HReg dD, HReg rHi, HReg rLo ); 988ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_VXferS ( Bool toS, HReg fD, HReg rLo ); 989ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_VCvtID ( Bool iToD, Bool syned, 990ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg dst, HReg src ); 991ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_FPSCR ( Bool toFPSCR, HReg iReg ); 992ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_MFence ( void ); 993b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanovextern ARMInstr* ARMInstr_CLREX ( void ); 994ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_NLdStQ ( Bool isLoad, HReg, ARMAModeN* ); 995ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_NLdStD ( Bool isLoad, HReg, ARMAModeN* ); 996ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_NUnary ( ARMNeonUnOp, HReg, HReg, UInt, Bool ); 997b32f58018498ea2225959b0ba11c18f0c433deefEvgeniy Stepanovextern ARMInstr* ARMInstr_NUnaryS ( ARMNeonUnOpS, ARMNRS*, ARMNRS*, 998ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt, Bool ); 999ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_NDual ( ARMNeonDualOp, HReg, HReg, UInt, Bool ); 1000ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_NBinary ( ARMNeonBinOp, HReg, HReg, HReg, 1001ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt, Bool ); 1002ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_NShift ( ARMNeonShiftOp, HReg, HReg, HReg, 1003ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown UInt, Bool ); 1004ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_NeonImm ( HReg, ARMNImm* ); 1005ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_NCMovQ ( ARMCondCode, HReg, HReg ); 1006ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern ARMInstr* ARMInstr_Add32 ( HReg rD, HReg rN, UInt imm32 ); 1007663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern ARMInstr* ARMInstr_EvCheck ( ARMAMode1* amCounter, 1008663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ARMAMode1* amFailAddr ); 1009663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern ARMInstr* ARMInstr_ProfInc ( void ); 1010ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 1011ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void ppARMInstr ( ARMInstr* ); 1012ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 1013ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 1014ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/* Some functions that insulate the register allocator from details 1015ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown of the underlying instruction set. */ 1016ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void getRegUsage_ARMInstr ( HRegUsage*, ARMInstr*, Bool ); 1017ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void mapRegs_ARMInstr ( HRegRemap*, ARMInstr*, Bool ); 1018ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern Bool isMove_ARMInstr ( ARMInstr*, HReg*, HReg* ); 1019663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern Int emit_ARMInstr ( /*MB_MOD*/Bool* is_profInc, 1020663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng UChar* buf, Int nbuf, ARMInstr* i, 1021663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Bool mode64, 1022663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng void* disp_cp_chain_me_to_slowEP, 1023663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng void* disp_cp_chain_me_to_fastEP, 1024663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng void* disp_cp_xindir, 1025663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng void* disp_cp_xassisted ); 1026ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 1027ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void genSpill_ARM ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, 1028ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rreg, Int offset, Bool ); 1029ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void genReload_ARM ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, 1030ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown HReg rreg, Int offset, Bool ); 1031ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 1032ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brownextern void getAllocableRegs_ARM ( Int*, HReg** ); 1033663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern HInstrArray* iselSB_ARM ( IRSB*, 1034663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng VexArch, 1035663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng VexArchInfo*, 1036663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng VexAbiInfo*, 1037663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Int offs_Host_EvC_Counter, 1038663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Int offs_Host_EvC_FailAddr, 1039663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Bool chainingAllowed, 1040663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Bool addProfInc, 1041663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng Addr64 max_ga ); 1042663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 1043663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/* How big is an event check? This is kind of a kludge because it 1044663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng depends on the offsets of host_EvC_FAILADDR and 1045663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng host_EvC_COUNTER. */ 1046663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern Int evCheckSzB_ARM ( void ); 1047663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 1048663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/* Perform a chaining and unchaining of an XDirect jump. */ 1049663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern VexInvalRange chainXDirect_ARM ( void* place_to_chain, 1050663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng void* disp_cp_chain_me_EXPECTED, 1051663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng void* place_to_jump_to ); 1052663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 1053663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern VexInvalRange unchainXDirect_ARM ( void* place_to_unchain, 1054663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng void* place_to_jump_to_EXPECTED, 1055663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng void* disp_cp_chain_me ); 1056663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 1057663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng/* Patch the counter location into an existing ProfInc point. */ 1058663860b1408516d02ebfcb3a9999a134e6cfb223Ben Chengextern VexInvalRange patchProfInc_ARM ( void* place_to_patch, 1059663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng ULong* location_of_counter ); 1060663860b1408516d02ebfcb3a9999a134e6cfb223Ben Cheng 1061ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 1062ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown#endif /* ndef __VEX_HOST_ARM_DEFS_H */ 1063ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown 1064ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/*---------------------------------------------------------------*/ 1065ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/*--- end host_arm_defs.h ---*/ 1066ed07e00d438c74b7a23c01bfffde77e3968305e4Jeff Brown/*---------------------------------------------------------------*/ 1067