| 87773c318fcee853fb34a80a10c4347d523bdafb |
01-Aug-2013 |
Tim Northover <tnorthover@apple.com> |
AArch64: add initial NEON support
Patch by Ana Pazos.
- Completed implementation of instruction formats:
AdvSIMD three same
AdvSIMD modified immediate
AdvSIMD scalar pairwise
- Completed implementation of instruction classes
(some of the instructions in these classes
belong to yet unfinished instruction formats):
Vector Arithmetic
Vector Immediate
Vector Pairwise Arithmetic
- Initial implementation of instruction formats:
AdvSIMD scalar two-reg misc
AdvSIMD scalar three same
- Intial implementation of instruction class:
Scalar Arithmetic
- Initial clang changes to support arm v8 intrinsics.
Note: no clang changes for scalar intrinsics function name mangling yet.
- Comprehensive test cases for added instructions
To verify auto codegen, encoding, decoding, diagnosis, intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187567 91177308-0d34-0410-b5e6-96231b3b80d8
asic-a64-diagnostics.s
asic-a64-instructions.s
eon-aba-abd.s
eon-add-pairwise.s
eon-add-sub-instructions.s
eon-bitwise-instructions.s
eon-compare-instructions.s
eon-diagnostics.s
eon-facge-facgt.s
eon-frsqrt-frecp.s
eon-halving-add-sub.s
eon-max-min-pairwise.s
eon-max-min.s
eon-mla-mls-instructions.s
eon-mov.s
eon-mul-div-instructions.s
eon-rounding-halving-add.s
eon-rounding-shift.s
eon-saturating-add-sub.s
eon-saturating-rounding-shift.s
eon-saturating-shift.s
eon-shift.s
oneon-diagnostics.s
|
| 73477b9f32da6488f2883f33fd17fa0de61f2bd1 |
03-Jul-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Prefix failing commands with not to make clear they are expected to fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185554 91177308-0d34-0410-b5e6-96231b3b80d8
lf-objdump.s
icv3-regs-diagnostics.s
race-regs-diagnostics.s
|
| 7130a9561787cf14d5349d22cde1e0b3a4d5c21d |
23-Jun-2013 |
Tim Northover <tnorthover@apple.com> |
AArch64: fix overzealous NEXTing for Windows testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184667 91177308-0d34-0410-b5e6-96231b3b80d8
ls-relocs.s
|
| 7338de37a802970857079b5a532c5dd50d0a6d5d |
17-Jun-2013 |
Tim Northover <tnorthover@apple.com> |
AArch64: print relocation addends if present on AArch64
llvm-objdump should provide some way of printing out the addends present in the
.rela sections for debugging purposes if nothing else.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184072 91177308-0d34-0410-b5e6-96231b3b80d8
lf-reloc-addend.s
|
| 7486d92a6c949a193bb75c0ffa0170eeb2fabb80 |
30-May-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Change how we iterate over relocations on ELF.
For COFF and MachO, sections semantically have relocations that apply to them.
That is not the case on ELF.
In relocatable objects (.o), a section with relocations in ELF has offsets to
another section where the relocations should be applied.
In dynamic objects and executables, relocations don't have an offset, they have
a virtual address. The section sh_info may or may not point to another section,
but that is not actually used for resolving the relocations.
This patch exposes that in the ObjectFile API. It has the following advantages:
* Most (all?) clients can handle this more efficiently. They will normally walk
all relocations, so doing an effort to iterate in a particular order doesn't
save time.
* llvm-readobj now prints relocations in the same way the native readelf does.
* probably most important, relocations that don't point to any section are now
visible. This is the case of relocations in the rela.dyn section. See the
updated relocation-executable.test for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182908 91177308-0d34-0410-b5e6-96231b3b80d8
lf-globaladdress.ll
lf-reloc-addsubimm.s
lf-reloc-condbr.s
lf-reloc-ldrlit.s
lf-reloc-ldstunsimm.s
lf-reloc-movw.s
lf-reloc-pcreladdressing.s
lf-reloc-tstb.s
lf-reloc-uncondbrimm.s
ls-relocs.s
|
| b6ad2bd51195f7675db0f71c5826a12a2b7090fc |
12-Apr-2013 |
Tim Northover <Tim.Northover@arm.com> |
AArch64: use full triple for ELF tests
These tests rely specifically on the names of ELF relocations, let alone any
other detail. There's no way they'd work if LLVM was emitting something else by
default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179376 91177308-0d34-0410-b5e6-96231b3b80d8
lf-globaladdress.ll
lf-objdump.s
lf-reloc-addsubimm.s
lf-reloc-condbr.s
lf-reloc-ldrlit.s
lf-reloc-ldstunsimm.s
lf-reloc-movw.s
lf-reloc-pcreladdressing.s
lf-reloc-tstb.s
lf-reloc-uncondbrimm.s
ls-relocs.s
|
| 15e883787f38b7c424e9de4ec8485ad9e32603b0 |
12-Apr-2013 |
Tim Northover <Tim.Northover@arm.com> |
AArch64: remove over-zealous use of CHECK-NEXT
It turns out some platforms (e.g. Windows) lay out their llvm-mc slightly
differently with extra newlines; there was no real reason for the test lines to
be consecutive, so this relaxes the FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179375 91177308-0d34-0410-b5e6-96231b3b80d8
ls-relocs.s
|
| f89da7210b09a0a0f7c9ee216cd54dca03c6b64a |
12-Apr-2013 |
Nico Rieck <nico.rieck@gmail.com> |
Replace coff-/elf-dump with llvm-readobj
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179361 91177308-0d34-0410-b5e6-96231b3b80d8
lf-globaladdress.ll
lf-reloc-addsubimm.s
lf-reloc-condbr.s
lf-reloc-ldrlit.s
lf-reloc-ldstunsimm.s
lf-reloc-movw.s
lf-reloc-pcreladdressing.s
lf-reloc-tstb.s
lf-reloc-uncondbrimm.s
ls-relocs.s
|
| 4385f5dfced4e14bc59dfedb1f75116c0aabbc36 |
03-Apr-2013 |
Tim Northover <Tim.Northover@arm.com> |
AArch64: implement ETMv4 trace system registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178637 91177308-0d34-0410-b5e6-96231b3b80d8
race-regs-diagnostics.s
race-regs.s
|
| 42a1b2f0b196633c0327801e810fc98849a00c47 |
28-Mar-2013 |
Tim Northover <Tim.Northover@arm.com> |
AArch64: implement GICv3 system registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178236 91177308-0d34-0410-b5e6-96231b3b80d8
icv3-regs-diagnostics.s
icv3-regs.s
|
| c37aa995e3e55c1bdb17a73c3160edf0426b1a1a |
11-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
AArch64: Undo change to how test was run
This broke on Windows, presumably due to interleaving of output streams.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174873 91177308-0d34-0410-b5e6-96231b3b80d8
asic-a64-diagnostics.s
|
| b5161863866b64498a7faa20e612c55de4bca6f8 |
11-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Make use of DiagnosticType to provide better AArch64 diagnostics.
This gives a DiagnosticType to all AsmOperands in sight. This replaces all
"invalid operand" diagnostics with something more specific. The messages given
should still be sufficiently vague that they're not usually actively misleading
when LLVM guesses your instruction incorrectly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174871 91177308-0d34-0410-b5e6-96231b3b80d8
asic-a64-diagnostics.s
|
| cbff068398a84ed488b7fdab5fea8e05500d385a |
06-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Add AArch64 CRC32 instructions
These instructions are a late addition to the architecture, and may
yet end up behind an optional attribute, but for now they're available
at all times.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174496 91177308-0d34-0410-b5e6-96231b3b80d8
asic-a64-instructions.s
|
| 9e3b31345f0d17b757e183a8384db92616256926 |
06-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Add icache prefetch operations to AArch64
This adds hints to the various "prfm" instructions so that they can
affect the instruction cache as well as the data cache.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174495 91177308-0d34-0410-b5e6-96231b3b80d8
asic-a64-instructions.s
|
| 7bc8414ee99967cb3a89de663c0510563476aa32 |
01-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Add explicit triples to AArch64 tests
Only Linux is supported at the moment, and other platforms quickly fault. As a
result these tests would fail on non-Linux hosts. It may be worth making the
tests more generic again as more platforms are supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174170 91177308-0d34-0410-b5e6-96231b3b80d8
lf-globaladdress.ll
|
| 72062f5744557e270a38192554c3126ea5f97434 |
31-Jan-2013 |
Tim Northover <Tim.Northover@arm.com> |
Add AArch64 as an experimental target.
This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.
This initial commit should have support for:
+ Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
(except the late addition CRC instructions).
+ CodeGen features required for C++03 and C99.
+ Compilation for the "small" memory model: code+static data <
4GB.
+ Absolute and position-independent code.
+ GNU-style (i.e. "__thread") TLS.
+ Debugging information.
The principal omission, currently, is performance tuning.
This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.
Further reviews would be gratefully received.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
asic-a64-diagnostics.s
asic-a64-instructions.s
lf-globaladdress.ll
lf-objdump.s
lf-reloc-addsubimm.s
lf-reloc-condbr.s
lf-reloc-ldrlit.s
lf-reloc-ldstunsimm.s
lf-reloc-movw.s
lf-reloc-pcreladdressing.s
lf-reloc-tstb.s
lf-reloc-uncondbrimm.s
it.local.cfg
apping-across-sections.s
apping-within-section.s
ls-relocs.s
|