Lines Matching refs:instr
104 int FormatVFPRegister(Instruction* instr, const char* format);
105 void PrintMovwMovt(Instruction* instr);
106 int FormatVFPinstruction(Instruction* instr, const char* format);
107 void PrintCondition(Instruction* instr);
108 void PrintShiftRm(Instruction* instr);
109 void PrintShiftImm(Instruction* instr);
110 void PrintShiftSat(Instruction* instr);
111 void PrintPU(Instruction* instr);
115 int FormatRegister(Instruction* instr, const char* option);
118 int FormatOption(Instruction* instr, const char* option);
119 void Format(Instruction* instr, const char* format);
120 void Unknown(Instruction* instr);
126 void DecodeType01(Instruction* instr);
127 void DecodeType2(Instruction* instr);
128 void DecodeType3(Instruction* instr);
129 void DecodeType4(Instruction* instr);
130 void DecodeType5(Instruction* instr);
131 void DecodeType6(Instruction* instr);
133 int DecodeType7(Instruction* instr);
135 void DecodeTypeVFP(Instruction* instr);
136 void DecodeType6CoprocessorIns(Instruction* instr);
138 void DecodeSpecialCondition(Instruction* instr);
140 void DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(Instruction* instr);
141 void DecodeVCMP(Instruction* instr);
142 void DecodeVCVTBetweenDoubleAndSingle(Instruction* instr);
143 void DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr);
184 void Decoder::PrintCondition(Instruction* instr) {
185 Print(cond_names[instr->ConditionValue()]);
216 void Decoder::PrintShiftRm(Instruction* instr) {
217 ShiftOp shift = instr->ShiftField();
218 int shift_index = instr->ShiftValue();
219 int shift_amount = instr->ShiftAmountValue();
220 int rm = instr->RmValue();
224 if ((instr->RegShiftValue() == 0) && (shift == LSL) && (shift_amount == 0)) {
228 if (instr->RegShiftValue() == 0) {
242 int rs = instr->RsValue();
252 void Decoder::PrintShiftImm(Instruction* instr) {
253 int rotate = instr->RotateValue() * 2;
254 int immed8 = instr->Immed8Value();
262 void Decoder::PrintShiftSat(Instruction* instr) {
263 int shift = instr->Bits(11, 7);
267 shift_names[instr->Bit(6) * 2],
268 instr->Bits(11, 7));
274 void Decoder::PrintPU(Instruction* instr) {
275 switch (instr->PUField()) {
328 int Decoder::FormatRegister(Instruction* instr, const char* format) {
331 int reg = instr->RnValue();
335 int reg = instr->RdValue();
339 int reg = instr->RsValue();
343 int reg = instr->RmValue();
347 int reg = instr->RtValue();
353 int rlist = instr->RlistValue();
377 int Decoder::FormatVFPRegister(Instruction* instr, const char* format) {
386 reg = instr->VFPNRegValue(precision);
388 reg = instr->VFPMRegValue(precision);
390 if ((instr->TypeValue() == 7) &&
391 (instr->Bit(24) == 0x0) &&
392 (instr->Bits(11, 9) == 0x5) &&
393 (instr->Bit(4) == 0x1)) {
395 reg = instr->Bits(19, 16) | (instr->Bit(7) << 4);
397 reg = instr->VFPDRegValue(precision);
401 int immed8 = instr->Immed8Value();
420 int Decoder::FormatVFPinstruction(Instruction* instr, const char* format) {
462 void Decoder::PrintMovwMovt(Instruction* instr) {
463 int imm = instr->ImmedMovwMovtValue();
464 int rd = instr->RdValue();
476 int Decoder::FormatOption(Instruction* instr, const char* format) {
479 if (instr->Bit(21) == 0) {
487 if (instr->HasB()) {
494 PrintCondition(instr);
498 double d = instr->DoubleImmedVmov();
504 uint32_t lsbit = instr->Bits(11, 7);
505 uint32_t width = instr->Bits(20, 16) + 1;
506 if (instr->Bit(21) == 0) {
518 if (instr->HasH()) {
536 instr->Bits(width + lsb - 1, lsb));
540 if (instr->HasLink()) {
548 PrintMovwMovt(instr);
553 if (instr->HasL()) {
556 if ((instr->Bits(27, 25) == 0) && (instr->Bit(20) == 0) &&
557 (instr->Bits(7, 6) == 3) && (instr->Bit(4) == 1)) {
558 if (instr->Bit(5) == 1) {
572 reinterpret_cast<byte*>(instr->InstructionBits() & 0x0fffffff);
582 "%d", instr->Offset12Value());
589 (instr->Bits(19, 8) << 4) +
590 instr->Bits(3, 0));
595 int offs8 = (instr->ImmedHValue() << 4) | instr->ImmedLValue();
602 PrintPU(instr);
606 return FormatRegister(instr, format);
612 if (instr->TypeValue() == 0) {
613 PrintShiftRm(instr);
615 ASSERT(instr->TypeValue() == 1);
616 PrintShiftImm(instr);
621 PrintShiftSat(instr);
625 PrintShiftRm(instr);
630 PrintSoftwareInterrupt(instr->SvcValue());
634 if (instr->HasSign()) {
640 if (instr->HasS()) {
647 int off = (instr->SImmed24Value() << 2) + 8;
652 reinterpret_cast<byte*>(instr) + off));
668 if (instr->Bit(22) == 0) {
676 return FormatVFPinstruction(instr, format);
680 return FormatVFPRegister(instr, format);
683 if (instr->HasW()) {
701 void Decoder::Format(Instruction* instr, const char* format) {
705 format += FormatOption(instr, format);
719 Unknown(instr); \
724 // For currently unimplemented decodings the disassembler calls Unknown(instr)
726 void Decoder::Unknown(Instruction* instr) {
727 Format(instr, "unknown");
731 void Decoder::DecodeType01(Instruction* instr) {
732 int type = instr->TypeValue();
733 if ((type == 0) && instr->IsSpecialType0()) {
735 if (instr->Bits(7, 4) == 9) {
736 if (instr->Bit(24) == 0) {
738 if (instr->Bit(23) == 0) {
739 if (instr->Bit(21) == 0) {
743 Format(instr, "mul'cond's 'rn, 'rm, 'rs");
745 if (instr->Bit(22) == 0) {
750 Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
756 Format(instr, "mls'cond's 'rn, 'rm, 'rs, 'rd");
766 Format(instr, "'um'al'cond's 'rd, 'rn, 'rm, 'rs");
769 Unknown(instr); // not used by V8
771 } else if ((instr->Bit(20) == 0) && ((instr->Bits(7, 4) & 0xd) == 0xd)) {
773 switch (instr->PUField()) {
775 if (instr->Bit(22) == 0) {
776 Format(instr, "'memop'cond's 'rd, ['rn], -'rm");
778 Format(instr, "'memop'cond's 'rd, ['rn], #-'off8");
783 if (instr->Bit(22) == 0) {
784 Format(instr, "'memop'cond's 'rd, ['rn], +'rm");
786 Format(instr, "'memop'cond's 'rd, ['rn], #+'off8");
791 if (instr->Bit(22) == 0) {
792 Format(instr, "'memop'cond's 'rd, ['rn, -'rm]'w");
794 Format(instr, "'memop'cond's 'rd, ['rn, #-'off8]'w");
799 if (instr->Bit(22) == 0) {
800 Format(instr, "'memop'cond's 'rd, ['rn, +'rm]'w");
802 Format(instr, "'memop'cond's 'rd, ['rn, #+'off8]'w");
814 switch (instr->PUField()) {
816 if (instr->Bit(22) == 0) {
817 Format(instr, "'memop'cond'sign'h 'rd, ['rn], -'rm");
819 Format(instr, "'memop'cond'sign'h 'rd, ['rn], #-'off8");
824 if (instr->Bit(22) == 0) {
825 Format(instr, "'memop'cond'sign'h 'rd, ['rn], +'rm");
827 Format(instr, "'memop'cond'sign'h 'rd, ['rn], #+'off8");
832 if (instr->Bit(22) == 0) {
833 Format(instr, "'memop'cond'sign'h 'rd, ['rn, -'rm]'w");
835 Format(instr, "'memop'cond'sign'h 'rd, ['rn, #-'off8]'w");
840 if (instr->Bit(22) == 0) {
841 Format(instr, "'memop'cond'sign'h 'rd, ['rn, +'rm]'w");
843 Format(instr, "'memop'cond'sign'h 'rd, ['rn, #+'off8]'w");
855 } else if ((type == 0) && instr->IsMiscType0()) {
856 if (instr->Bits(22, 21) == 1) {
857 switch (instr->BitField(7, 4)) {
859 Format(instr, "bx'cond 'rm");
862 Format(instr, "blx'cond 'rm");
865 Format(instr, "bkpt 'off0to3and8to19");
868 Unknown(instr); // not used by V8
871 } else if (instr->Bits(22, 21) == 3) {
872 switch (instr->BitField(7, 4)) {
874 Format(instr, "clz'cond 'rd, 'rm");
877 Unknown(instr); // not used by V8
881 Unknown(instr); // not used by V8
883 } else if ((type == 1) && instr->IsNopType1()) {
884 Format(instr, "nop'cond");
886 switch (instr->OpcodeField()) {
888 Format(instr, "and'cond's 'rd, 'rn, 'shift_op");
892 Format(instr, "eor'cond's 'rd, 'rn, 'shift_op");
896 Format(instr, "sub'cond's 'rd, 'rn, 'shift_op");
900 Format(instr, "rsb'cond's 'rd, 'rn, 'shift_op");
904 Format(instr, "add'cond's 'rd, 'rn, 'shift_op");
908 Format(instr, "adc'cond's 'rd, 'rn, 'shift_op");
912 Format(instr, "sbc'cond's 'rd, 'rn, 'shift_op");
916 Format(instr, "rsc'cond's 'rd, 'rn, 'shift_op");
920 if (instr->HasS()) {
921 Format(instr, "tst'cond 'rn, 'shift_op");
923 Format(instr, "movw'cond 'mw");
928 if (instr->HasS()) {
929 Format(instr, "teq'cond 'rn, 'shift_op");
938 if (instr->HasS()) {
939 Format(instr, "cmp'cond 'rn, 'shift_op");
941 Format(instr, "movt'cond 'mw");
946 if (instr->HasS()) {
947 Format(instr, "cmn'cond 'rn, 'shift_op");
956 Format(instr, "orr'cond's 'rd, 'rn, 'shift_op");
960 Format(instr, "mov'cond's 'rd, 'shift_op");
964 Format(instr, "bic'cond's 'rd, 'rn, 'shift_op");
968 Format(instr, "mvn'cond's 'rd, 'shift_op");
981 void Decoder::DecodeType2(Instruction* instr) {
982 switch (instr->PUField()) {
984 if (instr->HasW()) {
985 Unknown(instr); // not used in V8
988 Format(instr, "'memop'cond'b 'rd, ['rn], #-'off12");
992 if (instr->HasW()) {
993 Unknown(instr); // not used in V8
996 Format(instr, "'memop'cond'b 'rd, ['rn], #+'off12");
1000 Format(instr, "'memop'cond'b 'rd, ['rn, #-'off12]'w");
1004 Format(instr, "'memop'cond'b 'rd, ['rn, #+'off12]'w");
1016 void Decoder::DecodeType3(Instruction* instr) {
1017 switch (instr->PUField()) {
1019 VERIFY(!instr->HasW());
1020 Format(instr, "'memop'cond'b 'rd, ['rn], -'shift_rm");
1024 if (instr->Bit(4) == 0) {
1025 Format(instr, "'memop'cond'b 'rd, ['rn], +'shift_rm");
1027 if (instr->Bit(5) == 0) {
1028 switch (instr->Bits(22, 21)) {
1030 if (instr->Bit(20) == 0) {
1031 if (instr->Bit(6) == 0) {
1032 Format(instr, "pkhbt'cond 'rd, 'rn, 'rm, lsl #'imm05@07");
1034 if (instr->Bits(11, 7) == 0) {
1035 Format(instr, "pkhtb'cond 'rd, 'rn, 'rm, asr #32");
1037 Format(instr, "pkhtb'cond 'rd, 'rn, 'rm, asr #'imm05@07");
1051 Format(instr, "usat 'rd, #'imm05@16, 'rm'shift_sat");
1055 switch (instr->Bits(22, 21)) {
1063 if ((instr->Bit(20) == 0) && (instr->Bits(9, 6) == 1)) {
1064 if (instr->Bits(19, 16) == 0xF) {
1065 switch (instr->Bits(11, 10)) {
1067 Format(instr, "uxtb16'cond 'rd, 'rm, ror #0");
1070 Format(instr, "uxtb16'cond 'rd, 'rm, ror #8");
1073 Format(instr, "uxtb16'cond 'rd, 'rm, ror #16");
1076 Format(instr, "uxtb16'cond 'rd, 'rm, ror #24");
1087 if ((instr->Bit(20) == 0) && (instr->Bits(9, 6) == 1)) {
1088 if (instr->Bits(19, 16) == 0xF) {
1089 switch (instr->Bits(11, 10)) {
1091 Format(instr, "uxtb'cond 'rd, 'rm, ror #0");
1094 Format(instr, "uxtb'cond 'rd, 'rm, ror #8");
1097 Format(instr, "uxtb'cond 'rd, 'rm, ror #16");
1100 Format(instr, "uxtb'cond 'rd, 'rm, ror #24");
1104 switch (instr->Bits(11, 10)) {
1106 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #0");
1109 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #8");
1112 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #16");
1115 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #24");
1130 if (!instr->HasW()) {
1131 if (instr->Bits(5, 4) == 0x1) {
1132 if ((instr->Bit(22) == 0x0) && (instr->Bit(20) == 0x1)) {
1134 Format(instr, "sdiv'cond'b 'rn, 'rm, 'rs");
1140 Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w");
1144 if (instr->HasW() && (instr->Bits(6, 4) == 0x5)) {
1145 uint32_t widthminus1 = static_cast<uint32_t>(instr->Bits(20, 16));
1146 uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7));
1149 if (instr->Bit(22)) {
1150 Format(instr, "ubfx'cond 'rd, 'rm, 'f");
1152 Format(instr, "sbfx'cond 'rd, 'rm, 'f");
1157 } else if (!instr->HasW() && (instr->Bits(6, 4) == 0x1)) {
1158 uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7));
1159 uint32_t msbit = static_cast<uint32_t>(instr->Bits(20, 16));
1161 if (instr->RmValue() == 15) {
1162 Format(instr, "bfc'cond 'rd, 'f");
1164 Format(instr, "bfi'cond 'rd, 'rm, 'f");
1170 Format(instr, "'memop'cond'b 'rd, ['rn, +'shift_rm]'w");
1183 void Decoder::DecodeType4(Instruction* instr) {
1184 if (instr->Bit(22) != 0) {
1186 Unknown(instr);
1188 if (instr->HasL()) {
1189 Format(instr, "ldm'cond'pu 'rn'w, 'rlist");
1191 Format(instr, "stm'cond'pu 'rn'w, 'rlist");
1197 void Decoder::DecodeType5(Instruction* instr) {
1198 Format(instr, "b'l'cond 'target");
1202 void Decoder::DecodeType6(Instruction* instr) {
1203 DecodeType6CoprocessorIns(instr);
1207 int Decoder::DecodeType7(Instruction* instr) {
1208 if (instr->Bit(24) == 1) {
1209 if (instr->SvcValue() >= kStopCode) {
1210 Format(instr, "stop'cond 'svc");
1215 reinterpret_cast<int32_t*>(instr
1217 *reinterpret_cast<char**>(instr
1219 *reinterpret_cast<char**>(instr
1224 Format(instr, "svc'cond 'svc");
1227 DecodeTypeVFP(instr);
1233 // void Decoder::DecodeTypeVFP(Instruction* instr)
1251 void Decoder::DecodeTypeVFP(Instruction* instr) {
1252 VERIFY((instr->TypeValue() == 7) && (instr->Bit(24) == 0x0) );
1253 VERIFY(instr->Bits(11, 9) == 0x5);
1255 if (instr->Bit(4) == 0) {
1256 if (instr->Opc1Value() == 0x7) {
1258 if ((instr->Opc2Value() == 0x0) && (instr->Opc3Value() == 0x1)) {
1260 if (instr->SzValue() == 0x1) {
1261 Format(instr, "vmov'cond.f64 'Dd, 'Dm");
1263 Format(instr, "vmov'cond.f32 'Sd, 'Sm");
1265 } else if ((instr->Opc2Value() == 0x0) && (instr->Opc3Value() == 0x3)) {
1267 Format(instr, "vabs'cond.f64 'Dd, 'Dm");
1268 } else if ((instr->Opc2Value() == 0x1) && (instr->Opc3Value() == 0x1)) {
1270 Format(instr, "vneg'cond.f64 'Dd, 'Dm");
1271 } else if ((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3)) {
1272 DecodeVCVTBetweenDoubleAndSingle(instr);
1273 } else if ((instr->Opc2Value() == 0x8) && (instr->Opc3Value() & 0x1)) {
1274 DecodeVCVTBetweenFloatingPointAndInteger(instr);
1275 } else if ((instr->Opc2Value() == 0xA) && (instr->Opc3Value() == 0x3) &&
1276 (instr->Bit(8) == 1)) {
1278 int fraction_bits = 32 - ((instr->Bit(5) << 4) | instr->Bits(3, 0));
1279 Format(instr, "vcvt'cond.f64.s32 'Dd, 'Dd");
1282 } else if (((instr->Opc2Value() >> 1) == 0x6) &&
1283 (instr->Opc3Value() & 0x1)) {
1284 DecodeVCVTBetweenFloatingPointAndInteger(instr);
1285 } else if (((instr->Opc2Value() == 0x4) || (instr->Opc2Value() == 0x5)) &&
1286 (instr->Opc3Value() & 0x1)) {
1287 DecodeVCMP(instr);
1288 } else if (((instr->Opc2Value() == 0x1)) && (instr->Opc3Value() == 0x3)) {
1289 Format(instr, "vsqrt'cond.f64 'Dd, 'Dm");
1290 } else if (instr->Opc3Value() == 0x0) {
1291 if (instr->SzValue() == 0x1) {
1292 Format(instr, "vmov'cond.f64 'Dd, 'd");
1294 Unknown(instr); // Not used by V8.
1297 Unknown(instr); // Not used by V8.
1299 } else if (instr->Opc1Value() == 0x3) {
1300 if (instr->SzValue() == 0x1) {
1301 if (instr->Opc3Value() & 0x1) {
1302 Format(instr, "vsub'cond.f64 'Dd, 'Dn, 'Dm");
1304 Format(instr, "vadd'cond.f64 'Dd, 'Dn, 'Dm");
1307 Unknown(instr); // Not used by V8.
1309 } else if ((instr->Opc1Value() == 0x2) && !(instr->Opc3Value() & 0x1)) {
1310 if (instr->SzValue() == 0x1) {
1311 Format(instr, "vmul'cond.f64 'Dd, 'Dn, 'Dm");
1313 Unknown(instr); // Not used by V8.
1315 } else if ((instr->Opc1Value() == 0x0) && !(instr->Opc3Value() & 0x1)) {
1316 if (instr->SzValue() == 0x1) {
1317 Format(instr, "vmla'cond.f64 'Dd, 'Dn, 'Dm");
1319 Unknown(instr); // Not used by V8.
1321 } else if ((instr->Opc1Value() == 0x0) && (instr->Opc3Value() & 0x1)) {
1322 if (instr->SzValue() == 0x1) {
1323 Format(instr, "vmls'cond.f64 'Dd, 'Dn, 'Dm");
1325 Unknown(instr); // Not used by V8.
1327 } else if ((instr->Opc1Value() == 0x4) && !(instr->Opc3Value() & 0x1)) {
1328 if (instr->SzValue() == 0x1) {
1329 Format(instr, "vdiv'cond.f64 'Dd, 'Dn, 'Dm");
1331 Unknown(instr); // Not used by V8.
1334 Unknown(instr); // Not used by V8.
1337 if ((instr->VCValue() == 0x0) &&
1338 (instr->VAValue() == 0x0)) {
1339 DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(instr);
1340 } else if ((instr->VLValue() == 0x0) &&
1341 (instr->VCValue() == 0x1) &&
1342 (instr->Bit(23) == 0x0)) {
1343 if (instr->Bit(21) == 0x0) {
1344 Format(instr, "vmov'cond.32 'Dd[0], 'rt");
1346 Format(instr, "vmov'cond.32 'Dd[1], 'rt");
1348 } else if ((instr->VLValue() == 0x1) &&
1349 (instr->VCValue() == 0x1) &&
1350 (instr->Bit(23) == 0x0)) {
1351 if (instr->Bit(21) == 0x0) {
1352 Format(instr, "vmov'cond.32 'rt, 'Dd[0]");
1354 Format(instr, "vmov'cond.32 'rt, 'Dd[1]");
1356 } else if ((instr->VCValue() == 0x0) &&
1357 (instr->VAValue() == 0x7) &&
1358 (instr->Bits(19, 16) == 0x1)) {
1359 if (instr->VLValue() == 0) {
1360 if (instr->Bits(15, 12) == 0xF) {
1361 Format(instr, "vmsr'cond FPSCR, APSR");
1363 Format(instr, "vmsr'cond FPSCR, 'rt");
1366 if (instr->Bits(15, 12) == 0xF) {
1367 Format(instr, "vmrs'cond APSR, FPSCR");
1369 Format(instr, "vmrs'cond 'rt, FPSCR");
1378 Instruction* instr) {
1379 VERIFY((instr->Bit(4) == 1) && (instr->VCValue() == 0x0) &&
1380 (instr->VAValue() == 0x0));
1382 bool to_arm_register = (instr->VLValue() == 0x1);
1385 Format(instr, "vmov'cond 'rt, 'Sn");
1387 Format(instr, "vmov'cond 'Sn, 'rt");
1392 void Decoder::DecodeVCMP(Instruction* instr) {
1393 VERIFY((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1394 VERIFY(((instr->Opc2Value() == 0x4) || (instr->Opc2Value() == 0x5)) &&
1395 (instr->Opc3Value() & 0x1));
1398 bool dp_operation = (instr->SzValue() == 1);
1399 bool raise_exception_for_qnan = (instr->Bit(7) == 0x1);
1402 if (instr->Opc2Value() == 0x4) {
1403 Format(instr, "vcmp'cond.f64 'Dd, 'Dm");
1404 } else if (instr->Opc2Value() == 0x5) {
1405 Format(instr, "vcmp'cond.f64 'Dd, #0.0");
1407 Unknown(instr); // invalid
1410 Unknown(instr); // Not used by V8.
1415 void Decoder::DecodeVCVTBetweenDoubleAndSingle(Instruction* instr) {
1416 VERIFY((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1417 VERIFY((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3));
1419 bool double_to_single = (instr->SzValue() == 1);
1422 Format(instr, "vcvt'cond.f32.f64 'Sd, 'Dm");
1424 Format(instr, "vcvt'cond.f64.f32 'Dd, 'Sm");
1429 void Decoder::DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr) {
1430 VERIFY((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1431 VERIFY(((instr->Opc2Value() == 0x8) && (instr->Opc3Value() & 0x1)) ||
1432 (((instr->Opc2Value() >> 1) == 0x6) && (instr->Opc3Value() & 0x1)));
1434 bool to_integer = (instr->Bit(18) == 1);
1435 bool dp_operation = (instr->SzValue() == 1);
1437 bool unsigned_integer = (instr->Bit(16) == 0);
1441 Format(instr, "vcvt'cond.u32.f64 'Sd, 'Dm");
1443 Format(instr, "vcvt'cond.s32.f64 'Sd, 'Dm");
1447 Format(instr, "vcvt'cond.u32.f32 'Sd, 'Sm");
1449 Format(instr, "vcvt'cond.s32.f32 'Sd, 'Sm");
1453 bool unsigned_integer = (instr->Bit(7) == 0);
1457 Format(instr, "vcvt'cond.f64.u32 'Dd, 'Sm");
1459 Format(instr, "vcvt'cond.f64.s32 'Dd, 'Sm");
1463 Format(instr, "vcvt'cond.f32.u32 'Sd, 'Sm");
1465 Format(instr, "vcvt'cond.f32.s32 'Sd, 'Sm");
1477 void Decoder::DecodeType6CoprocessorIns(Instruction* instr) {
1478 VERIFY(instr->TypeValue() == 6);
1480 if (instr->CoprocessorValue() == 0xA) {
1481 switch (instr->OpcodeValue()) {
1484 if (instr->HasL()) {
1485 Format(instr, "vldr'cond 'Sd, ['rn - 4*'imm08@00]");
1487 Format(instr, "vstr'cond 'Sd, ['rn - 4*'imm08@00]");
1492 if (instr->HasL()) {
1493 Format(instr, "vldr'cond 'Sd, ['rn + 4*'imm08@00]");
1495 Format(instr, "vstr'cond 'Sd, ['rn + 4*'imm08@00]");
1504 bool to_vfp_register = (instr->VLValue() == 0x1);
1506 Format(instr, "vldm'cond'pu 'rn'w, {'Sd-'Sd+}");
1508 Format(instr, "vstm'cond'pu 'rn'w, {'Sd-'Sd+}");
1513 Unknown(instr); // Not used by V8.
1515 } else if (instr->CoprocessorValue() == 0xB) {
1516 switch (instr->OpcodeValue()) {
1519 if (instr->Bits(7, 6) != 0 || instr->Bit(4) != 1) {
1520 Unknown(instr); // Not used by V8.
1521 } else if (instr->HasL()) {
1522 Format(instr, "vmov'cond 'rt, 'rn, 'Dm");
1524 Format(instr, "vmov'cond 'Dm, 'rt, 'rn");
1529 if (instr->HasL()) {
1530 Format(instr, "vldr'cond 'Dd, ['rn - 4*'imm08@00]");
1532 Format(instr, "vstr'cond 'Dd, ['rn - 4*'imm08@00]");
1537 if (instr->HasL()) {
1538 Format(instr, "vldr'cond 'Dd, ['rn + 4*'imm08@00]");
1540 Format(instr, "vstr'cond 'Dd, ['rn + 4*'imm08@00]");
1549 bool to_vfp_register = (instr->VLValue() == 0x1);
1551 Format(instr, "vldm'cond'pu 'rn'w, {'Dd-'Dd+}");
1553 Format(instr, "vstm'cond'pu 'rn'w, {'Dd-'Dd+}");
1558 Unknown(instr); // Not used by V8.
1561 Unknown(instr); // Not used by V8.
1566 void Decoder::DecodeSpecialCondition(Instruction* instr) {
1567 switch (instr->SpecialValue()) {
1569 if ((instr->Bits(18, 16) == 0) && (instr->Bits(11, 6) == 0x28) &&
1570 (instr->Bit(4) == 1)) {
1572 int Vd = (instr->Bit(22) << 4) | instr->VdValue();
1573 int Vm = (instr->Bit(5) << 4) | instr->VmValue();
1574 int imm3 = instr->Bits(21, 19);
1578 Unknown(instr);
1582 if ((instr->Bits(18, 16) == 0) && (instr->Bits(11, 6) == 0x28) &&
1583 (instr->Bit(4) == 1)) {
1585 int Vd = (instr->Bit(22) << 4) | instr->VdValue();
1586 int Vm = (instr->Bit(5) << 4) | instr->VmValue();
1587 int imm3 = instr->Bits(21, 19);
1591 Unknown(instr);
1595 if (instr->Bits(21, 20) == 0) {
1597 int Vd = (instr->Bit(22) << 4) | instr->VdValue();
1598 int Rn = instr->VnValue();
1599 int type = instr->Bits(11, 8);
1600 int size = instr->Bits(7, 6);
1601 int align = instr->Bits(5, 4);
1602 int Rm = instr->VmValue();
1608 } else if (instr->Bits(21, 20) == 2) {
1610 int Vd = (instr->Bit(22) << 4) | instr->VdValue();
1611 int Rn = instr->VnValue();
1612 int type = instr->Bits(11, 8);
1613 int size = instr->Bits(7, 6);
1614 int align = instr->Bits(5, 4);
1615 int Rm = instr->VmValue();
1622 Unknown(instr);
1627 if ((instr->Bits(22, 20) == 5) && (instr->Bits(15, 12) == 0xf)) {
1628 int Rn = instr->Bits(19, 16);
1629 int offset = instr->Bits(11, 0);
1633 } else if (instr->Bit(23) == 0) {
1641 Unknown(instr);
1645 Unknown(instr);
1670 Instruction* instr = Instruction::At(instr_ptr);
1674 instr->InstructionBits());
1675 if (instr->ConditionField() == kSpecialCondition) {
1676 DecodeSpecialCondition(instr);
1686 switch (instr->TypeValue()) {
1689 DecodeType01(instr);
1693 DecodeType2(instr);
1697 DecodeType3(instr);
1701 DecodeType4(instr);
1705 DecodeType5(instr);
1709 DecodeType6(instr);
1713 return DecodeType7(instr);