Cross Reference: /external/llvm/include/llvm/CodeGen/SelectionDAGNodes.h

Lines Matching defs:ISD
62 namespace ISD {
74   /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
79   /// and all operands of the specified node are ISD::UNDEF.
81 }  // end llvm:ISD namespace
367   /// are the opcode values in the ISD and <target>ISD namespaces. For
372   /// \<target\>ISD namespace).
373   bool isTargetOpcode() const { return NodeType >= ISD::BUILTIN_OP_END; }
376   /// memory-referencing opcode (in the \<target\>ISD namespace and
379     return NodeType >= ISD::FIRST_TARGET_MEMORY_OPCODE;
631   static const char* getIndexedModeName(ISD::MemIndexedMode AM);
948     : SDNode(ISD::HANDLENODE, 0, DebugLoc(), getSDVTList(MVT::Other)) {
1039     return getOperand(getOpcode() == ISD::STORE ? 2 : 1);
1046     return N->getOpcode() == ISD::LOAD                ||
1047            N->getOpcode() == ISD::STORE               ||
1048            N->getOpcode() == ISD::PREFETCH            ||
1049            N->getOpcode() == ISD::ATOMIC_CMP_SWAP     ||
1050            N->getOpcode() == ISD::ATOMIC_SWAP         ||
1051            N->getOpcode() == ISD::ATOMIC_LOAD_ADD     ||
1052            N->getOpcode() == ISD::ATOMIC_LOAD_SUB     ||
1053            N->getOpcode() == ISD::ATOMIC_LOAD_AND     ||
1054            N->getOpcode() == ISD::ATOMIC_LOAD_OR      ||
1055            N->getOpcode() == ISD::ATOMIC_LOAD_XOR     ||
1056            N->getOpcode() == ISD::ATOMIC_LOAD_NAND    ||
1057            N->getOpcode() == ISD::ATOMIC_LOAD_MIN     ||
1058            N->getOpcode() == ISD::ATOMIC_LOAD_MAX     ||
1059            N->getOpcode() == ISD::ATOMIC_LOAD_UMIN    ||
1060            N->getOpcode() == ISD::ATOMIC_LOAD_UMAX    ||
1061            N->getOpcode() == ISD::ATOMIC_LOAD         ||
1062            N->getOpcode() == ISD::ATOMIC_STORE        ||
1123     return Op == ISD::ATOMIC_CMP_SWAP;
1128     return N->getOpcode() == ISD::ATOMIC_CMP_SWAP     ||
1129            N->getOpcode() == ISD::ATOMIC_SWAP         ||
1130            N->getOpcode() == ISD::ATOMIC_LOAD_ADD     ||
1131            N->getOpcode() == ISD::ATOMIC_LOAD_SUB     ||
1132            N->getOpcode() == ISD::ATOMIC_LOAD_AND     ||
1133            N->getOpcode() == ISD::ATOMIC_LOAD_OR      ||
1134            N->getOpcode() == ISD::ATOMIC_LOAD_XOR     ||
1135            N->getOpcode() == ISD::ATOMIC_LOAD_NAND    ||
1136            N->getOpcode() == ISD::ATOMIC_LOAD_MIN     ||
1137            N->getOpcode() == ISD::ATOMIC_LOAD_MAX     ||
1138            N->getOpcode() == ISD::ATOMIC_LOAD_UMIN    ||
1139            N->getOpcode() == ISD::ATOMIC_LOAD_UMAX    ||
1140            N->getOpcode() == ISD::ATOMIC_LOAD         ||
1141            N->getOpcode() == ISD::ATOMIC_STORE;
1161     return N->getOpcode() == ISD::INTRINSIC_W_CHAIN ||
1162            N->getOpcode() == ISD::INTRINSIC_VOID ||
1163            N->getOpcode() == ISD::PREFETCH ||
1186     : SDNode(ISD::VECTOR_SHUFFLE, Order, dl, getSDVTList(VT)), Mask(M) {
1213     return N->getOpcode() == ISD::VECTOR_SHUFFLE;
1221     : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant,
1236     return N->getOpcode() == ISD::Constant ||
1237            N->getOpcode() == ISD::TargetConstant;
1245     : SDNode(isTarget ? ISD::TargetConstantFP : ISD::ConstantFP,
1279     return N->getOpcode() == ISD::ConstantFP ||
1280            N->getOpcode() == ISD::TargetConstantFP;
1300     return N->getOpcode() == ISD::GlobalAddress ||
1301            N->getOpcode() == ISD::TargetGlobalAddress ||
1302            N->getOpcode() == ISD::GlobalTLSAddress ||
1303            N->getOpcode() == ISD::TargetGlobalTLSAddress;
1311     : SDNode(isTarg ? ISD::TargetFrameIndex : ISD::FrameIndex,
1319     return N->getOpcode() == ISD::FrameIndex ||
1320            N->getOpcode() == ISD::TargetFrameIndex;
1329     : SDNode(isTarg ? ISD::TargetJumpTable : ISD::JumpTable,
1338     return N->getOpcode() == ISD::JumpTable ||
1339            N->getOpcode() == ISD::TargetJumpTable;
1354     : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 0, DebugLoc(),
1361     : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 0, DebugLoc(),
1396     return N->getOpcode() == ISD::ConstantPool ||
1397            N->getOpcode() == ISD::TargetConstantPool;
1410     : SDNode(ISD::TargetIndex, 0, DebugLoc(), getSDVTList(VT)),
1419     return N->getOpcode() == ISD::TargetIndex;
1430     : SDNode(ISD::BasicBlock, 0, DebugLoc(), getSDVTList(MVT::Other)), MBB(mbb) {
1437     return N->getOpcode() == ISD::BasicBlock;
1461     return N->getOpcode() == ISD::BUILD_VECTOR;
1474     : SDNode(ISD::SRCVALUE, 0, DebugLoc(), getSDVTList(MVT::Other)), V(v) {}
1481     return N->getOpcode() == ISD::SRCVALUE;
1489   : SDNode(ISD::MDNODE_SDNODE, 0, DebugLoc(), getSDVTList(MVT::Other)), MD(md) {}
1495     return N->getOpcode() == ISD::MDNODE_SDNODE;
1504     : SDNode(ISD::Register, 0, DebugLoc(), getSDVTList(VT)), Reg(reg) {
1511     return N->getOpcode() == ISD::Register;
1520     : SDNode(ISD::RegisterMask, 0, DebugLoc(), getSDVTList(MVT::Untyped)),
1527     return N->getOpcode() == ISD::RegisterMask;
1547     return N->getOpcode() == ISD::BlockAddress ||
1548            N->getOpcode() == ISD::TargetBlockAddress;
1557     : SDNode(ISD::EH_LABEL, Order, dl, getSDVTList(MVT::Other)), Label(L) {
1564     return N->getOpcode() == ISD::EH_LABEL;
1574     : SDNode(isTarget ? ISD::TargetExternalSymbol : ISD::ExternalSymbol,
1583     return N->getOpcode() == ISD::ExternalSymbol ||
1584            N->getOpcode() == ISD::TargetExternalSymbol;
1589   ISD::CondCode Condition;
1591   explicit CondCodeSDNode(ISD::CondCode Cond)
1592     : SDNode(ISD::CONDCODE, 0, DebugLoc(), getSDVTList(MVT::Other)),
1597   ISD::CondCode get() const { return Condition; }
1600     return N->getOpcode() == ISD::CONDCODE;
1607   ISD::CvtCode CvtCode;
1610                            unsigned NumOps, ISD::CvtCode Code)
1611     : SDNode(ISD::CONVERT_RNDSAT, Order, dl, getSDVTList(VT), Ops, NumOps),
1616   ISD::CvtCode getCvtCode() const { return CvtCode; }
1619     return N->getOpcode() == ISD::CONVERT_RNDSAT;
1629     : SDNode(ISD::VALUETYPE, 0, DebugLoc(), getSDVTList(MVT::Other)),
1637     return N->getOpcode() == ISD::VALUETYPE;
1652   LSBaseSDNode(ISD::NodeType NodeTy, unsigned Order, DebugLoc dl, SDValue *Operands,
1653                unsigned numOperands, SDVTList VTs, ISD::MemIndexedMode AM,
1659     assert((getOffset().getOpcode() == ISD::UNDEF || isIndexed()) &&
1664     return getOperand(getOpcode() == ISD::LOAD ? 2 : 3);
1669   ISD::MemIndexedMode getAddressingMode() const {
1670     return ISD::MemIndexedMode((SubclassData >> 2) & 7);
1674   bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
1677   bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
1680     return N->getOpcode() == ISD::LOAD ||
1681            N->getOpcode() == ISD::STORE;
1685 /// LoadSDNode - This class is used to represent ISD::LOAD nodes.
1690              ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
1692     : LSBaseSDNode(ISD::LOAD, Order, dl, ChainPtrOff, 3, VTs, AM, MemVT, MMO) {
1702   ISD::LoadExtType getExtensionType() const {
1703     return ISD::LoadExtType(SubclassData & 3);
1710     return N->getOpcode() == ISD::LOAD;
1714 /// StoreSDNode - This class is used to represent ISD::STORE nodes.
1719               SDVTList VTs, ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
1721     : LSBaseSDNode(ISD::STORE, Order, dl, ChainValuePtrOff, 4,
1740     return N->getOpcode() == ISD::STORE;
1850 namespace ISD {
1855     return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD &&
1856       Ld->getAddressingMode() == ISD::UNINDEXED;
1863       cast<LoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD;
1870       cast<LoadSDNode>(N)->getExtensionType() == ISD::EXTLOAD;
1877       cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD;
1884       cast<LoadSDNode>(N)->getExtensionType() == ISD::ZEXTLOAD;
1891       cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
1899       St->getAddressingMode() == ISD::UNINDEXED;
1918       cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;