Lines Matching refs:LR
182 case ARM::LR:
604 // Add the callee-saved register as live-in unless it's LR and
605 // @llvm.returnaddress is called. If LR is returned for
609 if (Reg == ARM::LR) {
675 if (Reg == ARM::LR && !isTailCall && !isVarArg && STI.hasV5TOps()) {
706 // If we adjusted the reg to PC from LR above, switch it back here. We
709 Regs[0] = ARM::LR;
1178 // Spill LR if Thumb1 function uses variable length argument lists.
1180 MRI.setPhysRegUsed(ARM::LR);
1218 if (Reg == ARM::LR)
1224 // Keep track if LR and any of R4, R5, R6, and R7 is spilled.
1226 case ARM::LR:
1245 case ARM::LR:
1258 // Force LR to be spilled if the Thumb function size is > 2048. This enables
1293 // If LR is not spilled, but at least one of R4, R5, R6, and R7 is spilled.
1294 // Spill LR as well so we can fold BX_RET to the registers restore (LDM).
1296 MRI.setPhysRegUsed(ARM::LR);
1299 UnspilledCS1GPRs.end(), (unsigned)ARM::LR));
1319 isARMLowRegister(Reg) || Reg == ARM::LR) {
1349 Reg == ARM::LR)) {
1381 MRI.setPhysRegUsed(ARM::LR);