Lines Matching defs:BitSize
1498 int64_t BitSize = NarrowVT.getSizeInBits();
1535 DAG.getConstant(32 - BitSize, WideVT));
1539 DAG.getConstant(uint32_t(-1) >> BitSize, WideVT));
1544 DAG.getConstant(BitSize, WideVT) };
1552 DAG.getConstant(BitSize, WideVT));
1571 int64_t BitSize = NarrowVT.getSizeInBits();
1598 NegBitShift, DAG.getConstant(BitSize, WideVT) };
1854 // BitSize is the width of the field in bits, or 0 if this is a partword
1862 unsigned BitSize,
1867 bool IsSubWord = (BitSize < 32);
1879 BitSize = MI->getOperand(6).getImm();
1882 const TargetRegisterClass *RC = (BitSize <= 32 ?
1885 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG;
1886 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG;
1935 if (BitSize < 32)
1936 // XILF with the upper BitSize bits set.
1938 .addReg(Tmp).addImm(uint32_t(~0 << (32 - BitSize)));
1939 else if (BitSize == 32)
1960 .addImm(32).addImm(31 + BitSize).addImm(32 - BitSize);
1979 // for when the current field should be kept. BitSize is the width of
1986 unsigned BitSize) const {
1990 bool IsSubWord = (BitSize < 32);
2001 BitSize = MI->getOperand(6).getImm();
2004 const TargetRegisterClass *RC = (BitSize <= 32 ?
2007 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG;
2008 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG;
2059 // %RotatedAltVal = RISBG %RotatedOldVal, %Src2, 32, 31 + BitSize, 0
2065 .addImm(32).addImm(31 + BitSize).addImm(0);
2110 int64_t BitSize = MI->getOperand(7).getImm();
2149 // %Dest = RLL %OldVal, BitSize(%BitShift)
2150 // ^^ The low BitSize bits contain the field
2152 // %RetryCmpVal = RISBG32 %CmpVal, %Dest, 32, 63-BitSize, 0
2153 // ^^ Replace the upper 32-BitSize bits of the
2170 .addReg(OldVal).addReg(BitShift).addImm(BitSize);
2172 .addReg(CmpVal).addReg(Dest).addImm(32).addImm(63 - BitSize).addImm(0);
2182 // %RetrySwapVal = RISBG32 %SwapVal, %Dest, 32, 63-BitSize, 0
2183 // ^^ Replace the upper 32-BitSize bits of the new
2185 // %StoreVal = RLL %RetrySwapVal, -BitSize(%NegBitShift)
2192 .addReg(SwapVal).addReg(Dest).addImm(32).addImm(63 - BitSize).addImm(0);
2194 .addReg(RetrySwapVal).addReg(NegBitShift).addImm(-BitSize);