Cross Reference: /external/llvm/lib/Target/X86/X86ISelLowering.cpp

Lines Matching defs:Node
12619     assert(Subtarget->is64Bit() && "Node not type legal!");
12679   SDNode *Node = Op.getNode();
12680   SDLoc dl(Node);
12681   EVT T = Node->getValueType(0);
12683                               DAG.getConstant(0, T), Node->getOperand(2));
12685                        cast<AtomicSDNode>(Node)->getMemoryVT(),
12686                        Node->getOperand(0),
12687                        Node->getOperand(1), negOp,
12688                        cast<AtomicSDNode>(Node)->getSrcValue(),
12689                        cast<AtomicSDNode>(Node)->getAlignment(),
12690                        cast<AtomicSDNode>(Node)->getOrdering(),
12691                        cast<AtomicSDNode>(Node)->getSynchScope());
12695   SDNode *Node = Op.getNode();
12696   SDLoc dl(Node);
12697   EVT VT = cast<AtomicSDNode>(Node)->getMemoryVT();
12704   if (cast<AtomicSDNode>(Node)->getOrdering() == SequentiallyConsistent ||
12707                                  cast<AtomicSDNode>(Node)->getMemoryVT(),
12708                                  Node->getOperand(0),
12709                                  Node->getOperand(1), Node->getOperand(2),
12710                                  cast<AtomicSDNode>(Node)->getMemOperand(),
12711                                  cast<AtomicSDNode>(Node)->getOrdering(),
12712                                  cast<AtomicSDNode>(Node)->getSynchScope());
12759   Entry.Node = Arg;
12881 static void ReplaceATOMIC_LOAD(SDNode *Node,
12884   SDLoc dl(Node);
12885   EVT VT = cast<AtomicSDNode>(Node)->getMemoryVT();
12893                                Node->getOperand(0),
12894                                Node->getOperand(1), Zero, Zero,
12895                                cast<AtomicSDNode>(Node)->getMemOperand(),
12896                                cast<AtomicSDNode>(Node)->getOrdering(),
12897                                cast<AtomicSDNode>(Node)->getSynchScope());
12903 ReplaceATOMIC_BINARY_64(SDNode *Node, SmallVectorImpl<SDValue>&Results,
12905   SDLoc dl(Node);
12906   assert (Node->getValueType(0) == MVT::i64 &&
12909   SDValue Chain = Node->getOperand(0);
12910   SDValue In1 = Node->getOperand(1);
12912                              Node->getOperand(2), DAG.getIntPtrConstant(0));
12914                              Node->getOperand(2), DAG.getIntPtrConstant(1));
12919                             cast<MemSDNode>(Node)->getMemOperand());
16913           N->getOpcode() == ISD::SIGN_EXTEND) && "Invalid Node");