Lines Matching refs:NewMI

1728   MachineInstr *NewMI = prior(I);
1729 NewMI->substituteRegister(Orig->getOperand(0).getReg(), DestReg, SubIdx, TRI);
1930 MachineInstr *NewMI = MIB;
1938 LV->getVarInfo(leaInReg).Kills.push_back(NewMI);
1976 MachineInstr *NewMI = NULL;
1993 NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::PSHUFDri))
2009 NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::PSHUFDri))
2024 NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::LEA64r))
2051 NewMI = MIB;
2062 NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::LEA16r))
2090 NewMI = addOffset(MIB, 1);
2098 NewMI = addOffset(BuildMI(MF, MI->getDebugLoc(), get(X86::LEA16r))
2121 NewMI = addOffset(MIB, -1);
2130 NewMI = addOffset(BuildMI(MF, MI->getDebugLoc(), get(X86::LEA16r))
2166 NewMI = addRegReg(MIB, SrcReg, isKill, SrcReg2, isKill2);
2169 NewMI->getOperand(1).setIsUndef(isUndef);
2170 NewMI->getOperand(3).setIsUndef(isUndef2);
2173 LV->replaceKillInstruction(SrcReg2, MI, NewMI);
2183 NewMI = addRegReg(BuildMI(MF, MI->getDebugLoc(), get(X86::LEA16r))
2190 NewMI->getOperand(1).setIsUndef(isUndef);
2191 NewMI->getOperand(3).setIsUndef(isUndef2);
2194 LV->replaceKillInstruction(Src2, MI, NewMI);
2202 NewMI = addOffset(BuildMI(MF, MI->getDebugLoc(), get(X86::LEA64r))
2226 NewMI = addOffset(MIB, MI->getOperand(2).getImm());
2236 NewMI = addOffset(BuildMI(MF, MI->getDebugLoc(), get(X86::LEA16r))
2244 if (!NewMI) return 0;
2248 LV->replaceKillInstruction(Src.getReg(), MI, NewMI);
2250 LV->replaceKillInstruction(Dest.getReg(), MI, NewMI);
2253 MFI->insert(MBBI, NewMI); // Insert the new inst
2254 return NewMI;
2261 X86InstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const {
2281 if (NewMI) {
2284 NewMI = false;
2288 return TargetInstrInfo::commuteInstruction(MI, NewMI);
2358 if (NewMI) {
2361 NewMI = false;
2367 return TargetInstrInfo::commuteInstruction(MI, NewMI);
3671 MachineInstr *NewMI = commuteInstruction(MI, false);
3673 if (!NewMI) return 0;
3674 if (NewMI != MI) {
3676 NewMI->eraseFromParent();
3742 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode),
3744 MachineInstrBuilder MIB(MF, NewMI);
3769 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode),
3771 MachineInstrBuilder MIB(MF, NewMI);
3829 MachineInstr *NewMI = NULL;
3841 NewMI = MakeM0Inst(*this, X86::MOV32mi, MOs, MI);
3842 if (NewMI)
3843 return NewMI;
3884 NewMI = FuseTwoAddrInst(MF, Opcode, MOs, MI, *this);
3886 NewMI = FuseInst(MF, Opcode, i, MOs, MI, *this);
3892 unsigned DstReg = NewMI->getOperand(0).getReg();
3894 NewMI->getOperand(0).setReg(RI.getSubReg(DstReg,
3897 NewMI->getOperand(0).setSubReg(X86::sub_32bit);
3899 return NewMI;