Lines Matching defs:src2
276 void MacroAssembler::And(Register dst, Register src1, const Operand& src2,
278 if (!src2.is_reg() &&
279 !src2.must_use_constant_pool() &&
280 src2.immediate() == 0) {
283 } else if (!src2.is_single_instruction() &&
284 !src2.must_use_constant_pool() &&
286 IsPowerOf2(src2.immediate() + 1)) {
288 WhichPowerOf2(static_cast<uint32_t>(src2.immediate()) + 1), cond);
291 and_(dst, src1, src2, LeaveCC, cond);
680 MemOperand src2(src);
681 src2.set_offset(src2.offset() + 4);
683 ldr(dst2, src2, cond);
687 ldr(dst2, src2, cond);
695 MemOperand src2(src);
696 src2.set_offset(src2.offset() - 4);
698 ldr(dst2, src2, cond);
705 void MacroAssembler::Strd(Register src1, Register src2,
710 ASSERT_EQ(src1.code() + 1, src2.code());
719 strd(src1, src2, dst, cond);
725 str(src2, dst2, cond);
730 str(src2, dst2, cond);
746 const DwVfpRegister src2,
749 VFPCompareAndLoadFlags(src1, src2, pc, cond);
753 const double src2,
756 VFPCompareAndLoadFlags(src1, src2, pc, cond);
761 const DwVfpRegister src2,
765 vcmp(src1, src2, cond);
770 const double src2,
774 vcmp(src1, src2, cond);