| /external/llvm/lib/MC/ |
| H A D | MCCodeGenInfo.cpp | 18 void MCCodeGenInfo::InitMCCodeGenInfo(Reloc::Model RM, CodeModel::Model CM, argument
20 RelocationModel = RM;
|
| /external/libpng/contrib/pngminim/decoder/ |
| H A D | makefile | 8 RM=rm -f macro
40 $(RM) pngm2pnm$(O)
41 $(RM) pngm2pnm$(E)
42 $(RM) $(OBJS)
|
| /external/libpng/contrib/pngminim/encoder/ |
| H A D | makefile | 8 RM=rm -f macro
39 $(RM) pnm2pngm$(O)
40 $(RM) pnm2pngm$(E)
41 $(RM) $(OBJS)
|
| /external/chromium_org/third_party/mesa/src/src/glx/apple/ |
| H A D | Makefile | 17 RM=rm macro
|
| /external/libpng/contrib/pngminim/preader/ |
| H A D | makefile | 8 RM=rm -f macro
56 $(RM) rpng2-x$(O)
57 $(RM) rpng2-x$(E)
58 $(RM) $(OBJS)
|
| /external/llvm/lib/Target/CppBackend/ |
| H A D | CPPTargetMachine.h | 27 Reloc::Model RM, CodeModel::Model CM,
25 CPPTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsELFStreamer.cpp | 66 Reloc::Model RM = Subtarget.getRelocationModel(); local
67 if (RM == Reloc::PIC_ || RM == Reloc::Default)
69 else if (RM == Reloc::Static)
|
| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcMCTargetDesc.cpp | 64 static MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
71 CM = RM == Reloc::PIC_ ? CodeModel::Medium : CodeModel::Small;
73 X->InitMCCodeGenInfo(RM, CM, OL);
77 static MCCodeGenInfo *createSparcV9MCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
86 X->InitMCCodeGenInfo(RM, CM, OL);
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSubtarget.cpp | 33 // Return true if GV binds locally under reloc model RM.
34 static bool bindsLocally(const GlobalValue *GV, Reloc::Model RM) { argument
36 if (RM == Reloc::Static)
43 Reloc::Model RM,
52 return bindsLocally(GV, RM);
42 isPC32DBLSymbol(const GlobalValue *GV, Reloc::Model RM, CodeModel::Model CM) const argument
|
| H A D | SystemZTargetMachine.cpp | 24 Reloc::Model RM,
27 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
21 SystemZTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /external/mesa3d/src/glx/apple/ |
| H A D | Makefile | 17 RM=rm macro
|
| /external/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | BuiltinFunctionChecker.cpp | 59 MemRegionManager& RM = C.getStoreManager().getRegionManager(); local
61 RM.getAllocaRegion(CE, C.blockCount(), C.getLocationContext());
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetMachine.cpp | 32 Reloc::Model RM, CodeModel::Model CM,
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
29 AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCTargetDesc.cpp | 69 static MCCodeGenInfo *createHexagonMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
|
| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430TargetMachine.cpp | 32 Reloc::Model RM, CodeModel::Model CM,
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
27 MSP430TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreTargetMachine.cpp | 26 Reloc::Model RM, CodeModel::Model CM,
28 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
23 XCoreTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| H A D | AMDGPUTargetMachine.cpp | 44 Reloc::Model RM, CodeModel::Model CM,
48 LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel),
41 AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OptLevel ) argument
|
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonTargetMachine.cpp | 70 Reloc::Model RM,
73 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
67 HexagonTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /external/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCTargetDesc.cpp | 53 static MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
57 X->InitMCCodeGenInfo(RM, CM, OL);
|
| /external/llvm/lib/Target/NVPTX/MCTargetDesc/ |
| H A D | NVPTXMCTargetDesc.cpp | 55 StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) {
57 X->InitMCCodeGenInfo(RM, CM, OL);
54 createNVPTXMCCodeGenInfo( StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /external/llvm/lib/Target/R600/ |
| H A D | AMDGPUTargetMachine.cpp | 54 Reloc::Model RM, CodeModel::Model CM,
58 LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel),
51 AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OptLevel ) argument
|
| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcTargetMachine.cpp | 31 Reloc::Model RM, CodeModel::Model CM,
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
82 Reloc::Model RM,
85 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
94 Reloc::Model RM,
97 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
28 SparcTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64bit) argument
78 SparcV8TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
90 SparcV9TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /external/llvm/lib/Target/XCore/MCTargetDesc/ |
| H A D | XCoreMCTargetDesc.cpp | 65 static MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
69 if (RM == Reloc::Default) {
70 RM = Reloc::Static;
72 X->InitMCCodeGenInfo(RM, CM, OL);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | AMDGPUTargetMachine.cpp | 44 Reloc::Model RM, CodeModel::Model CM,
48 LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel),
41 AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OptLevel ) argument
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/ |
| H A D | AMDGPUMCTargetDesc.cpp | 56 static MCCodeGenInfo *createAMDGPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
60 X->InitMCCodeGenInfo(RM, CM, OL);
|