/external/llvm/utils/TableGen/ |
H A D | CTagsEmitter.cpp | 74 const std::map<std::string, Record *> &Defs = Records.getDefs(); local 77 Tags.reserve(Classes.size() + Defs.size()); 82 for (std::map<std::string, Record *>::const_iterator I = Defs.begin(), 83 E = Defs.end();
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H A D | InstrInfoEmitter.cpp | 347 std::vector<Record*> Defs = Inst->getValueAsListOfDefs("Defs"); local 348 if (!Defs.empty()) { 349 unsigned &IL = EmittedLists[Defs]; 350 if (!IL) PrintDefList(Defs, IL = ++ListNumber, OS); 504 std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs");
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/external/llvm/lib/CodeGen/ |
H A D | MachineCopyPropagation.cpp | 71 const DestList& Defs = SI->second; local 72 for (DestList::const_iterator I = Defs.begin(), E = Defs.end(); 233 SmallVector<unsigned, 2> Defs; local 250 Defs.push_back(Reg); 289 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 290 unsigned Reg = Defs[i];
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H A D | MachineInstrBundle.cpp | 122 SmallVector<MachineOperand*, 4> Defs; local 129 Defs.push_back(&MO); 154 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 155 MachineOperand &MO = *Defs[i]; 182 Defs.clear();
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H A D | LiveVariables.cpp | 444 SmallVectorImpl<unsigned> &Defs) { 483 Defs.push_back(Reg); // Remember this def. 487 SmallVectorImpl<unsigned> &Defs) { 488 while (!Defs.empty()) { 489 unsigned Reg = Defs.back(); 490 Defs.pop_back(); 534 SmallVector<unsigned, 4> Defs; local 539 HandlePhysRegDef(*II, 0, Defs); 602 HandlePhysRegDef(MOReg, MI, Defs); 604 UpdatePhysRegDefs(MI, Defs); 443 HandlePhysRegDef(unsigned Reg, MachineInstr *MI, SmallVectorImpl<unsigned> &Defs) argument 486 UpdatePhysRegDefs(MachineInstr *MI, SmallVectorImpl<unsigned> &Defs) argument 785 SmallSet<unsigned, 16> Defs, Kills; local [all...] |
H A D | RegisterPressure.cpp | 352 SmallVector<unsigned, 8> Defs; member in class:RegisterOperands 368 pushRegUnits(MO.getReg(), Defs); 398 std::bind1st(std::ptr_fun(containsReg), RegOpers.Defs)); 472 for (unsigned i = 0, e = RegOpers.Defs.size(); i < e; ++i) { 473 unsigned Reg = RegOpers.Defs[i]; 495 for (unsigned i = 0, e = RegOpers.Defs.size(); i < e; ++i) { 496 unsigned Reg = RegOpers.Defs[i]; 556 for (unsigned i = 0, e = RegOpers.Defs.size(); i < e; ++i) { 557 unsigned Reg = RegOpers.Defs[i]; 677 for (unsigned i = 0, e = RegOpers.Defs [all...] |
H A D | BranchFolding.cpp | 1484 SmallSet<unsigned,4> &Defs) { 1566 Defs.insert(*AI); 1595 SmallSet<unsigned, 4> Uses, Defs; 1597 findHoistingInsertPosAndDeps(MBB, TII, TRI, Uses, Defs); 1650 if (Defs.count(Reg) && !MO.isDead()) { 1666 if (Defs.count(Reg)) { 1480 findHoistingInsertPosAndDeps(MachineBasicBlock *MBB, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, SmallSet<unsigned,4> &Uses, SmallSet<unsigned,4> &Defs) argument
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H A D | LiveDebugVariables.cpp | 634 SmallVector<std::pair<SlotIndex, unsigned>, 16> Defs; local 639 Defs.push_back(std::make_pair(I.start(), I.value())); 642 for (unsigned i = 0; i != Defs.size(); ++i) { 643 SlotIndex Idx = Defs[i].first; 644 unsigned LocNo = Defs[i].second; 663 addDefsFromCopies(LI, LocNo, Kills, Defs, MRI, LIS);
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H A D | MachineLICM.cpp | 844 SmallVector<unsigned, 4> Defs; 855 Defs.push_back(Reg); 867 while (!Defs.empty()) { 868 unsigned Reg = Defs.pop_back_val(); 1338 SmallVector<unsigned, 2> Defs; local 1350 Defs.push_back(i); 1354 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 1355 unsigned Idx = Defs[i]; 1363 MRI->setRegClass(Dup->getOperand(Defs[j]).getReg(), OrigRCs[j]); 1368 for (unsigned i = 0, e = Defs [all...] |
H A D | TwoAddressInstructionPass.cpp | 799 SmallSet<unsigned, 2> Defs; local 808 Defs.insert(MOReg); 822 while (End->isCopy() && Defs.count(End->getOperand(1).getReg())) { 823 Defs.insert(End->getOperand(0).getReg()); 854 if (!MO.isDead() && Defs.count(MOReg)) 860 if (Defs.count(MOReg)) 984 SmallSet<unsigned, 2> Defs; local 1003 Defs.insert(MOReg); 1033 if (Defs.count(MOReg)) 1057 Defs [all...] |
H A D | IfConversion.cpp | 964 /// InitPredRedefs / UpdatePredRedefs - Defs by predicated instructions are 982 SmallVector<unsigned, 4> Defs; local 991 Defs.push_back(Reg); 999 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 1000 unsigned Reg = Defs[i]; 1352 SmallVector<unsigned, 4> Defs; local 1361 Defs.push_back(Reg); 1371 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 1372 unsigned Reg = Defs[i];
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/external/llvm/include/llvm/CodeGen/ |
H A D | ScheduleDAGInstrs.h | 121 /// Defs, Uses - Remember where defs and uses of each register are as we 125 Reg2SUnitsMap Defs; member in class:llvm::ScheduleDAGInstrs 132 /// unknown store, as we iterate. As with Defs and Uses, this is here
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/external/llvm/lib/Target/ARM/ |
H A D | Thumb2ITBlockPass.cpp | 44 SmallSet<unsigned, 4> &Defs, 55 SmallSet<unsigned, 4> &Defs, 85 Defs.insert(*Subreg); 106 SmallSet<unsigned, 4> &Defs, 121 if (Uses.count(DstReg) || Defs.count(SrcReg)) 163 SmallSet<unsigned, 4> Defs; local 176 Defs.clear(); 178 TrackDefUses(MI, Defs, Uses, TRI); 215 MoveCopyOutOfITBlock(NMI, CC, OCC, Defs, Uses)) { 224 TrackDefUses(NMI, Defs, Use 54 TrackDefUses(MachineInstr *MI, SmallSet<unsigned, 4> &Defs, SmallSet<unsigned, 4> &Uses, const TargetRegisterInfo *TRI) argument 104 MoveCopyOutOfITBlock(MachineInstr *MI, ARMCC::CondCodes CC, ARMCC::CondCodes OCC, SmallSet<unsigned, 4> &Defs, SmallSet<unsigned, 4> &Uses) argument [all...] |
H A D | A15SDOptimizer.cpp | 414 SmallVector<unsigned, 8> Defs; 424 Defs.push_back(MO.getReg()); 426 return Defs; 615 SmallVector<unsigned, 8> Defs = getReadDPRs(MI); local 618 for (SmallVectorImpl<unsigned>::iterator I = Defs.begin(), E = Defs.end();
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/external/llvm/lib/Target/Mips/ |
H A D | MipsDelaySlotFiller.cpp | 87 /// This function sets all caller-saved registers in Defs. 90 /// This function sets all unallocatable registers in Defs. 108 BitVector Defs, Uses; member in class:__anon21410::RegDefsUses 160 /// Update Defs and Uses. Return true if there exist dependences that 162 /// Defs. 170 SmallPtrSet<const Value*, 4> Uses, Defs; member in class:__anon21410::MemDefsUses 292 : TRI(*TM.getRegisterInfo()), Defs(TRI.getNumRegs(), false), 299 // If MI is a call, add RA to Defs to prevent users of RA from going into 302 Defs.set(Mips::RA); 308 Defs [all...] |
/external/llvm/lib/TableGen/ |
H A D | Record.cpp | 1840 std::vector<Record*> Defs; local 1843 Defs.push_back(DI->getDef()); 1849 return Defs; 1976 errs() << "Defs:\n"; 1995 OS << "------------- Defs -----------------\n"; 1996 const std::map<std::string, Record*> &Defs = RK.getDefs(); local 1997 for (std::map<std::string, Record*>::const_iterator I = Defs.begin(), 1998 E = Defs.end(); I != E; ++I) 2013 std::vector<Record*> Defs; local 2017 Defs [all...] |
/external/llvm/include/llvm/TableGen/ |
H A D | Record.h | 1648 std::map<std::string, Record*> Classes, Defs; member in class:llvm::RecordKeeper 1655 for (std::map<std::string, Record*>::iterator I = Defs.begin(), 1656 E = Defs.end(); I != E; ++I) 1661 const std::map<std::string, Record*> &getDefs() const { return Defs; } 1668 std::map<std::string, Record*>::const_iterator I = Defs.find(Name); 1669 return I == Defs.end() ? 0 : I->second; 1677 bool Ins = Defs.insert(std::make_pair(R->getName(), R)).second; 1691 assert(Defs.count(Name) && "Def does not exist!"); 1692 Defs.erase(Name);
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