Searched defs:MachineInstr (Results 1 - 8 of 8) sorted by relevance

/external/llvm/include/llvm/CodeGen/
H A DMachineInstr.h1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
10 // This file contains the declaration of the MachineInstr class, which is the
44 /// MachineInstr - Representation of each machine instruction.
50 class MachineInstr : public ilist_node<MachineInstr> { class in namespace:llvm
95 MachineInstr(const MachineInstr&) LLVM_DELETED_FUNCTION;
96 void operator=(const MachineInstr&) LLVM_DELETED_FUNCTION;
98 ~MachineInstr() LLVM_DELETED_FUNCTIO
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H A DMachineInstrBuilder.h11 // simplifying how MachineInstr's are created. It allows use of code like this:
47 MachineInstr *MI;
53 MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {}
57 operator MachineInstr*() const { return MI; }
58 MachineInstr *operator->() const { return MI; }
159 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b,
160 MachineInstr::mmo_iterator e) const {
186 const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const {
214 const MachineInstrBuilder &copyImplicitOps(const MachineInstr *OtherMI) {
250 MachineInstr *M
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/external/llvm/lib/Target/ARM/
H A DThumb1FrameLowering.cpp41 int NumBytes, unsigned MIFlags = MachineInstr::NoFlags) {
58 MachineInstr *Old = I;
110 MachineInstr::FrameSetup);
115 MachineInstr::FrameSetup);
176 .setMIFlags(MachineInstr::FrameSetup));
186 MachineInstr::FrameSetup);
223 static bool isCSRestore(MachineInstr *MI, const uint16_t *CSRegs) {
365 MIB.setMIFlags(MachineInstr::FrameSetup);
37 emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const TargetInstrInfo &TII, DebugLoc dl, const Thumb1RegisterInfo &MRI, int NumBytes, unsigned MIFlags = MachineInstr::NoFlags) argument
H A DThumb1RegisterInfo.cpp97 unsigned MIFlags = MachineInstr::NoFlags) {
325 static void removeOperands(MachineInstr &MI, unsigned i) {
349 MachineInstr &MI = *II;
490 MachineInstr &MI = *I;
562 MachineInstr &MI = *II;
90 emitThumbRegPlusImmInReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, bool CanChangeCC, const TargetInstrInfo &TII, const ARMBaseRegisterInfo& MRI, unsigned MIFlags = MachineInstr::NoFlags) argument
H A DARMFrameLowering.cpp92 static bool isCSRestore(MachineInstr *MI,
122 int NumBytes, unsigned MIFlags = MachineInstr::NoFlags,
165 MachineInstr::FrameSetup);
170 MachineInstr::FrameSetup);
227 .setMIFlag(MachineInstr::FrameSetup);
268 MachineInstr::FrameSetup);
467 MachineInstr *NewMI = prior(MBBI);
984 MachineInstr::FrameSetup);
986 MachineInstr::FrameSetup);
988 NumAlignedDPRCS2Regs, MachineInstr
119 emitSPUpdate(bool isARM, MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, const ARMBaseInstrInfo &TII, int NumBytes, unsigned MIFlags = MachineInstr::NoFlags, ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0) argument
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H A DARMCodeEmitter.cpp27 #include "llvm/CodeGen/MachineInstr.h"
77 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
85 void emitInstruction(const MachineInstr &MI);
92 void emitConstPoolInstruction(const MachineInstr &MI);
93 void emitMOVi32immInstruction(const MachineInstr &MI);
94 void emitMOVi2piecesInstruction(const MachineInstr &MI);
95 void emitLEApcrelInstruction(const MachineInstr &MI);
96 void emitLEApcrelJTInstruction(const MachineInstr &MI);
97 void emitPseudoMoveInstruction(const MachineInstr &MI);
99 void emitPseudoInstruction(const MachineInstr
176 VFPThumb2PostEncoder(const MachineInstr&MI, unsigned Val) const argument
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/external/llvm/lib/Target/Hexagon/
H A DHexagonVLIWPacketizer.cpp116 std::vector<MachineInstr*> IgnoreDepMIs;
128 bool ignorePseudoInstruction(MachineInstr *MI, MachineBasicBlock *MBB);
132 bool isSoloInstruction(MachineInstr *MI);
142 MachineBasicBlock::iterator addToPacket(MachineInstr *MI);
144 bool IsCallDependent(MachineInstr* MI, SDep::Kind DepType, unsigned DepReg);
145 bool PromoteToDotNew(MachineInstr* MI, SDep::Kind DepType,
148 bool CanPromoteToDotNew(MachineInstr* MI, SUnit* PacketSU,
150 std::map <MachineInstr*, SUnit*> MIToSUnit,
153 bool CanPromoteToNewValue(MachineInstr* MI, SUnit* PacketSU,
155 std::map <MachineInstr*, SUni
538 CanPromoteToNewValueStore( MachineInstr *MI, MachineInstr *PacketMI, unsigned DepReg, std::map <MachineInstr*, SUnit*> MIToSUnit) argument
719 CanPromoteToNewValue( MachineInstr *MI, SUnit *PacketSU, unsigned DepReg, std::map <MachineInstr*, SUnit*> MIToSUnit, MachineBasicBlock::iterator &MII) argument
748 CanPromoteToDotNew( MachineInstr *MI, SUnit *PacketSU, unsigned DepReg, std::map <MachineInstr*, SUnit*> MIToSUnit, MachineBasicBlock::iterator &MII, const TargetRegisterClass* RC ) argument
805 RestrictingDepExistInPacket(MachineInstr* MI, unsigned DepReg, std::map <MachineInstr*, SUnit*> MIToSUnit) argument
863 ArePredicatesComplements(MachineInstr* MI1, MachineInstr* MI2, std::map <MachineInstr*, SUnit*> MIToSUnit) argument
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/external/llvm/lib/CodeGen/
H A DMachineInstr.cpp1 //===-- lib/CodeGen/MachineInstr.cpp --------------------------------------===//
14 #include "llvm/CodeGen/MachineInstr.h"
55 if (MachineInstr *MI = getParent())
97 if (MachineInstr *MI = getParent())
117 if (MachineInstr *MI = getParent())
133 if (MachineInstr *MI = getParent())
259 if (const MachineInstr *MI = getParent())
517 // MachineInstr Implementation
520 void MachineInstr::addImplicitDefUseOperands(MachineFunction &MF) {
529 /// MachineInstr cto
532 MachineInstr::MachineInstr(MachineFunction &MF, const MCInstrDesc &tid, function in class:MachineInstr
550 MachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI) function in class:MachineInstr
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