| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| H A D | AMDGPUInstrInfo.cpp | 188 int64_t Offset1, int64_t Offset2,
190 assert(Offset2 > Offset1
195 return (NumLoads < 16 && (Offset2 - Offset1) < 16);
187 shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const argument
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 227 int64_t Offset1, Offset2; local
228 if (!TII->areLoadsFromSameBasePtr(Base, User, Offset1, Offset2) ||
229 Offset1 == Offset2)
233 if (O2SMap.insert(std::make_pair(Offset1, Base)).second)
234 Offsets.push_back(Offset1);
237 if (Offset2 < Offset1)
|
| H A D | SelectionDAG.cpp | 4362 // If this is (FI+Offset1)+Offset2, we can model it.
6219 int64_t Offset1 = 0; local
6222 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6225 return Offset1 == (Offset2 + Dist*Bytes);
|
| H A D | DAGCombiner.cpp | 7214 APInt Offset1 = cast<ConstantSDNode>(Offset)->getAPIntValue(); local
7225 if (X1 * Y0 * Y1 < 0) CNV = CNV + Offset1;
7226 else CNV = CNV - Offset1;
10148 int64_t Offset1, Offset2; local
10151 bool isFrameIndex1 = FindBaseOffset(Ptr1, Base1, Offset1, GV1, CV1);
10156 return !((Offset1 + Size1) <= Offset2 || (Offset2 + Size2) <= Offset1);
10164 Offset1 += MFI->getObjectOffset(cast<FrameIndexSDNode>(Base1)->getIndex());
10166 return !((Offset1 + Size1) <= Offset2 || (Offset2 + Size2) <= Offset1);
[all...] |
| /external/llvm/lib/Target/R600/ |
| H A D | AMDGPUInstrInfo.cpp | 168 int64_t Offset1, int64_t Offset2,
170 assert(Offset2 > Offset1
175 return (NumLoads < 16 && (Offset2 - Offset1) < 16);
167 shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const argument
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | AMDGPUInstrInfo.cpp | 188 int64_t Offset1, int64_t Offset2,
190 assert(Offset2 > Offset1
195 return (NumLoads < 16 && (Offset2 - Offset1) < 16);
187 shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const argument
|
| /external/llvm/include/llvm/Target/ |
| H A D | TargetInstrInfo.h | 593 int64_t &Offset1, int64_t &Offset2) const {
606 int64_t Offset1, int64_t Offset2,
592 areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, int64_t &Offset2) const argument
605 shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const argument
|
| /external/llvm/lib/Transforms/Scalar/ |
| H A D | MemCpyOptimizer.cpp | 109 int64_t Offset1 = GetOffsetFromIndex(GEP1, Idx, VariableIdxFound, TD); local
113 Offset = Offset2-Offset1;
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 1387 int64_t &Offset1,
1444 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue();
1464 int64_t Offset1, int64_t Offset2,
1469 assert(Offset2 > Offset1);
1471 if ((Offset2 - Offset1) / 8 > 64)
1386 areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, int64_t &Offset2) const argument
1463 shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const argument
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 4498 int64_t &Offset1, int64_t &Offset2) const {
4594 Offset1 = cast<ConstantSDNode>(Load1->getOperand(3))->getSExtValue();
4603 int64_t Offset1, int64_t Offset2,
4605 assert(Offset2 > Offset1);
4606 if ((Offset2 - Offset1) / 8 > 64)
4497 areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, int64_t &Offset2) const argument
4602 shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const argument
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 6900 int64_t Offset1 = 0; local
6902 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6905 return Offset1 == (Offset2 + Dist*Bytes);
|