Searched defs:SubReg0 (Results 1 - 4 of 4) sorted by relevance

/external/llvm/lib/CodeGen/
H A DTargetInstrInfo.cpp138 unsigned SubReg0 = HasDef ? MI->getOperand(0).getSubReg() : 0; local
149 SubReg0 = SubReg2;
154 SubReg0 = SubReg1;
165 MI->getOperand(0).setSubReg(SubReg0);
/external/llvm/lib/Target/R600/
H A DAMDGPUISelDAGToDAG.cpp295 SDValue RC, SubReg0, SubReg1; local
302 SubReg0 = CurDAG->getTargetConstant(AMDGPU::sub0_sub1, MVT::i32);
306 SubReg0 = CurDAG->getTargetConstant(AMDGPU::sub0, MVT::i32);
311 const SDValue Ops[] = { RC, N->getOperand(0), SubReg0,
/external/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1095 SDValue SubReg0 = DAG.getTargetConstant(SystemZ::even128(Is32Bit), VT); local
1098 VT, Result, SubReg0);
/external/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp1582 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::gsub_0, MVT::i32); local
1584 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 };
1593 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::ssub_0, MVT::i32); local
1595 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 };
1603 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::dsub_0, MVT::i32); local
1605 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 };
1613 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::qsub_0, MVT::i32); local
1615 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 };
1625 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::ssub_0, MVT::i32); local
1629 const SDValue Ops[] = { RegClass, V0, SubReg0, V
1639 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::dsub_0, MVT::i32); local
1653 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::qsub_0, MVT::i32); local
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