/external/iptables/include/linux/netfilter/ |
H A D | xt_devgroup.h | 18 __u32 dst_mask; member in struct:xt_devgroup_info
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/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/util/ |
H A D | u_surface.c | 346 uint32_t dst_mask; local 348 dst_mask = 0xffffff00; 351 dst_mask = 0xffffff; 354 dst_mask = ~dst_mask; 358 uint32_t tmp = *row & dst_mask; 359 *row++ = tmp | (zstencil & ~dst_mask);
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/external/mesa3d/src/gallium/auxiliary/util/ |
H A D | u_surface.c | 346 uint32_t dst_mask; local 348 dst_mask = 0xffffff00; 351 dst_mask = 0xffffff; 354 dst_mask = ~dst_mask; 358 uint32_t tmp = *row & dst_mask; 359 *row++ = tmp | (zstencil & ~dst_mask);
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/ |
H A D | i915_state_emit.c | 424 int dst_mask, 431 dst_mask | 446 int dst_mask = program[0] & A0_DEST_CHANNEL_ALL; local 461 emit_instruction(i915, A0_EXP, dst_mask & A0_DEST_CHANNEL_X, dst_reg, t1x_reg, 0, 0); 462 emit_instruction(i915, A0_EXP, dst_mask & A0_DEST_CHANNEL_Y, dst_reg, t1y_reg, 0, 0); 463 emit_instruction(i915, A0_EXP, dst_mask & A0_DEST_CHANNEL_Z, dst_reg, t1z_reg, 0, 0); 422 emit_instruction(struct i915_context *i915, int op, int dst_mask, int dst_reg, int src0_reg, int src1_reg, int src2_reg) argument
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/external/mesa3d/src/gallium/drivers/i915/ |
H A D | i915_state_emit.c | 424 int dst_mask, 431 dst_mask | 446 int dst_mask = program[0] & A0_DEST_CHANNEL_ALL; local 461 emit_instruction(i915, A0_EXP, dst_mask & A0_DEST_CHANNEL_X, dst_reg, t1x_reg, 0, 0); 462 emit_instruction(i915, A0_EXP, dst_mask & A0_DEST_CHANNEL_Y, dst_reg, t1y_reg, 0, 0); 463 emit_instruction(i915, A0_EXP, dst_mask & A0_DEST_CHANNEL_Z, dst_reg, t1z_reg, 0, 0); 422 emit_instruction(struct i915_context *i915, int op, int dst_mask, int dst_reg, int src0_reg, int src1_reg, int src2_reg) argument
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
H A D | radeon_compiler_util.c | 318 unsigned int dst_mask) 323 return dst_mask & rc_swizzle_to_writemask(src_swz); 312 rc_src_reads_dst_mask( rc_register_file src_file, unsigned int src_idx, unsigned int src_swz, rc_register_file dst_file, unsigned int dst_idx, unsigned int dst_mask) argument
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H A D | radeon_dataflow.c | 685 unsigned int dst_mask) 700 d->DstMask = dst_mask; 701 d->AliveWriteMask = dst_mask; 704 if (!dst_mask) 680 get_readers_for_single_write( void * userdata, struct rc_instruction * writer, rc_register_file dst_file, unsigned int dst_index, unsigned int dst_mask) argument
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
H A D | brw_wm_fp.c | 147 static struct prog_dst_register dst_mask( struct prog_dst_register reg, int mask ) function 272 dst_mask(inst0->DstReg, other_channel_mask), 300 dst_mask(pixel_xy, WRITEMASK_XY), 323 dst_mask(delta_xy, WRITEMASK_XY), 354 dst_mask(pixel_w, WRITEMASK_W), 386 dst_mask(dst, WRITEMASK_XY), 392 dst = dst_mask(dst, WRITEMASK_ZW); 430 dst_mask(dst, WRITEMASK_X), 438 dst_mask(dst, WRITEMASK_YZW), 452 dst_mask(ds [all...] |
/external/chromium_org/v8/src/arm/ |
H A D | macro-assembler-arm.h | 704 int dst_mask = 0xf << dst_reg_offset; local 706 int dst_reg = (instr & dst_mask) >> dst_reg_offset; 708 uint32_t non_register_mask = ~(dst_mask | src_mask);
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
H A D | radeon_compiler_util.c | 318 unsigned int dst_mask) 323 return dst_mask & rc_swizzle_to_writemask(src_swz); 312 rc_src_reads_dst_mask( rc_register_file src_file, unsigned int src_idx, unsigned int src_swz, rc_register_file dst_file, unsigned int dst_idx, unsigned int dst_mask) argument
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H A D | radeon_dataflow.c | 685 unsigned int dst_mask) 700 d->DstMask = dst_mask; 701 d->AliveWriteMask = dst_mask; 704 if (!dst_mask) 680 get_readers_for_single_write( void * userdata, struct rc_instruction * writer, rc_register_file dst_file, unsigned int dst_index, unsigned int dst_mask) argument
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | brw_wm_fp.c | 147 static struct prog_dst_register dst_mask( struct prog_dst_register reg, int mask ) function 272 dst_mask(inst0->DstReg, other_channel_mask), 300 dst_mask(pixel_xy, WRITEMASK_XY), 323 dst_mask(delta_xy, WRITEMASK_XY), 354 dst_mask(pixel_w, WRITEMASK_W), 386 dst_mask(dst, WRITEMASK_XY), 392 dst = dst_mask(dst, WRITEMASK_ZW); 430 dst_mask(dst, WRITEMASK_X), 438 dst_mask(dst, WRITEMASK_YZW), 452 dst_mask(ds [all...] |
/external/v8/src/arm/ |
H A D | macro-assembler-arm.h | 635 int dst_mask = 0xf << dst_reg_offset; local 637 int dst_reg = (instr & dst_mask) >> dst_reg_offset; 639 uint32_t non_register_mask = ~(dst_mask | src_mask);
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/external/chromium_org/third_party/mesa/src/src/mesa/program/ |
H A D | prog_optimize.c | 56 GLuint arg, GLuint dst_mask) 88 channel_mask = inst->DstReg.WriteMask & dst_mask; 516 GLuint dst_mask, src_mask; local 523 dst_mask = mov->DstReg.WriteMask; 552 (read_mask & dst_mask) == read_mask) { 573 dst_mask &= ~inst2->DstReg.WriteMask; 574 src_mask = get_src_arg_mask(mov, 0, dst_mask); 582 dst_mask &= get_dst_mask_for_mov(mov, src_mask); 584 if (dst_mask == 0) 797 const GLuint dst_mask local 55 get_src_arg_mask(const struct prog_instruction *inst, GLuint arg, GLuint dst_mask) argument [all...] |
/external/mesa3d/src/mesa/program/ |
H A D | prog_optimize.c | 56 GLuint arg, GLuint dst_mask) 88 channel_mask = inst->DstReg.WriteMask & dst_mask; 516 GLuint dst_mask, src_mask; local 523 dst_mask = mov->DstReg.WriteMask; 552 (read_mask & dst_mask) == read_mask) { 573 dst_mask &= ~inst2->DstReg.WriteMask; 574 src_mask = get_src_arg_mask(mov, 0, dst_mask); 582 dst_mask &= get_dst_mask_for_mov(mov, src_mask); 584 if (dst_mask == 0) 797 const GLuint dst_mask local 55 get_src_arg_mask(const struct prog_instruction *inst, GLuint arg, GLuint dst_mask) argument [all...] |
/external/opencv/ml/src/ |
H A D | mlboost.cpp | 1335 uchar* dst_mask; local 1348 dst_mask = (uchar*)(buf + var_count); 1397 dst_mask[i] = m; 1405 missing = cvMat( 1, var_count, CV_8UC1, dst_mask );
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/external/qemu/ |
H A D | vl-android.c | 2380 * dst_net:dst_mask:dst_port:redirect_ip:redirect_port OR 2381 * dst_net:dst_mask:[dp_range_start-dp_range_end]:redirect_ip:redirect_port 2384 char *dst_net, *dst_mask, *dst_port; local 2391 dst_mask = strtok(NULL, ":"); 2396 if (dst_net == NULL || dst_mask == NULL || dst_port == NULL || 2400 "dst_net:dst_mask:dst_port:redirect_ip:redirect_port or " 2401 "dst_net:dst_mask:[dp_range_start-dp_range_end]" 2412 if (inet_strtoip(dst_mask, &dmask) == -1) { 2413 fprintf(stderr, "Invalid destination IP mask: %s\n", dst_mask);
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/external/valgrind/main/VEX/priv/ |
H A D | guest_amd64_toIR.c | 17237 UShort dst_mask[2] = { 0x07FF, 0x7FF0 }; local 17242 assign(dst_maskV, mkV128( dst_mask[ (imm8 >> 2) & 1 ] ));
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