/external/smali/dexlib/src/main/java/org/jf/dexlib/Code/Format/ |
H A D | PackedSwitchDataPseudoInstruction.java | 33 import org.jf.dexlib.Code.Opcode; 51 super(Opcode.NOP); 63 super(Opcode.NOP); 151 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) { 152 if (opcode != Opcode.NOP) {
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H A D | Instruction3rc.java | 33 import org.jf.dexlib.Code.Opcode; 42 import static org.jf.dexlib.Code.Opcode.*; 50 public Instruction3rc(Opcode opcode, short regCount, int startReg, Item referencedItem) { 73 private Instruction3rc(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) { 110 private static void checkItem(Opcode opcode, Item item, int regCount) { 135 Opcode jumboOpcode = opcode.getJumboOpcode(); 144 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) {
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H A D | Instruction35c.java | 34 import org.jf.dexlib.Code.Opcode; 42 import static org.jf.dexlib.Code.Opcode.*; 53 public Instruction35c(Opcode opcode, int regCount, byte regD, byte regE, byte regF, byte regG, 79 protected Instruction35c(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) { 141 private static void checkItem(Opcode opcode, Item item, int regCount) { 166 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) {
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H A D | Instruction35ms.java | 34 import org.jf.dexlib.Code.Opcode; 50 public Instruction35ms(Opcode opcode, int regCount, byte regD, byte regE, byte regF, byte regG, 78 private Instruction35ms(Opcode opcode, byte[] buffer, int bufferIndex) { 131 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) {
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/external/llvm/include/llvm/CodeGen/ |
H A D | FastISel.h | 104 bool SelectOperator(const User *I, unsigned Opcode); 184 unsigned Opcode); 190 unsigned Opcode, 197 unsigned Opcode, 206 unsigned Opcode, 215 unsigned Opcode, 224 unsigned Opcode, 235 unsigned Opcode, 243 unsigned Opcode, 251 unsigned Opcode, [all...] |
/external/llvm/include/llvm/Analysis/ |
H A D | TargetTransformInfo.h | 111 virtual unsigned getOperationCost(unsigned Opcode, Type *Ty, 303 virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, 315 virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst, 320 virtual unsigned getCFInstrCost(unsigned Opcode) const; 323 virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, 328 virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val, 332 virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
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/external/chromium_org/third_party/mesa/src/src/mesa/program/ |
H A D | prog_opt_constant_fold.c | 139 switch (inst->Opcode) { 154 inst->Opcode = OPCODE_MOV; 184 inst->Opcode = OPCODE_MOV; 213 if (inst->Opcode >= OPCODE_DP3) 216 if (inst->Opcode == OPCODE_DP4) 219 inst->Opcode = OPCODE_MOV; 243 inst->Opcode = OPCODE_MOV; 267 inst->Opcode = OPCODE_MOV; 275 inst->Opcode = OPCODE_MOV; 299 inst->Opcode [all...] |
H A D | programopt.c | 90 newInst[i].Opcode = OPCODE_DP4; 162 newInst[0].Opcode = OPCODE_MUL; 174 newInst[i].Opcode = OPCODE_MAD; 189 newInst[3].Opcode = OPCODE_MAD; 301 if (inst->Opcode == OPCODE_END) 313 assert(inst->Opcode == OPCODE_END); /* we'll overwrite this inst */ 321 inst->Opcode = OPCODE_MAD; 342 inst->Opcode = OPCODE_MUL; 356 inst->Opcode = OPCODE_MUL; 369 inst->Opcode [all...] |
/external/mesa3d/src/mesa/program/ |
H A D | prog_opt_constant_fold.c | 139 switch (inst->Opcode) { 154 inst->Opcode = OPCODE_MOV; 184 inst->Opcode = OPCODE_MOV; 213 if (inst->Opcode >= OPCODE_DP3) 216 if (inst->Opcode == OPCODE_DP4) 219 inst->Opcode = OPCODE_MOV; 243 inst->Opcode = OPCODE_MOV; 267 inst->Opcode = OPCODE_MOV; 275 inst->Opcode = OPCODE_MOV; 299 inst->Opcode [all...] |
/external/javassist/src/main/javassist/ |
H A D | CtClass.java | 30 import javassist.bytecode.Opcode; 133 "booleanValue", "()Z", Opcode.IRETURN, 134 Opcode.T_BOOLEAN, 1); 138 "charValue", "()C", Opcode.IRETURN, 139 Opcode.T_CHAR, 1); 143 "byteValue", "()B", Opcode.IRETURN, 144 Opcode.T_BYTE, 1); 148 "shortValue", "()S", Opcode.IRETURN, 149 Opcode.T_SHORT, 1); 153 "intValue", "()I", Opcode [all...] |
H A D | CtConstructor.java | 161 return op0 == Opcode.RETURN // empty static initializer 162 || (op0 == Opcode.ALOAD_0 163 && it.byteAt(pos = it.next()) == Opcode.INVOKESPECIAL 167 && it.byteAt(it.next()) == Opcode.RETURN 384 iterator.writeByte(Opcode.POP, pos++); // this 385 iterator.writeByte(Opcode.NOP, pos); 386 iterator.writeByte(Opcode.NOP, pos + 1); 391 iterator.writeByte(it.is2byte() ? Opcode.POP2 : Opcode.POP,
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/external/javassist/src/main/javassist/bytecode/stackmap/ |
H A D | BasicBlock.java | 221 if ((Opcode.IFEQ <= op && op <= Opcode.IF_ACMPNE) 222 || op == Opcode.IFNULL || op == Opcode.IFNONNULL) { 227 else if (Opcode.GOTO <= op && op <= Opcode.LOOKUPSWITCH) 229 case Opcode.GOTO : 232 case Opcode.JSR : 235 case Opcode.RET : 238 case Opcode [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.cpp | 296 // If Opcode is a move that has a conditional variant, return that variant, 298 static unsigned getConditionalMove(unsigned Opcode) { argument 299 switch (Opcode) { 307 unsigned Opcode = MI->getOpcode(); local 309 getConditionalMove(Opcode)) 339 unsigned Opcode = MI->getOpcode(); local 341 if (unsigned CondOpcode = getConditionalMove(Opcode)) { 367 unsigned Opcode; local 369 Opcode = SystemZ::LR; 371 Opcode 439 interpretAndImmediate(unsigned Opcode) argument 477 unsigned Opcode = MI->getOpcode(); local 553 unsigned Opcode = MI->getOpcode(); local 737 getOpcodeForOffset(unsigned Opcode, int64_t Offset) const argument 822 getCompareAndBranch(unsigned Opcode, const MachineInstr *MI) const argument 842 unsigned Opcode; local [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
H A D | radeon_program_tex.c | 67 inst_mov->U.I.Opcode = RC_OPCODE_MUL; 89 inst_rcp->U.I.Opcode = RC_OPCODE_RCP; 100 inst_mul->U.I.Opcode = RC_OPCODE_MUL; 109 inst->U.I.Opcode = RC_OPCODE_TEX; 133 if (inst->U.I.Opcode != RC_OPCODE_TEX && 134 inst->U.I.Opcode != RC_OPCODE_TXB && 135 inst->U.I.Opcode != RC_OPCODE_TXP && 136 inst->U.I.Opcode != RC_OPCODE_TXD && 137 inst->U.I.Opcode != RC_OPCODE_TXL && 138 inst->U.I.Opcode ! [all...] |
H A D | radeon_vert_fc.c | 105 new_inst->U.I.Opcode = RC_ME_PRED_SEQ; 125 new_inst->U.I.Opcode = RC_OPCODE_ADD; 139 inst->U.I.Opcode = RC_OPCODE_RCP; 145 inst->U.I.Opcode = RC_ME_PRED_SET_CLR; 159 new_inst->U.I.Opcode = RC_ME_PRED_SET_RESTORE; 182 if (inst->Next->U.I.Opcode == RC_OPCODE_BRK) { 188 inst->U.I.Opcode = RC_ME_PRED_SEQ; 191 inst->U.I.Opcode = RC_ME_PRED_SNEQ; 195 inst->U.I.Opcode = RC_VE_PRED_SNEQ_PUSH; 221 switch (inst->U.I.Opcode) { [all...] |
H A D | radeon_optimize.c | 73 reader_data->Writer->U.I.PreSub.Opcode, 93 (inst->U.I.Opcode == RC_OPCODE_TEX || 94 inst->U.I.Opcode == RC_OPCODE_TXB || 95 inst->U.I.Opcode == RC_OPCODE_TXP || 96 inst->U.I.Opcode == RC_OPCODE_TXD || 97 inst->U.I.Opcode == RC_OPCODE_TXL || 98 inst->U.I.Opcode == RC_OPCODE_KIL)){ 217 inst->U.I.Opcode = RC_OPCODE_MUL; 224 inst->U.I.Opcode = RC_OPCODE_ADD; 230 inst->U.I.Opcode [all...] |
/external/mesa3d/src/gallium/drivers/r300/compiler/ |
H A D | radeon_program_tex.c | 67 inst_mov->U.I.Opcode = RC_OPCODE_MUL; 89 inst_rcp->U.I.Opcode = RC_OPCODE_RCP; 100 inst_mul->U.I.Opcode = RC_OPCODE_MUL; 109 inst->U.I.Opcode = RC_OPCODE_TEX; 133 if (inst->U.I.Opcode != RC_OPCODE_TEX && 134 inst->U.I.Opcode != RC_OPCODE_TXB && 135 inst->U.I.Opcode != RC_OPCODE_TXP && 136 inst->U.I.Opcode != RC_OPCODE_TXD && 137 inst->U.I.Opcode != RC_OPCODE_TXL && 138 inst->U.I.Opcode ! [all...] |
H A D | radeon_vert_fc.c | 105 new_inst->U.I.Opcode = RC_ME_PRED_SEQ; 125 new_inst->U.I.Opcode = RC_OPCODE_ADD; 139 inst->U.I.Opcode = RC_OPCODE_RCP; 145 inst->U.I.Opcode = RC_ME_PRED_SET_CLR; 159 new_inst->U.I.Opcode = RC_ME_PRED_SET_RESTORE; 182 if (inst->Next->U.I.Opcode == RC_OPCODE_BRK) { 188 inst->U.I.Opcode = RC_ME_PRED_SEQ; 191 inst->U.I.Opcode = RC_ME_PRED_SNEQ; 195 inst->U.I.Opcode = RC_VE_PRED_SNEQ_PUSH; 221 switch (inst->U.I.Opcode) { [all...] |
H A D | radeon_optimize.c | 73 reader_data->Writer->U.I.PreSub.Opcode, 93 (inst->U.I.Opcode == RC_OPCODE_TEX || 94 inst->U.I.Opcode == RC_OPCODE_TXB || 95 inst->U.I.Opcode == RC_OPCODE_TXP || 96 inst->U.I.Opcode == RC_OPCODE_TXD || 97 inst->U.I.Opcode == RC_OPCODE_TXL || 98 inst->U.I.Opcode == RC_OPCODE_KIL)){ 217 inst->U.I.Opcode = RC_OPCODE_MUL; 224 inst->U.I.Opcode = RC_OPCODE_ADD; 230 inst->U.I.Opcode [all...] |
/external/smali/smali/src/main/antlr3/ |
H A D | smaliTreeWalker.g | 963 Opcode opcode = Opcode.getOpcodeByName($INSTRUCTION_FORMAT10t.text); 974 Opcode opcode = Opcode.getOpcodeByName($INSTRUCTION_FORMAT10x.text); 982 Opcode opcode = Opcode.getOpcodeByName($INSTRUCTION_FORMAT11n.text); 995 Opcode opcode = Opcode.getOpcodeByName($INSTRUCTION_FORMAT11x.text); 1005 Opcode opcode = Opcode [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMHazardRecognizer.cpp | 26 unsigned Opcode = MCID.getOpcode(); local 27 if (Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD)
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | SIInstrInfo.h | 49 virtual bool isMov(unsigned Opcode) const;
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCPredicates.cpp | 19 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) { argument 20 switch (Opcode) { 49 PPC::Predicate PPC::getSwappedPredicate(PPC::Predicate Opcode) { argument 50 switch (Opcode) {
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 54 int Opcode = isU6 ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; local 55 BuildMI(MBB, I, dl, TII.get(Opcode), DstReg) 69 int Opcode = isU6 ? XCore::STWSP_ru6 : XCore::STWSP_lru6; local 70 BuildMI(MBB, I, dl, TII.get(Opcode)) 122 int Opcode; local 124 Opcode = (isU6) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6; 128 Opcode = (isU6) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; 130 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize); 225 int Opcode = (isU6) ? XCore::RETSP_u6 : XCore::RETSP_lu6; local 226 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opcode)) 231 int Opcode = (isU6) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; local 336 int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; local 341 int Opcode = isU6 ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; local [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | SIInstrInfo.h | 49 virtual bool isMov(unsigned Opcode) const;
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