/external/llvm/lib/Target/Mips/ |
H A D | MipsISelDAGToDAG.cpp | 140 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, argument 142 assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
|
H A D | MipsISelDAGToDAG.h | 83 char ConstraintCode,
|
/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.h | 56 const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps);
|
H A D | NVPTXISelDAGToDAG.cpp | 2422 const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps) { 2424 switch (ConstraintCode) { 2421 SelectInlineAsmMemoryOperand( const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps) argument
|
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 53 char ConstraintCode, 196 char ConstraintCode, 199 switch (ConstraintCode) { 195 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps) argument
|
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 111 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, 287 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, argument 290 switch (ConstraintCode) {
|
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 87 char ConstraintCode, 149 char ConstraintCode, 151 switch (ConstraintCode) { 148 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps) argument
|
/external/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGISel.h | 88 char ConstraintCode, 87 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps) argument
|
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 2043 assert(!ConstraintCode.empty() && "No known constraint!"); 2044 return isdigit(static_cast<unsigned char>(ConstraintCode[0])); 2050 assert(!ConstraintCode.empty() && "No known constraint!"); 2051 return atoi(ConstraintCode.c_str()); 2226 getRegForInlineAsmConstraint(OpInfo.ConstraintCode, 2229 getRegForInlineAsmConstraint(Input.ConstraintCode, 2401 OpInfo.ConstraintCode = OpInfo.Codes[BestIdx]; 2407 /// OpInfo.ConstraintCode and OpInfo.ConstraintType. 2415 OpInfo.ConstraintCode = OpInfo.Codes[0]; 2416 OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode); [all...] |
H A D | SelectionDAGBuilder.cpp | 5777 TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode, 5968 TLI->getRegForInlineAsmConstraint(OpInfo.ConstraintCode, 5971 TLI->getRegForInlineAsmConstraint(Input.ConstraintCode, 6135 Twine(OpInfo.ConstraintCode) + "'"); 6241 TLI->LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode, 6247 Twine(OpInfo.ConstraintCode) + "'"); 6283 Twine(OpInfo.ConstraintCode) + "'"); 6292 Twine(OpInfo.ConstraintCode) + "'");
|
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelDAGToDAG.cpp | 295 char ConstraintCode, 1054 char ConstraintCode, 1056 assert(ConstraintCode == 'm' && "Unexpected constraint code"); 1053 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps) argument
|
/external/llvm/include/llvm/Target/ |
H A D | TargetLowering.h | 2108 std::string ConstraintCode; 2133 ConstraintCode(info.ConstraintCode), 2166 /// AsmOperandInfo, setting OpInfo.ConstraintCode and OpInfo.ConstraintType.
|
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 88 char ConstraintCode, 1589 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, argument 1593 switch (ConstraintCode) {
|
/external/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 222 char ConstraintCode, 2783 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, argument 2786 switch (ConstraintCode) {
|
/external/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 269 char ConstraintCode, 3642 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, argument 3644 assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
|
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 167 char ConstraintCode, 166 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps) argument
|