Searched refs:Instr (Results 1 - 25 of 63) sorted by relevance

123

/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DAMDILUtilityFunctions.h18 #define ExpandCaseTo32bitIntTypes(Instr) \
19 case Instr##_i32:
21 #define ExpandCaseTo32bitIntTruncTypes(Instr) \
22 case Instr##_i32i8: \
23 case Instr##_i32i16:
25 #define ExpandCaseToIntTypes(Instr) \
26 ExpandCaseTo32bitIntTypes(Instr)
28 #define ExpandCaseToIntTruncTypes(Instr) \
29 ExpandCaseTo32bitIntTruncTypes(Instr)
31 #define ExpandCaseToFloatTypes(Instr) \
[all...]
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDILUtilityFunctions.h18 #define ExpandCaseTo32bitIntTypes(Instr) \
19 case Instr##_i32:
21 #define ExpandCaseTo32bitIntTruncTypes(Instr) \
22 case Instr##_i32i8: \
23 case Instr##_i32i16:
25 #define ExpandCaseToIntTypes(Instr) \
26 ExpandCaseTo32bitIntTypes(Instr)
28 #define ExpandCaseToIntTruncTypes(Instr) \
29 ExpandCaseTo32bitIntTruncTypes(Instr)
31 #define ExpandCaseToFloatTypes(Instr) \
[all...]
/external/v8/src/arm/
H A Dconstants-arm.h116 // General constants are in an anonymous enum in class Instr.
181 // Instr is merely used by the Assembler to distinguish 32bit integers
185 typedef int32_t Instr; typedef in namespace:v8::internal
446 extern const Instr kPopInstruction;
450 extern const Instr kPushRegPattern;
454 extern const Instr kPopRegPattern;
457 extern const Instr kMovLrPc;
459 extern const Instr kLdrPCMask;
460 extern const Instr kLdrPCPattern;
462 extern const Instr kBlxRegMas
[all...]
H A Dassembler-arm.h427 bool is_single_instruction(Instr instr = 0) const;
602 extern const Instr kMovLrPc;
603 extern const Instr kLdrPCMask;
604 extern const Instr kLdrPCPattern;
605 extern const Instr kBlxRegMask;
606 extern const Instr kBlxRegPattern;
607 extern const Instr kBlxIp;
609 extern const Instr kMovMvnMask;
610 extern const Instr kMovMvnPattern;
611 extern const Instr kMovMvnFli
[all...]
H A Dassembler-arm.cc144 Instr* pc = reinterpret_cast<Instr*>(pc_);
145 Instr* instr = reinterpret_cast<Instr*>(instructions);
239 const Instr kPopInstruction =
244 const Instr kPushRegPattern =
248 const Instr kPopRegPattern =
251 const Instr kMovLrPc = al | MOV | kRegister_pc_Code | kRegister_lr_Code * B12;
253 const Instr kLdrPCMask = kCondMask | 15 * B24 | 7 * B20 | 15 * B16;
254 const Instr kLdrPCPatter
[all...]
H A Dassembler-arm-inl.h204 Instr current_instr = Assembler::instr_at(pc_);
205 Instr next_instr = Assembler::instr_at(pc_ + Assembler::kInstrSize);
223 Instr current_instr = Assembler::instr_at(pc_);
325 void Assembler::emit(Instr x) {
327 *reinterpret_cast<Instr*>(pc_) = x;
334 Instr instr = Memory::int32_at(target_pc);
/external/chromium_org/v8/src/arm/
H A Dconstants-arm.h75 // General constants are in an anonymous enum in class Instr.
140 // Instr is merely used by the Assembler to distinguish 32bit integers
144 typedef int32_t Instr; typedef in namespace:v8::internal
433 extern const Instr kPopInstruction;
437 extern const Instr kPushRegPattern;
441 extern const Instr kPopRegPattern;
444 extern const Instr kMovLrPc;
446 extern const Instr kLdrPCMask;
447 extern const Instr kLdrPCPattern;
449 extern const Instr kVldrDPCMas
[all...]
H A Dassembler-arm.h561 bool is_single_instruction(const Assembler* assembler, Instr instr = 0) const;
677 extern const Instr kMovLrPc;
678 extern const Instr kLdrPCMask;
679 extern const Instr kLdrPCPattern;
680 extern const Instr kBlxRegMask;
681 extern const Instr kBlxRegPattern;
682 extern const Instr kBlxIp;
684 extern const Instr kMovMvnMask;
685 extern const Instr kMovMvnPattern;
686 extern const Instr kMovMvnFli
[all...]
H A Dassembler-arm.cc300 Instr* pc = reinterpret_cast<Instr*>(pc_);
301 Instr* instr = reinterpret_cast<Instr*>(instructions);
460 const Instr kPopInstruction =
465 const Instr kPushRegPattern =
469 const Instr kPopRegPattern =
472 const Instr kMovLrPc = al | MOV | kRegister_pc_Code | kRegister_lr_Code * B12;
474 const Instr kLdrPCMask = 15 * B24 | 7 * B20 | 15 * B16;
475 const Instr kLdrPCPatter
[all...]
H A Dassembler-arm-inl.h266 Instr current_instr = Assembler::instr_at(pc_);
267 Instr next_instr = Assembler::instr_at(pc_ + Assembler::kInstrSize);
277 Instr current_instr = Assembler::instr_at(pc_);
383 void Assembler::emit(Instr x) {
385 *reinterpret_cast<Instr*>(pc_) = x;
392 Instr instr = Memory::int32_at(target_pc);
443 Instr candidate_instr(Memory::int32_at(candidate));
477 static Instr EncodeMovwImmediate(uint32_t immediate) {
/external/chromium_org/v8/src/mips/
H A Dassembler-mips.h520 static const int kInstrSize = sizeof(Instr);
886 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); }
887 static void instr_at_put(byte* pc, Instr instr) {
888 *reinterpret_cast<Instr*>(pc) = instr;
890 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); }
891 void instr_at_put(int pos, Instr instr) {
892 *reinterpret_cast<Instr*>(buffer_ + pos) = instr;
896 static bool IsBranch(Instr inst
[all...]
H A Dconstants-mips.h173 typedef int32_t Instr; typedef in namespace:v8::internal
581 extern const Instr kPopInstruction;
583 extern const Instr kPushInstruction;
585 extern const Instr kPushRegPattern;
587 extern const Instr kPopRegPattern;
588 extern const Instr kLwRegFpOffsetPattern;
589 extern const Instr kSwRegFpOffsetPattern;
590 extern const Instr kLwRegFpNegOffsetPattern;
591 extern const Instr kSwRegFpNegOffsetPattern;
593 extern const Instr kRtMas
[all...]
H A Dassembler-mips.cc216 Instr* pc = reinterpret_cast<Instr*>(pc_);
217 Instr* instr = reinterpret_cast<Instr*>(instructions);
270 const Instr kPopInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
273 const Instr kPushInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
276 const Instr kPushRegPattern = SW | (kRegister_sp_Code << kRsShift)
279 const Instr kPopRegPattern = LW | (kRegister_sp_Code << kRsShift)
282 const Instr kLwRegFpOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
285 const Instr kSwRegFpOffsetPatter
[all...]
H A Dassembler-mips-inl.h323 Instr instr0 = Assembler::instr_at(pc_);
324 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize);
325 Instr instr2 = Assembler::instr_at(pc_ + 2 * Assembler::kInstrSize);
336 Instr current_instr = Assembler::instr_at(pc_);
413 void Assembler::emit(Instr x) {
417 *reinterpret_cast<Instr*>(pc_) = x;
/external/v8/src/mips/
H A Dassembler-mips.h593 static const int kInstrSize = sizeof(Instr);
952 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); }
953 static void instr_at_put(byte* pc, Instr instr) {
954 *reinterpret_cast<Instr*>(pc) = instr;
956 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); }
957 void instr_at_put(int pos, Instr instr) {
958 *reinterpret_cast<Instr*>(buffer_ + pos) = instr;
962 static bool IsBranch(Instr inst
[all...]
H A Dconstants-mips.h172 typedef int32_t Instr; typedef in namespace:v8::internal
570 extern const Instr kPopInstruction;
572 extern const Instr kPushInstruction;
574 extern const Instr kPushRegPattern;
576 extern const Instr kPopRegPattern;
577 extern const Instr kLwRegFpOffsetPattern;
578 extern const Instr kSwRegFpOffsetPattern;
579 extern const Instr kLwRegFpNegOffsetPattern;
580 extern const Instr kSwRegFpNegOffsetPattern;
582 extern const Instr kRtMas
[all...]
H A Dassembler-mips.cc190 Instr* pc = reinterpret_cast<Instr*>(pc_);
191 Instr* instr = reinterpret_cast<Instr*>(instructions);
240 const Instr kPopInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
243 const Instr kPushInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
246 const Instr kPushRegPattern = SW | (kRegister_sp_Code << kRsShift)
249 const Instr kPopRegPattern = LW | (kRegister_sp_Code << kRsShift)
252 const Instr kLwRegFpOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
255 const Instr kSwRegFpOffsetPatter
[all...]
H A Dassembler-mips-inl.h275 Instr instr0 = Assembler::instr_at(pc_);
276 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize);
277 Instr instr2 = Assembler::instr_at(pc_ + 2 * Assembler::kInstrSize);
288 Instr current_instr = Assembler::instr_at(pc_);
361 void Assembler::emit(Instr x) {
365 *reinterpret_cast<Instr*>(pc_) = x;
/external/llvm/lib/Transforms/Utils/
H A DBypassSlowDivision.cpp84 Instruction *Instr = J; local
85 Value *Dividend = Instr->getOperand(0);
86 Value *Divisor = Instr->getOperand(1);
141 PHINode *QuoPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2);
144 PHINode *RemPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2);
148 // Replace Instr with appropriate phi node
150 Instr->replaceAllUsesWith(QuoPhi);
152 Instr->replaceAllUsesWith(RemPhi);
153 Instr->eraseFromParent();
192 Instruction *Instr local
[all...]
/external/llvm/lib/Target/R600/
H A DR600OptimizeVectorRegisters.cpp59 MachineInstr *Instr; member in class:__anon21464::RegSeqInfo
62 RegSeqInfo(MachineRegisterInfo &MRI, MachineInstr *MI) : Instr(MI) {
64 for (unsigned i = 1, e = Instr->getNumOperands(); i < e; i+=2) {
65 MachineOperand &MO = Instr->getOperand(i);
66 unsigned Chan = Instr->getOperand(i + 1).getImm();
76 return RSI.Instr == Instr;
176 unsigned Reg = RSI->Instr->getOperand(0).getReg();
177 MachineBasicBlock::iterator Pos = RSI->Instr;
181 unsigned SrcVec = BaseRSI->Instr
[all...]
/external/chromium_org/third_party/openssl/openssl/crypto/des/times/
H A Daix.cc6 Data/Instr Cache : 16 K
/external/openssl/crypto/des/times/
H A Daix.cc6 Data/Instr Cache : 16 K
/external/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h254 MachineInstr *Instr; // Alternatively, a MachineInstr. member in class:llvm::SUnit
312 : Node(node), Instr(0), OrigNode(0), SchedClass(0), NodeNum(nodenum),
326 : Node(0), Instr(instr), OrigNode(0), SchedClass(0), NodeNum(nodenum),
339 : Node(0), Instr(0), OrigNode(0), SchedClass(0), NodeNum(BoundaryID),
362 assert(!Instr && "Setting SDNode of SUnit with MachineInstr!");
369 assert(!Instr && "Reading SDNode of SUnit with MachineInstr!");
375 bool isInstr() const { return Instr; }
381 Instr = MI;
388 return Instr;
H A DLiveIntervalAnalysis.h179 bool isNotInMIMap(const MachineInstr* Instr) const {
180 return !Indexes->hasIndex(Instr);
/external/llvm/lib/MC/
H A DMCDwarf.cpp895 const MCCFIInstruction &Instr);
946 const MCCFIInstruction &Instr) {
950 switch (Instr.getOperation()) {
952 unsigned Reg1 = Instr.getRegister();
953 unsigned Reg2 = Instr.getRegister2();
965 unsigned Reg = Instr.getRegister();
977 Instr.getOperation() == MCCFIInstruction::OpAdjustCfaOffset;
984 CFAOffset += Instr.getOffset();
986 CFAOffset = -Instr.getOffset();
1000 Streamer.AddComment(Twine("Reg ") + Twine(Instr
945 EmitCFIInstruction(MCStreamer &Streamer, const MCCFIInstruction &Instr) argument
1097 const MCCFIInstruction &Instr = Instrs[i]; local
[all...]

Completed in 867 milliseconds

123