Searched refs:REG_TYPE_R (Results 1 - 14 of 14) sorted by relevance

/external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/
H A Di915_fpc_emit.c170 if (GET_UREG_TYPE(dest) == REG_TYPE_R)
223 tempReg = UREG(REG_TYPE_R, temp); /* make i915 register */
255 if (GET_UREG_TYPE(coord) == REG_TYPE_R &&
270 if (GET_UREG_TYPE(dest) == REG_TYPE_R)
290 return swizzle(UREG(REG_TYPE_R, 0), ZERO, ZERO, ZERO, ZERO);
292 return swizzle(UREG(REG_TYPE_R, 0), ONE, ONE, ONE, ONE);
H A Di915_state_emit.c451 int t1_reg = UREG(REG_TYPE_R, 1);
452 int t1x_reg = swizzle(UREG(REG_TYPE_R, 1), X, X, X, X);
453 int t1y_reg = swizzle(UREG(REG_TYPE_R, 1), Y, Y, Y, Y);
454 int t1z_reg = swizzle(UREG(REG_TYPE_R, 1), Z, Z, Z, Z);
H A Di915_reg.h498 #define REG_TYPE_R 0 /* temporary regs, no need to macro
H A Di915_fpc_translate.c193 src = UREG(REG_TYPE_R, index);
313 return UREG(REG_TYPE_R, dest->Register.Index);
/external/mesa3d/src/gallium/drivers/i915/
H A Di915_fpc_emit.c170 if (GET_UREG_TYPE(dest) == REG_TYPE_R)
223 tempReg = UREG(REG_TYPE_R, temp); /* make i915 register */
255 if (GET_UREG_TYPE(coord) == REG_TYPE_R &&
270 if (GET_UREG_TYPE(dest) == REG_TYPE_R)
290 return swizzle(UREG(REG_TYPE_R, 0), ZERO, ZERO, ZERO, ZERO);
292 return swizzle(UREG(REG_TYPE_R, 0), ONE, ONE, ONE, ONE);
H A Di915_state_emit.c451 int t1_reg = UREG(REG_TYPE_R, 1);
452 int t1x_reg = swizzle(UREG(REG_TYPE_R, 1), X, X, X, X);
453 int t1y_reg = swizzle(UREG(REG_TYPE_R, 1), Y, Y, Y, Y);
454 int t1z_reg = swizzle(UREG(REG_TYPE_R, 1), Z, Z, Z, Z);
H A Di915_reg.h498 #define REG_TYPE_R 0 /* temporary regs, no need to macro
H A Di915_fpc_translate.c193 src = UREG(REG_TYPE_R, index);
313 return UREG(REG_TYPE_R, dest->Register.Index);
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i915/
H A Di915_program.c85 return UREG(REG_TYPE_R, (bit - 1));
199 if (GET_UREG_TYPE(dest) == REG_TYPE_R)
214 return UREG(REG_TYPE_R, bit - 1);
254 if ((GET_UREG_TYPE(coord) != REG_TYPE_R) &&
275 if (GET_UREG_TYPE(coord) == REG_TYPE_R &&
291 if (GET_UREG_TYPE(dest) == REG_TYPE_R)
306 return swizzle(UREG(REG_TYPE_R, 0), ZERO, ZERO, ZERO, ZERO);
308 return swizzle(UREG(REG_TYPE_R, 0), ONE, ONE, ONE, ONE);
H A Di915_reg.h370 #define REG_TYPE_R 0 /* temporary regs, no need to macro
H A Di915_fragprog.c96 src = UREG(REG_TYPE_R, source->Index);
222 return UREG(REG_TYPE_R, inst->DstReg.Index);
/external/mesa3d/src/mesa/drivers/dri/i915/
H A Di915_program.c85 return UREG(REG_TYPE_R, (bit - 1));
199 if (GET_UREG_TYPE(dest) == REG_TYPE_R)
214 return UREG(REG_TYPE_R, bit - 1);
254 if ((GET_UREG_TYPE(coord) != REG_TYPE_R) &&
275 if (GET_UREG_TYPE(coord) == REG_TYPE_R &&
291 if (GET_UREG_TYPE(dest) == REG_TYPE_R)
306 return swizzle(UREG(REG_TYPE_R, 0), ZERO, ZERO, ZERO, ZERO);
308 return swizzle(UREG(REG_TYPE_R, 0), ONE, ONE, ONE, ONE);
H A Di915_reg.h370 #define REG_TYPE_R 0 /* temporary regs, no need to macro
H A Di915_fragprog.c96 src = UREG(REG_TYPE_R, source->Index);
222 return UREG(REG_TYPE_R, inst->DstReg.Index);

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