Searched refs:R_SS (Results 1 - 10 of 10) sorted by relevance

/external/qemu/target-i386/
H A Dop_helper.c243 } else if (seg_reg == R_SS) {
266 if (seg_reg == R_SS || seg_reg == R_CS)
495 tss_load_seg(R_SS, new_segs[R_SS]);
695 if (env->segs[R_SS].flags & DESC_B_MASK)
700 ssp = env->segs[R_SS].base + esp;
765 sp_mask = get_sp_mask(env->segs[R_SS].flags);
766 ssp = env->segs[R_SS].base;
794 PUSHL(ssp, esp, sp_mask, env->segs[R_SS].selector);
811 PUSHW(ssp, esp, sp_mask, env->segs[R_SS]
[all...]
H A Dhax-all.c730 get_seg(&env->segs[R_SS], &sregs->_ss);
749 set_v8086_seg(&sregs->_ss, &env->segs[R_SS]);
756 set_seg(&sregs->_ss, &env->segs[R_SS]);
807 hflags |= (env->segs[R_SS].flags & DESC_B_MASK) >>
816 env->segs[R_SS].base) != 0) <<
H A Dkvm.c401 set_v8086_seg(&sregs.ss, &env->segs[R_SS]);
408 set_seg(&sregs.ss, &env->segs[R_SS]);
515 get_seg(&env->segs[R_SS], &sregs.ss);
560 hflags |= (env->segs[R_SS].flags & DESC_B_MASK) >>
569 env->segs[R_SS].base) != 0) <<
H A Dcpu.h71 #define R_SS 2 macro
748 new_hflags = (env->segs[R_SS].flags & DESC_B_MASK)
764 env->segs[R_SS].base) != 0) <<
H A Dtranslate.c2062 override = R_SS;
2135 override = R_SS;
2398 because ss32 may change. For R_SS, translation must always
2401 if (seg_reg == R_SS || (s->code32 && seg_reg < R_FS))
2405 if (seg_reg == R_SS)
2474 gen_op_addl_A0_seg(R_SS);
2479 gen_op_addl_A0_seg(R_SS);
2514 gen_op_addl_A0_seg(R_SS);
2518 gen_op_addl_A0_seg(R_SS);
2542 gen_op_addl_A0_seg(R_SS);
[all...]
H A Dhelper.c508 cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffff,
/external/qemu/
H A Dkqemu.c531 cpu_x86_load_seg_cache(env, R_SS, (selector + 8) & 0xfffc,
552 cpu_x86_load_seg_cache(env, R_SS, (selector + 8) & 0xfffc,
835 new_hflags |= (env->segs[R_SS].flags & DESC_B_MASK)
849 env->segs[R_SS].base) != 0) <<
H A Dgdbstub.c540 case 3: GET_REG32(env->segs[R_SS].selector);
599 case 3: LOAD_SEG(11, R_SS); return 4;
/external/valgrind/main/VEX/priv/
H A Dguest_x86_toIR.c309 #define R_SS 2 macro
492 case R_SS: return OFFB_SS;
1293 case R_SS: return "%ss";
13801 dis_pop_segreg( R_SS, sz ); break;
13942 dis_push_segreg( R_SS, sz ); break;
H A Dguest_amd64_toIR.c472 #define R_SS 2 macro
2116 //.. case R_SS: return "%ss";

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