/external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/ |
H A D | sse4.asm | 119 pinsrd xmm1, eax, 5 label 120 pinsrd xmm1, [0], 5 label 121 pinsrd xmm1, dword [0], 5 label
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H A D | avx.asm | 1581 pinsrd xmm1, eax, 5 label 1582 pinsrd xmm1, dword [rax], 5 label 1583 pinsrd xmm1, [rax], byte 5 label
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/external/chromium_org/third_party/openssl/openssl/crypto/perlasm/ |
H A D | x86asm.pl | 94 sub ::pinsrd 99 { &::generic("pinsrd",@_); }
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H A D | x86_64-xlate.pl | 706 my $pinsrd = sub {
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/external/openssl/crypto/perlasm/ |
H A D | x86asm.pl | 94 sub ::pinsrd 99 { &::generic("pinsrd",@_); }
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H A D | x86_64-xlate.pl | 706 my $pinsrd = sub {
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/external/chromium_org/third_party/openssl/openssl/crypto/aes/asm/ |
H A D | aesni-x86.pl | 812 &pinsrd ($inout5,$key_,3); # wipe 32-bit counter 821 &pinsrd ($rndkey1,$rounds_,0); 823 &pinsrd ($rndkey0,$key_,0); 825 &pinsrd ($rndkey1,$rounds_,1); 827 &pinsrd ($rndkey0,$key_,1); 829 &pinsrd ($rndkey1,$rounds_,2); 831 &pinsrd ($rndkey0,$key_,2);
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H A D | aesni-x86_64.pl | 1049 pinsrd \$3,$rounds,$ivec # wipe 32-bit counter 1055 pinsrd \$0,$rnds_,$iv0 1057 pinsrd \$0,$key_,$iv1 1059 pinsrd \$1,$rnds_,$iv0 1061 pinsrd \$1,$key_,$iv1 1063 pinsrd \$2,$rnds_,$iv0 1065 pinsrd \$2,$key_,$iv1
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/external/openssl/crypto/aes/asm/ |
H A D | aesni-x86.pl | 812 &pinsrd ($inout5,$key_,3); # wipe 32-bit counter 821 &pinsrd ($rndkey1,$rounds_,0); 823 &pinsrd ($rndkey0,$key_,0); 825 &pinsrd ($rndkey1,$rounds_,1); 827 &pinsrd ($rndkey0,$key_,1); 829 &pinsrd ($rndkey1,$rounds_,2); 831 &pinsrd ($rndkey0,$key_,2);
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H A D | aesni-x86_64.pl | 1049 pinsrd \$3,$rounds,$ivec # wipe 32-bit counter 1055 pinsrd \$0,$rnds_,$iv0 1057 pinsrd \$0,$key_,$iv1 1059 pinsrd \$1,$rnds_,$iv0 1061 pinsrd \$1,$key_,$iv1 1063 pinsrd \$2,$rnds_,$iv0 1065 pinsrd \$2,$key_,$iv1
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/external/chromium_org/v8/src/ia32/ |
H A D | assembler-ia32.h | 1078 void pinsrd(XMMRegister dst, Register src, int8_t offset) { 1079 pinsrd(dst, Operand(src), offset); 1081 void pinsrd(XMMRegister dst, const Operand& src, int8_t offset);
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H A D | assembler-ia32.cc | 2485 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) { function in class:v8::internal::Assembler
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H A D | lithium-codegen-ia32.cc | 1889 __ pinsrd(res, Operand(temp), 1); 1893 __ pinsrd(res, Operand(temp), 1);
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/external/v8/src/ia32/ |
H A D | assembler-ia32.h | 1046 void pinsrd(XMMRegister dst, Register src, int8_t offset) { 1047 pinsrd(dst, Operand(src), offset); 1049 void pinsrd(XMMRegister dst, const Operand& src, int8_t offset);
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H A D | assembler-ia32.cc | 2391 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) { function in class:v8::internal::Assembler
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H A D | lithium-codegen-ia32.cc | 1183 __ pinsrd(res, Operand(temp), 1); 1187 __ pinsrd(res, Operand(temp), 1);
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/external/chromium_org/v8/test/cctest/ |
H A D | test-disasm-ia32.cc | 440 __ pinsrd(xmm1, eax, 0);
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/external/v8/test/cctest/ |
H A D | test-disasm-ia32.cc | 448 __ pinsrd(xmm1, eax, 0);
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/external/valgrind/main/none/tests/amd64/ |
H A D | sse4-64.stdout.exp | 2601 r pinsrd $0 d254b0a4ef78e91e 55555555555555555555555555555555 555555555555555555555555ef78e91e 2602 m pinsrd $0 d254b0a4ef78e91e 55555555555555555555555555555555 555555555555555555555555ef78e91e 2603 r pinsrd $1 8fd5aea1f63a049f 55555555555555555555555555555555 5555555555555555f63a049f55555555 2604 m pinsrd $1 8fd5aea1f63a049f 55555555555555555555555555555555 5555555555555555f63a049f55555555 2605 r pinsrd $2 0cb41a414677a106 55555555555555555555555555555555 555555554677a1065555555555555555 2606 m pinsrd $2 0cb41a414677a106 55555555555555555555555555555555 555555554677a1065555555555555555 2607 r pinsrd $3 e7b48241aa40f176 55555555555555555555555555555555 aa40f176555555555555555555555555 2608 m pinsrd $3 e7b48241aa40f176 55555555555555555555555555555555 aa40f176555555555555555555555555
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/external/chromium_org/third_party/yasm/source/patched-yasm/ |
H A D | x86insn_nasm.gperf | 532 pinsrd, pinsrd_insn, 2, SUF_Z, 0, 0, 0, 0, CPU_386, CPU_SSE41, 0
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H A D | x86insn_gas.gperf | 932 pinsrd, pinsrd_insn, 2, SUF_Z, 0, 0, 0, 0, CPU_386, CPU_SSE41, 0
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