Searched refs:IRTemp_INVALID (Results 1 - 19 of 19) sorted by relevance
/external/valgrind/main/VEX/priv/ |
H A D | guest_arm_toIR.c | 153 /* MOD. Initially IRTemp_INVALID. If the r15 branch to be generated 156 IRTemp_INVALID. */ 529 register: if guardT == IRTemp_INVALID then the write is 545 if (guardT == IRTemp_INVALID) { 559 vassert(r15guard == IRTemp_INVALID); 570 if guardT == IRTemp_INVALID then the write is unconditional. */ 579 if (guardT == IRTemp_INVALID) { 667 register: if guardT == IRTemp_INVALID then the write is 675 if (guardT == IRTemp_INVALID) { 711 writes to the register: if guardT == IRTemp_INVALID the [all...] |
H A D | guest_amd64_toIR.c | 1582 cas = mkIRCAS( IRTemp_INVALID, oldTmp, Iend_LE, addr, 1941 if taddr is IRTemp_INVALID, then no store is generated. 1943 if taddr is not IRTemp_INVALID, then a store (using taddr as 1946 if texpVal is IRTemp_INVALID then a normal store is 1949 if texpVal is not IRTemp_INVALID then a cas-style store is 1990 if (taddr != IRTemp_INVALID) { 1991 if (texpVal == IRTemp_INVALID) { 2049 if (taddr != IRTemp_INVALID) { 2050 if (texpVal == IRTemp_INVALID) { 2804 IRTemp addr = IRTemp_INVALID; [all...] |
H A D | guest_x86_toIR.c | 764 cas = mkIRCAS( IRTemp_INVALID, oldTmp, Iend_LE, addr, 1108 if taddr is IRTemp_INVALID, then no store is generated. 1110 if taddr is not IRTemp_INVALID, then a store (using taddr as 1113 if texpVal is IRTemp_INVALID then a normal store is 1116 if texpVal is not IRTemp_INVALID then a cas-style store is 1151 if (taddr != IRTemp_INVALID) { 1152 if (texpVal == IRTemp_INVALID) { 1205 if (taddr != IRTemp_INVALID) { 1206 if (texpVal == IRTemp_INVALID) { 1837 IRTemp addr = IRTemp_INVALID; [all...] |
H A D | guest_ppc_toIR.c | 603 vassert(vEvn && *vEvn == IRTemp_INVALID); 604 vassert(vOdd && *vOdd == IRTemp_INVALID); 621 vassert(vEvn && *vEvn == IRTemp_INVALID); 622 vassert(vOdd && *vOdd == IRTemp_INVALID); 639 vassert(vEvn && *vEvn == IRTemp_INVALID); 640 vassert(vOdd && *vOdd == IRTemp_INVALID); 657 vassert(vEvn && *vEvn == IRTemp_INVALID); 658 vassert(vOdd && *vOdd == IRTemp_INVALID); 678 vassert(t0 && *t0 == IRTemp_INVALID); 679 vassert(t1 && *t1 == IRTemp_INVALID); [all...] |
H A D | ir_defs.c | 113 if (tmp == IRTemp_INVALID) 114 vex_printf("IRTemp_INVALID"); 1140 if (d->tmp != IRTemp_INVALID) { 1182 if (cas->oldHi != IRTemp_INVALID) { 1690 d->tmp = IRTemp_INVALID; 3577 if (cas->oldHi == IRTemp_INVALID 3582 if (cas->oldHi != IRTemp_INVALID 3608 if (cas->oldHi != IRTemp_INVALID) { 3685 IRTemp_INVALID, .guard must be manifestly True at JIT 3687 if (d->tmp != IRTemp_INVALID [all...] |
H A D | host_s390_isel.c | 2468 if (d->tmp == IRTemp_INVALID) { 2487 if (stmt->Ist.CAS.details->oldHi == IRTemp_INVALID) {
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H A D | ir_opt.c | 4107 if (st->Ist.CAS.details->oldHi != IRTemp_INVALID) 4129 if (d->tmp != IRTemp_INVALID) 5039 env[i].binder = IRTemp_INVALID;
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H A D | host_amd64_isel.c | 3910 if (d->tmp == IRTemp_INVALID) 3939 if (stmt->Ist.CAS.details->oldHi == IRTemp_INVALID) {
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H A D | host_x86_isel.c | 3953 if (d->tmp == IRTemp_INVALID) 3990 if (stmt->Ist.CAS.details->oldHi == IRTemp_INVALID) {
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H A D | host_mips_isel.c | 2890 if (d->tmp == IRTemp_INVALID)
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H A D | host_ppc_isel.c | 4983 if (d->tmp == IRTemp_INVALID)
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H A D | host_arm_isel.c | 5860 if (d->tmp == IRTemp_INVALID)
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H A D | guest_s390_toIR.c | 9807 cas = mkIRCAS(IRTemp_INVALID, old_mem, 9855 cas = mkIRCAS(IRTemp_INVALID, old_mem,
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/external/valgrind/main/exp-sgcheck/ |
H A D | h_main.c | 485 IRTemp_INVALID if code to compute the shadow has not yet been 489 IRTemp_INVALID, since it is illogical for a shadow tmp itself to be 566 IRTemp_INVALID and we are hoping to read that shadow tmp, it means 581 ent.shadow = IRTemp_INVALID; 650 ent.shadow = IRTemp_INVALID;
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/external/valgrind/main/coregrind/ |
H A D | m_translate.c | 125 // - Unused slots have a .temp value of 'IRTemp_INVALID'. 128 // non-IRTemp_INVALID values. This is rare, and the overwriting of a 130 // - Every slot below next_SP_alias_slot holds a non-IRTemp_INVALID value. 151 SP_aliases[i].temp = IRTemp_INVALID; 159 vg_assert(temp != IRTemp_INVALID); 169 vg_assert(IRTemp_INVALID != temp); 191 if (SP_aliases[i].temp == IRTemp_INVALID) {
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/external/valgrind/main/memcheck/ |
H A D | mc_translate.c | 145 and origin (shadowB) values, or these may be IRTemp_INVALID if code 149 and so .shadowV and .shadowB must be IRTemp_INVALID, since it is 229 IRTemp_INVALID and we are hoping to read that shadow tmp, it means 244 ent.shadowV = IRTemp_INVALID; 245 ent.shadowB = IRTemp_INVALID; 261 if (ent->shadowV == IRTemp_INVALID) { 268 tl_assert(ent->shadowV == IRTemp_INVALID); 4545 if (d->tmp != IRTemp_INVALID) { 4839 if (cas->oldHi == IRTemp_INVALID) { 4859 tl_assert(cas->oldHi == IRTemp_INVALID); [all...] |
/external/valgrind/main/VEX/ |
H A D | test_main.c | 521 Initially all entries are IRTemp_INVALID. Entries are added 569 if (mce->tmpMap[orig] == IRTemp_INVALID) { 2440 if (d->tmp != IRTemp_INVALID) { 2597 mce.tmpMap[i] = IRTemp_INVALID;
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/external/valgrind/main/VEX/pub/ |
H A D | libvex_ir.h | 395 #define IRTemp_INVALID ((IRTemp)0xFFFFFFFF) macro 1950 non-NULL. If .tmp is not IRTemp_INVALID (that is, the call 1958 IRTemp tmp; /* to assign result to, or IRTemp_INVALID if none */ 2052 .oldHi must be IRTemp_INVALID, and .expdHi and .dataHi must
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/external/valgrind/main/helgrind/ |
H A D | hg_main.c | 4416 Bool isDCAS = cas->oldHi != IRTemp_INVALID;
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