1f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* 2f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Copyright 2012 Advanced Micro Devices, Inc. 3f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 4f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Permission is hereby granted, free of charge, to any person obtaining a 5f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * copy of this software and associated documentation files (the "Software"), 6f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * to deal in the Software without restriction, including without limitation 7f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * on the rights to use, copy, modify, merge, publish, distribute, sub 8f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * license, and/or sell copies of the Software, and to permit persons to whom 9f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * the Software is furnished to do so, subject to the following conditions: 10f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 11f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * The above copyright notice and this permission notice (including the next 12f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * paragraph) shall be included in all copies or substantial portions of the 13f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Software. 14f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 15f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * USE OR OTHER DEALINGS IN THE SOFTWARE. 22f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 23f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Authors: 24f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Christian König <christian.koenig@amd.com> 25f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 26f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 27f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "util/u_memory.h" 28f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "radeonsi_pipe.h" 29f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "radeonsi_pm4.h" 30f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "sid.h" 31f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "r600_hw_context_priv.h" 32f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 33f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#define NUMBER_OF_STATES (sizeof(union si_state) / sizeof(struct si_pm4_state *)) 34f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 35f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_cmd_begin(struct si_pm4_state *state, unsigned opcode) 36f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 37f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->last_opcode = opcode; 38f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->last_pm4 = state->ndw++; 39f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 40f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 41f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw) 42f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 43f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->pm4[state->ndw++] = dw; 44f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 45f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 46f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_cmd_end(struct si_pm4_state *state, bool predicate) 47f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 48f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unsigned count; 49f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org count = state->ndw - state->last_pm4 - 2; 50f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->pm4[state->last_pm4] = PKT3(state->last_opcode, 51f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org count, predicate); 52f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 53f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(state->ndw <= SI_PM4_MAX_DW); 54f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 55f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 56f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val) 57f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 58f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unsigned opcode; 59f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 60f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (reg >= SI_CONFIG_REG_OFFSET && reg <= SI_CONFIG_REG_END) { 61f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org opcode = PKT3_SET_CONFIG_REG; 62f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org reg -= SI_CONFIG_REG_OFFSET; 63f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 64f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else if (reg >= SI_SH_REG_OFFSET && reg <= SI_SH_REG_END) { 65f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org opcode = PKT3_SET_SH_REG; 66f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org reg -= SI_SH_REG_OFFSET; 67f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 68f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else if (reg >= SI_CONTEXT_REG_OFFSET && reg <= SI_CONTEXT_REG_END) { 69f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org opcode = PKT3_SET_CONTEXT_REG; 70f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org reg -= SI_CONTEXT_REG_OFFSET; 71f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 72f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org R600_ERR("Invalid register offset %08x!\n", reg); 73f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return; 74f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 75f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 76f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org reg >>= 2; 77f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 78f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (opcode != state->last_opcode || reg != (state->last_reg + 1)) { 79f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_pm4_cmd_begin(state, opcode); 80f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_pm4_cmd_add(state, reg); 81f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 82f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 83f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->last_reg = reg; 84f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_pm4_cmd_add(state, val); 85f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_pm4_cmd_end(state, false); 86f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 87f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 88f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_add_bo(struct si_pm4_state *state, 89f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct si_resource *bo, 90f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org enum radeon_bo_usage usage) 91f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 92f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unsigned idx = state->nbo++; 93f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(idx < SI_PM4_MAX_BO); 94f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 95f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_resource_reference(&state->bo[idx], bo); 96f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->bo_usage[idx] = usage; 97f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 98f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 99f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_sh_data_begin(struct si_pm4_state *state) 100f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 101f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_pm4_cmd_begin(state, PKT3_NOP); 102f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 103f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 104f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_sh_data_add(struct si_pm4_state *state, uint32_t dw) 105f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 106f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_pm4_cmd_add(state, dw); 107f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 108f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 109f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_sh_data_end(struct si_pm4_state *state, unsigned reg) 110f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 111f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unsigned offs = state->last_pm4 + 1; 112f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 113f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Bail if no data was added */ 114f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (state->ndw == offs) { 115f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->ndw--; 116f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return; 117f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 118f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 119f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_pm4_cmd_end(state, false); 120f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 121f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_pm4_cmd_begin(state, PKT3_SET_SH_REG_OFFSET); 122f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_pm4_cmd_add(state, (reg - SI_SH_REG_OFFSET) >> 2); 123f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->relocs[state->nrelocs++] = state->ndw; 124f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_pm4_cmd_add(state, offs << 2); 125f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_pm4_cmd_add(state, 0); 126f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_pm4_cmd_end(state, false); 127f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 128f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 129f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_inval_shader_cache(struct si_pm4_state *state) 130f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 131f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->cp_coher_cntl |= S_0085F0_SH_ICACHE_ACTION_ENA(1); 132f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->cp_coher_cntl |= S_0085F0_SH_KCACHE_ACTION_ENA(1); 133f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 134f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 135f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_inval_texture_cache(struct si_pm4_state *state) 136f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 137f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1); 138f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 139f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 140f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_inval_vertex_cache(struct si_pm4_state *state) 141f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 142f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Some GPUs don't have the vertex cache and must use the texture cache instead. */ 143f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1); 144f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 145f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 146f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_inval_fb_cache(struct si_pm4_state *state, unsigned nr_cbufs) 147f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 148f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->cp_coher_cntl |= S_0085F0_CB_ACTION_ENA(1); 149f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->cp_coher_cntl |= ((1 << nr_cbufs) - 1) << S_0085F0_CB0_DEST_BASE_ENA_SHIFT; 150f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 151f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 152f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_inval_zsbuf_cache(struct si_pm4_state *state) 153f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 154f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->cp_coher_cntl |= S_0085F0_DB_ACTION_ENA(1) | S_0085F0_DB_DEST_BASE_ENA(1); 155f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 156f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 157f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_free_state(struct r600_context *rctx, 158f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct si_pm4_state *state, 159f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unsigned idx) 160f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 161f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (state == NULL) 162f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return; 163f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 164f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (idx != ~0 && rctx->emitted.array[idx] == state) { 165f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rctx->emitted.array[idx] = NULL; 166f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 167f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 168f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (int i = 0; i < state->nbo; ++i) { 169f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_resource_reference(&state->bo[i], NULL); 170f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 171f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org FREE(state); 172f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 173f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 174f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orguint32_t si_pm4_sync_flags(struct r600_context *rctx) 175f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 176f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t cp_coher_cntl = 0; 177f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 178f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (int i = 0; i < NUMBER_OF_STATES; ++i) { 179f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct si_pm4_state *state = rctx->queued.array[i]; 180f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 181f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (!state || rctx->emitted.array[i] == state) 182f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org continue; 183f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 184f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org cp_coher_cntl |= state->cp_coher_cntl; 185f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 186f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return cp_coher_cntl; 187f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 188f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 189f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgunsigned si_pm4_dirty_dw(struct r600_context *rctx) 190f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 191f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unsigned count = 0; 192f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 193f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (int i = 0; i < NUMBER_OF_STATES; ++i) { 194f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct si_pm4_state *state = rctx->queued.array[i]; 195f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 196f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (!state || rctx->emitted.array[i] == state) 197f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org continue; 198f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 199f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org count += state->ndw; 200f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 201f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 202f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return count; 203f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 204f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 205f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_emit(struct r600_context *rctx, struct si_pm4_state *state) 206f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 207f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct radeon_winsys_cs *cs = rctx->cs; 208f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (int i = 0; i < state->nbo; ++i) { 209f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r600_context_bo_reloc(rctx, state->bo[i], 210f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state->bo_usage[i]); 211f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 212f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 213f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org memcpy(&cs->buf[cs->cdw], state->pm4, state->ndw * 4); 214f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 215f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (int i = 0; i < state->nrelocs; ++i) { 216f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org cs->buf[cs->cdw + state->relocs[i]] += cs->cdw << 2; 217f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 218f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 219f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org cs->cdw += state->ndw; 220f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 221f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 222f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_emit_dirty(struct r600_context *rctx) 223f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 224f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (int i = 0; i < NUMBER_OF_STATES; ++i) { 225f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct si_pm4_state *state = rctx->queued.array[i]; 226f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 227f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (!state || rctx->emitted.array[i] == state) 228f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org continue; 229f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 230f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org si_pm4_emit(rctx, state); 231f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rctx->emitted.array[i] = state; 232f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 233f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 234f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 235f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid si_pm4_reset_emitted(struct r600_context *rctx) 236f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 237f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org memset(&rctx->emitted, 0, sizeof(rctx->emitted)); 238f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 239