1// Copyright 2012 the V8 project authors. All rights reserved. 2// Redistribution and use in source and binary forms, with or without 3// modification, are permitted provided that the following conditions are 4// met: 5// 6// * Redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer. 8// * Redistributions in binary form must reproduce the above 9// copyright notice, this list of conditions and the following 10// disclaimer in the documentation and/or other materials provided 11// with the distribution. 12// * Neither the name of Google Inc. nor the names of its 13// contributors may be used to endorse or promote products derived 14// from this software without specific prior written permission. 15// 16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 28 29// Declares a Simulator for ARM instructions if we are not generating a native 30// ARM binary. This Simulator allows us to run and debug ARM code generation on 31// regular desktop machines. 32// V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, 33// which will start execution in the Simulator or forwards to the real entry 34// on a ARM HW platform. 35 36#ifndef V8_ARM_SIMULATOR_ARM_H_ 37#define V8_ARM_SIMULATOR_ARM_H_ 38 39#include "allocation.h" 40 41#if !defined(USE_SIMULATOR) 42// Running without a simulator on a native arm platform. 43 44namespace v8 { 45namespace internal { 46 47// When running without a simulator we call the entry directly. 48#define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \ 49 (entry(p0, p1, p2, p3, p4)) 50 51typedef int (*arm_regexp_matcher)(String*, int, const byte*, const byte*, 52 void*, int*, int, Address, int, Isolate*); 53 54 55// Call the generated regexp code directly. The code at the entry address 56// should act as a function matching the type arm_regexp_matcher. 57// The fifth argument is a dummy that reserves the space used for 58// the return address added by the ExitFrame in native calls. 59#define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7, p8) \ 60 (FUNCTION_CAST<arm_regexp_matcher>(entry)( \ 61 p0, p1, p2, p3, NULL, p4, p5, p6, p7, p8)) 62 63#define TRY_CATCH_FROM_ADDRESS(try_catch_address) \ 64 reinterpret_cast<TryCatch*>(try_catch_address) 65 66// The stack limit beyond which we will throw stack overflow errors in 67// generated code. Because generated code on arm uses the C stack, we 68// just use the C stack limit. 69class SimulatorStack : public v8::internal::AllStatic { 70 public: 71 static inline uintptr_t JsLimitFromCLimit(v8::internal::Isolate* isolate, 72 uintptr_t c_limit) { 73 USE(isolate); 74 return c_limit; 75 } 76 77 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) { 78 return try_catch_address; 79 } 80 81 static inline void UnregisterCTryCatch() { } 82}; 83 84} } // namespace v8::internal 85 86#else // !defined(USE_SIMULATOR) 87// Running with a simulator. 88 89#include "constants-arm.h" 90#include "hashmap.h" 91#include "assembler.h" 92 93namespace v8 { 94namespace internal { 95 96class CachePage { 97 public: 98 static const int LINE_VALID = 0; 99 static const int LINE_INVALID = 1; 100 101 static const int kPageShift = 12; 102 static const int kPageSize = 1 << kPageShift; 103 static const int kPageMask = kPageSize - 1; 104 static const int kLineShift = 2; // The cache line is only 4 bytes right now. 105 static const int kLineLength = 1 << kLineShift; 106 static const int kLineMask = kLineLength - 1; 107 108 CachePage() { 109 memset(&validity_map_, LINE_INVALID, sizeof(validity_map_)); 110 } 111 112 char* ValidityByte(int offset) { 113 return &validity_map_[offset >> kLineShift]; 114 } 115 116 char* CachedData(int offset) { 117 return &data_[offset]; 118 } 119 120 private: 121 char data_[kPageSize]; // The cached data. 122 static const int kValidityMapSize = kPageSize >> kLineShift; 123 char validity_map_[kValidityMapSize]; // One byte per line. 124}; 125 126 127class Simulator { 128 public: 129 friend class ArmDebugger; 130 enum Register { 131 no_reg = -1, 132 r0 = 0, r1, r2, r3, r4, r5, r6, r7, 133 r8, r9, r10, r11, r12, r13, r14, r15, 134 num_registers, 135 sp = 13, 136 lr = 14, 137 pc = 15, 138 s0 = 0, s1, s2, s3, s4, s5, s6, s7, 139 s8, s9, s10, s11, s12, s13, s14, s15, 140 s16, s17, s18, s19, s20, s21, s22, s23, 141 s24, s25, s26, s27, s28, s29, s30, s31, 142 num_s_registers = 32, 143 d0 = 0, d1, d2, d3, d4, d5, d6, d7, 144 d8, d9, d10, d11, d12, d13, d14, d15, 145 d16, d17, d18, d19, d20, d21, d22, d23, 146 d24, d25, d26, d27, d28, d29, d30, d31, 147 num_d_registers = 32, 148 q0 = 0, q1, q2, q3, q4, q5, q6, q7, 149 q8, q9, q10, q11, q12, q13, q14, q15, 150 num_q_registers = 16 151 }; 152 153 explicit Simulator(Isolate* isolate); 154 ~Simulator(); 155 156 // The currently executing Simulator instance. Potentially there can be one 157 // for each native thread. 158 static Simulator* current(v8::internal::Isolate* isolate); 159 160 // Accessors for register state. Reading the pc value adheres to the ARM 161 // architecture specification and is off by a 8 from the currently executing 162 // instruction. 163 void set_register(int reg, int32_t value); 164 int32_t get_register(int reg) const; 165 double get_double_from_register_pair(int reg); 166 void set_dw_register(int dreg, const int* dbl); 167 168 // Support for VFP. 169 void get_d_register(int dreg, uint64_t* value); 170 void set_d_register(int dreg, const uint64_t* value); 171 void get_d_register(int dreg, uint32_t* value); 172 void set_d_register(int dreg, const uint32_t* value); 173 void get_q_register(int qreg, uint64_t* value); 174 void set_q_register(int qreg, const uint64_t* value); 175 void get_q_register(int qreg, uint32_t* value); 176 void set_q_register(int qreg, const uint32_t* value); 177 178 void set_s_register(int reg, unsigned int value); 179 unsigned int get_s_register(int reg) const; 180 181 void set_d_register_from_double(int dreg, const double& dbl) { 182 SetVFPRegister<double, 2>(dreg, dbl); 183 } 184 185 double get_double_from_d_register(int dreg) { 186 return GetFromVFPRegister<double, 2>(dreg); 187 } 188 189 void set_s_register_from_float(int sreg, const float flt) { 190 SetVFPRegister<float, 1>(sreg, flt); 191 } 192 193 float get_float_from_s_register(int sreg) { 194 return GetFromVFPRegister<float, 1>(sreg); 195 } 196 197 void set_s_register_from_sinteger(int sreg, const int sint) { 198 SetVFPRegister<int, 1>(sreg, sint); 199 } 200 201 int get_sinteger_from_s_register(int sreg) { 202 return GetFromVFPRegister<int, 1>(sreg); 203 } 204 205 // Special case of set_register and get_register to access the raw PC value. 206 void set_pc(int32_t value); 207 int32_t get_pc() const; 208 209 // Accessor to the internal simulator stack area. 210 uintptr_t StackLimit() const; 211 212 // Executes ARM instructions until the PC reaches end_sim_pc. 213 void Execute(); 214 215 // Call on program start. 216 static void Initialize(Isolate* isolate); 217 218 // V8 generally calls into generated JS code with 5 parameters and into 219 // generated RegExp code with 7 parameters. This is a convenience function, 220 // which sets up the simulator state and grabs the result on return. 221 int32_t Call(byte* entry, int argument_count, ...); 222 // Alternative: call a 2-argument double function. 223 double CallFP(byte* entry, double d0, double d1); 224 225 // Push an address onto the JS stack. 226 uintptr_t PushAddress(uintptr_t address); 227 228 // Pop an address from the JS stack. 229 uintptr_t PopAddress(); 230 231 // Debugger input. 232 void set_last_debugger_input(char* input); 233 char* last_debugger_input() { return last_debugger_input_; } 234 235 // ICache checking. 236 static void FlushICache(v8::internal::HashMap* i_cache, void* start, 237 size_t size); 238 239 // Returns true if pc register contains one of the 'special_values' defined 240 // below (bad_lr, end_sim_pc). 241 bool has_bad_pc() const; 242 243 // EABI variant for double arguments in use. 244 bool use_eabi_hardfloat() { 245#if USE_EABI_HARDFLOAT 246 return true; 247#else 248 return false; 249#endif 250 } 251 252 private: 253 enum special_values { 254 // Known bad pc value to ensure that the simulator does not execute 255 // without being properly setup. 256 bad_lr = -1, 257 // A pc value used to signal the simulator to stop execution. Generally 258 // the lr is set to this value on transition from native C code to 259 // simulated execution, so that the simulator can "return" to the native 260 // C code. 261 end_sim_pc = -2 262 }; 263 264 // Unsupported instructions use Format to print an error and stop execution. 265 void Format(Instruction* instr, const char* format); 266 267 // Checks if the current instruction should be executed based on its 268 // condition bits. 269 bool ConditionallyExecute(Instruction* instr); 270 271 // Helper functions to set the conditional flags in the architecture state. 272 void SetNZFlags(int32_t val); 273 void SetCFlag(bool val); 274 void SetVFlag(bool val); 275 bool CarryFrom(int32_t left, int32_t right, int32_t carry = 0); 276 bool BorrowFrom(int32_t left, int32_t right); 277 bool OverflowFrom(int32_t alu_out, 278 int32_t left, 279 int32_t right, 280 bool addition); 281 282 inline int GetCarry() { 283 return c_flag_ ? 1 : 0; 284 }; 285 286 // Support for VFP. 287 void Compute_FPSCR_Flags(double val1, double val2); 288 void Copy_FPSCR_to_APSR(); 289 inline double canonicalizeNaN(double value); 290 291 // Helper functions to decode common "addressing" modes 292 int32_t GetShiftRm(Instruction* instr, bool* carry_out); 293 int32_t GetImm(Instruction* instr, bool* carry_out); 294 int32_t ProcessPU(Instruction* instr, 295 int num_regs, 296 int operand_size, 297 intptr_t* start_address, 298 intptr_t* end_address); 299 void HandleRList(Instruction* instr, bool load); 300 void HandleVList(Instruction* inst); 301 void SoftwareInterrupt(Instruction* instr); 302 303 // Stop helper functions. 304 inline bool isStopInstruction(Instruction* instr); 305 inline bool isWatchedStop(uint32_t bkpt_code); 306 inline bool isEnabledStop(uint32_t bkpt_code); 307 inline void EnableStop(uint32_t bkpt_code); 308 inline void DisableStop(uint32_t bkpt_code); 309 inline void IncreaseStopCounter(uint32_t bkpt_code); 310 void PrintStopInfo(uint32_t code); 311 312 // Read and write memory. 313 inline uint8_t ReadBU(int32_t addr); 314 inline int8_t ReadB(int32_t addr); 315 inline void WriteB(int32_t addr, uint8_t value); 316 inline void WriteB(int32_t addr, int8_t value); 317 318 inline uint16_t ReadHU(int32_t addr, Instruction* instr); 319 inline int16_t ReadH(int32_t addr, Instruction* instr); 320 // Note: Overloaded on the sign of the value. 321 inline void WriteH(int32_t addr, uint16_t value, Instruction* instr); 322 inline void WriteH(int32_t addr, int16_t value, Instruction* instr); 323 324 inline int ReadW(int32_t addr, Instruction* instr); 325 inline void WriteW(int32_t addr, int value, Instruction* instr); 326 327 int32_t* ReadDW(int32_t addr); 328 void WriteDW(int32_t addr, int32_t value1, int32_t value2); 329 330 // Executing is handled based on the instruction type. 331 // Both type 0 and type 1 rolled into one. 332 void DecodeType01(Instruction* instr); 333 void DecodeType2(Instruction* instr); 334 void DecodeType3(Instruction* instr); 335 void DecodeType4(Instruction* instr); 336 void DecodeType5(Instruction* instr); 337 void DecodeType6(Instruction* instr); 338 void DecodeType7(Instruction* instr); 339 340 // Support for VFP. 341 void DecodeTypeVFP(Instruction* instr); 342 void DecodeType6CoprocessorIns(Instruction* instr); 343 void DecodeSpecialCondition(Instruction* instr); 344 345 void DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(Instruction* instr); 346 void DecodeVCMP(Instruction* instr); 347 void DecodeVCVTBetweenDoubleAndSingle(Instruction* instr); 348 void DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr); 349 350 // Executes one instruction. 351 void InstructionDecode(Instruction* instr); 352 353 // ICache. 354 static void CheckICache(v8::internal::HashMap* i_cache, Instruction* instr); 355 static void FlushOnePage(v8::internal::HashMap* i_cache, intptr_t start, 356 int size); 357 static CachePage* GetCachePage(v8::internal::HashMap* i_cache, void* page); 358 359 // Runtime call support. 360 static void* RedirectExternalReference( 361 void* external_function, 362 v8::internal::ExternalReference::Type type); 363 364 // Handle arguments and return value for runtime FP functions. 365 void GetFpArgs(double* x, double* y, int32_t* z); 366 void SetFpResult(const double& result); 367 void TrashCallerSaveRegisters(); 368 369 template<class ReturnType, int register_size> 370 ReturnType GetFromVFPRegister(int reg_index); 371 372 template<class InputType, int register_size> 373 void SetVFPRegister(int reg_index, const InputType& value); 374 375 void CallInternal(byte* entry); 376 377 // Architecture state. 378 // Saturating instructions require a Q flag to indicate saturation. 379 // There is currently no way to read the CPSR directly, and thus read the Q 380 // flag, so this is left unimplemented. 381 int32_t registers_[16]; 382 bool n_flag_; 383 bool z_flag_; 384 bool c_flag_; 385 bool v_flag_; 386 387 // VFP architecture state. 388 unsigned int vfp_registers_[num_d_registers * 2]; 389 bool n_flag_FPSCR_; 390 bool z_flag_FPSCR_; 391 bool c_flag_FPSCR_; 392 bool v_flag_FPSCR_; 393 394 // VFP rounding mode. See ARM DDI 0406B Page A2-29. 395 VFPRoundingMode FPSCR_rounding_mode_; 396 bool FPSCR_default_NaN_mode_; 397 398 // VFP FP exception flags architecture state. 399 bool inv_op_vfp_flag_; 400 bool div_zero_vfp_flag_; 401 bool overflow_vfp_flag_; 402 bool underflow_vfp_flag_; 403 bool inexact_vfp_flag_; 404 405 // Simulator support. 406 char* stack_; 407 bool pc_modified_; 408 int icount_; 409 410 // Debugger input. 411 char* last_debugger_input_; 412 413 // Icache simulation 414 v8::internal::HashMap* i_cache_; 415 416 // Registered breakpoints. 417 Instruction* break_pc_; 418 Instr break_instr_; 419 420 v8::internal::Isolate* isolate_; 421 422 // A stop is watched if its code is less than kNumOfWatchedStops. 423 // Only watched stops support enabling/disabling and the counter feature. 424 static const uint32_t kNumOfWatchedStops = 256; 425 426 // Breakpoint is disabled if bit 31 is set. 427 static const uint32_t kStopDisabledBit = 1 << 31; 428 429 // A stop is enabled, meaning the simulator will stop when meeting the 430 // instruction, if bit 31 of watched_stops_[code].count is unset. 431 // The value watched_stops_[code].count & ~(1 << 31) indicates how many times 432 // the breakpoint was hit or gone through. 433 struct StopCountAndDesc { 434 uint32_t count; 435 char* desc; 436 }; 437 StopCountAndDesc watched_stops_[kNumOfWatchedStops]; 438}; 439 440 441// When running with the simulator transition into simulated execution at this 442// point. 443#define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \ 444 reinterpret_cast<Object*>(Simulator::current(Isolate::Current())->Call( \ 445 FUNCTION_ADDR(entry), 5, p0, p1, p2, p3, p4)) 446 447#define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7, p8) \ 448 Simulator::current(Isolate::Current())->Call( \ 449 entry, 10, p0, p1, p2, p3, NULL, p4, p5, p6, p7, p8) 450 451#define TRY_CATCH_FROM_ADDRESS(try_catch_address) \ 452 try_catch_address == NULL ? \ 453 NULL : *(reinterpret_cast<TryCatch**>(try_catch_address)) 454 455 456// The simulator has its own stack. Thus it has a different stack limit from 457// the C-based native code. Setting the c_limit to indicate a very small 458// stack cause stack overflow errors, since the simulator ignores the input. 459// This is unlikely to be an issue in practice, though it might cause testing 460// trouble down the line. 461class SimulatorStack : public v8::internal::AllStatic { 462 public: 463 static inline uintptr_t JsLimitFromCLimit(v8::internal::Isolate* isolate, 464 uintptr_t c_limit) { 465 return Simulator::current(isolate)->StackLimit(); 466 } 467 468 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) { 469 Simulator* sim = Simulator::current(Isolate::Current()); 470 return sim->PushAddress(try_catch_address); 471 } 472 473 static inline void UnregisterCTryCatch() { 474 Simulator::current(Isolate::Current())->PopAddress(); 475 } 476}; 477 478} } // namespace v8::internal 479 480#endif // !defined(USE_SIMULATOR) 481#endif // V8_ARM_SIMULATOR_ARM_H_ 482