CREDITS.TXT revision c5519d3b26463f4d5c38e2b878d320edbab77f57
1This file is a partial list of people who have contributed to the LLVM
2project.  If you have contributed a patch or made some other contribution to
3LLVM, please submit a patch to this file to add yourself, and it will be
4done!
5
6The list is sorted by surname and formatted to allow easy grepping and
7beautification by scripts.  The fields are: name (N), email (E), web-address
8(W), PGP key ID and fingerprint (P), description (D), snail-mail address
9(S), and (I) IRC handle.
10
11
12N: Vikram Adve
13E: vadve@cs.uiuc.edu
14W: http://www.cs.uiuc.edu/~vadve/
15D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM
16
17N: Owen Anderson
18E: resistor@mac.com
19D: LCSSA pass and related LoopUnswitch work
20D: GVNPRE pass, DataLayout refactoring, random improvements
21
22N: Henrik Bach
23D: MingW Win32 API portability layer
24
25N: Aaron Ballman
26E: aaron@aaronballman.com
27D: __declspec attributes, Windows support, general bug fixing
28
29N: Nate Begeman
30E: natebegeman@mac.com
31D: PowerPC backend developer
32D: Target-independent code generator and analysis improvements
33
34N: Daniel Berlin
35E: dberlin@dberlin.org
36D: ET-Forest implementation.
37D: Sparse bitmap
38
39N: David Blaikie
40E: dblaikie@gmail.com
41D: General bug fixing/fit & finish, mostly in Clang
42
43N: Neil Booth
44E: neil@daikokuya.co.uk
45D: APFloat implementation.
46
47N: Misha Brukman
48E: brukman+llvm@uiuc.edu
49W: http://misha.brukman.net
50D: Portions of X86 and Sparc JIT compilers, PowerPC backend
51D: Incremental bitcode loader
52
53N: Cameron Buschardt
54E: buschard@uiuc.edu
55D: The `mem2reg' pass - promotes values stored in memory to registers
56
57N: Brendon Cahoon
58E: bcahoon@codeaurora.org
59D: Loop unrolling with run-time trip counts.
60
61N: Chandler Carruth
62E: chandlerc@gmail.com
63E: chandlerc@google.com
64D: Hashing algorithms and interfaces
65D: Inline cost analysis
66D: Machine block placement pass
67D: SROA
68
69N: Casey Carter
70E: ccarter@uiuc.edu
71D: Fixes to the Reassociation pass, various improvement patches
72
73N: Evan Cheng
74E: evan.cheng@apple.com
75D: ARM and X86 backends
76D: Instruction scheduler improvements
77D: Register allocator improvements
78D: Loop optimizer improvements
79D: Target-independent code generator improvements
80
81N: Dan Villiom Podlaski Christiansen
82E: danchr@gmail.com
83E: danchr@cs.au.dk
84W: http://villiom.dk
85D: LLVM Makefile improvements
86D: Clang diagnostic & driver tweaks
87S: Aarhus, Denmark
88
89N: Jeff Cohen
90E: jeffc@jolt-lang.org
91W: http://jolt-lang.org
92D: Native Win32 API portability layer
93
94N: John T. Criswell
95E: criswell@uiuc.edu
96D: Original Autoconf support, documentation improvements, bug fixes
97
98N: Anshuman Dasgupta
99E: adasgupt@codeaurora.org
100D: Deterministic finite automaton based infrastructure for VLIW packetization
101
102N: Stefanus Du Toit
103E: stefanus.dutoit@rapidmind.com
104D: Bug fixes and minor improvements
105
106N: Rafael Avila de Espindola
107E: rafael.espindola@gmail.com
108D: The ARM backend
109
110N: Alkis Evlogimenos
111E: alkis@evlogimenos.com
112D: Linear scan register allocator, many codegen improvements, Java frontend
113
114N: Hal Finkel
115E: hfinkel@anl.gov
116D: Basic-block autovectorization, PowerPC backend improvements
117
118N: Ryan Flynn
119E: pizza@parseerror.com
120D: Miscellaneous bug fixes
121
122N: Brian Gaeke
123E: gaeke@uiuc.edu
124W: http://www.students.uiuc.edu/~gaeke/
125D: Portions of X86 static and JIT compilers; initial SparcV8 backend
126D: Dynamic trace optimizer
127D: FreeBSD/X86 compatibility fixes, the llvm-nm tool
128
129N: Nicolas Geoffray
130E: nicolas.geoffray@lip6.fr
131W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/
132D: PPC backend fixes for Linux
133
134N: Louis Gerbarg
135D: Portions of the PowerPC backend
136
137N: Saem Ghani
138E: saemghani@gmail.com
139D: Callgraph class cleanups
140
141N: Mikhail Glushenkov
142E: foldr@codedgers.com
143D: Author of llvmc2
144
145N: Dan Gohman
146E: gohman@apple.com
147D: Miscellaneous bug fixes
148
149N: David Goodwin
150E: david@goodwinz.net
151D: Thumb-2 code generator
152
153N: David Greene
154E: greened@obbligato.org
155D: Miscellaneous bug fixes
156D: Register allocation refactoring
157
158N: Gabor Greif
159E: ggreif@gmail.com
160D: Improvements for space efficiency
161
162N: James Grosbach
163E: grosbach@apple.com
164D: SjLj exception handling support
165D: General fixes and improvements for the ARM back-end
166D: MCJIT
167D: ARM integrated assembler and assembly parser
168
169N: Lang Hames
170E: lhames@gmail.com
171D: PBQP-based register allocator
172
173N: Gordon Henriksen
174E: gordonhenriksen@mac.com
175D: Pluggable GC support
176D: C interface
177D: Ocaml bindings
178
179N: Raul Fernandes Herbster
180E: raul@dsc.ufcg.edu.br
181D: JIT support for ARM
182
183N: Paolo Invernizzi
184E: arathorn@fastwebnet.it
185D: Visual C++ compatibility fixes
186
187N: Patrick Jenkins
188E: patjenk@wam.umd.edu
189D: Nightly Tester
190
191N: Dale Johannesen
192E: dalej@apple.com
193D: ARM constant islands improvements
194D: Tail merging improvements
195D: Rewrite X87 back end
196D: Use APFloat for floating point constants widely throughout compiler
197D: Implement X87 long double
198
199N: Brad Jones
200E: kungfoomaster@nondot.org
201D: Support for packed types
202
203N: Rod Kay
204E: rkay@auroraux.org
205D: Author of LLVM Ada bindings
206
207N: Eric Kidd
208W: http://randomhacks.net/
209D: llvm-config script
210
211N: Anton Korobeynikov
212E: asl@math.spbu.ru
213D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv.
214D: x86/linux PIC codegen, aliases, regparm/visibility attributes
215D: Switch lowering refactoring
216
217N: Sumant Kowshik
218E: kowshik@uiuc.edu
219D: Author of the original C backend
220
221N: Benjamin Kramer
222E: benny.kra@gmail.com
223D: Miscellaneous bug fixes
224
225N: Sundeep Kushwaha
226E: sundeepk@codeaurora.org
227D: Implemented DFA-based target independent VLIW packetizer
228
229N: Christopher Lamb
230E: christopher.lamb@gmail.com
231D: aligned load/store support, parts of noalias and restrict support
232D: vreg subreg infrastructure, X86 codegen improvements based on subregs
233D: address spaces
234
235N: Jim Laskey
236E: jlaskey@apple.com
237D: Improvements to the PPC backend, instruction scheduling
238D: Debug and Dwarf implementation
239D: Auto upgrade mangler
240D: llvm-gcc4 svn wrangler
241
242N: Chris Lattner
243E: sabre@nondot.org
244W: http://nondot.org/~sabre/
245D: Primary architect of LLVM
246
247N: Tanya Lattner (Tanya Brethour)
248E: tonic@nondot.org
249W: http://nondot.org/~tonic/
250D: The initial llvm-ar tool, converted regression testsuite to dejagnu
251D: Modulo scheduling in the SparcV9 backend
252D: Release manager (1.7+)
253
254N: Andrew Lenharth
255E: alenhar2@cs.uiuc.edu
256W: http://www.lenharth.org/~andrewl/
257D: Alpha backend
258D: Sampling based profiling
259
260N: Nick Lewycky
261E: nicholas@mxc.ca
262D: PredicateSimplifier pass
263
264N: Tony Linthicum, et. al.
265E: tlinth@codeaurora.org
266D: Backend for Qualcomm's Hexagon VLIW processor.
267
268N: Bruno Cardoso Lopes
269E: bruno.cardoso@gmail.com
270W: http://www.brunocardoso.org
271D: The Mips backend
272
273N: Duraid Madina
274E: duraid@octopus.com.au
275W: http://kinoko.c.u-tokyo.ac.jp/~duraid/
276D: IA64 backend, BigBlock register allocator
277
278N: John McCall
279E: rjmccall@apple.com
280D: Clang semantic analysis and IR generation
281
282N: Michael McCracken
283E: michael.mccracken@gmail.com
284D: Line number support for llvmgcc
285
286N: Vladimir Merzliakov
287E: wanderer@rsu.ru
288D: Test suite fixes for FreeBSD
289
290N: Scott Michel
291E: scottm@aero.org
292D: Added STI Cell SPU backend.
293
294N: Kai Nacke
295E: kai@redstar.de
296D: Support for implicit TLS model used with MS VC runtime
297
298N: Takumi Nakamura
299E: geek4civic@gmail.com
300E: chapuni@hf.rim.or.jp
301D: Cygwin and MinGW support.
302D: Win32 tweaks.
303S: Yokohama, Japan
304
305N: Edward O'Callaghan
306E: eocallaghan@auroraux.org
307W: http://www.auroraux.org
308D: Add Clang support with various other improvements to utils/NewNightlyTest.pl
309D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings
310D: and error clean ups.
311
312N: Morten Ofstad
313E: morten@hue.no
314D: Visual C++ compatibility fixes
315
316N: Jakob Stoklund Olesen
317E: stoklund@2pi.dk
318D: Machine code verifier
319D: Blackfin backend
320D: Fast register allocator
321D: Greedy register allocator
322
323N: Richard Osborne
324E: richard@xmos.com
325D: XCore backend
326
327N: Devang Patel
328E: dpatel@apple.com
329D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
330D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
331D: Optimizer improvements, Loop Index Split
332
333N: Wesley Peck
334E: peckw@wesleypeck.com
335W: http://wesleypeck.com/
336D: MicroBlaze backend
337
338N: Francois Pichet
339E: pichet2000@gmail.com
340D: MSVC support
341
342N: Vladimir Prus
343W: http://vladimir_prus.blogspot.com
344E: ghost@cs.msu.su
345D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass
346
347N: Kalle Raiskila
348E: kalle.rasikila@nokia.com
349D: Some bugfixes to CellSPU
350
351N: Xerxes Ranby
352E: xerxes@zafena.se
353D: Cmake dependency chain and various bug fixes
354
355N: Alex Rosenberg
356E: alexr@leftfield.org
357I: arosenberg
358D: ARM calling conventions rewrite, hard float support
359
360N: Chad Rosier
361E: mcrosier@apple.com
362D: ARM fast-isel improvements
363D: Performance monitoring
364
365N: Nadav Rotem
366E: nrotem@apple.com
367D: X86 code generation improvements, Loop Vectorizer.
368
369N: Roman Samoilov
370E: roman@codedgers.com
371D: MSIL backend
372
373N: Duncan Sands
374E: baldrick@free.fr
375I: baldrick
376D: Ada support in llvm-gcc
377D: Dragonegg plugin
378D: Exception handling improvements
379D: Type legalizer rewrite
380
381N: Ruchira Sasanka
382E: sasanka@uiuc.edu
383D: Graph coloring register allocator for the Sparc64 backend
384
385N: Arnold Schwaighofer
386E: arnold.schwaighofer@gmail.com
387D: Tail call optimization for the x86 backend
388
389N: Shantonu Sen
390E: ssen@apple.com
391D: Miscellaneous bug fixes
392
393N: Anand Shukla
394E: ashukla@cs.uiuc.edu
395D: The `paths' pass
396
397N: Michael J. Spencer
398E: bigcheesegs@gmail.com
399D: Shepherding Windows COFF support into MC.
400D: Lots of Windows stuff.
401
402N: Reid Spencer
403E: rspencer@reidspencer.com
404W: http://reidspencer.com/
405D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid
406
407N: Edwin Torok
408E: edwintorok@gmail.com
409D: Miscellaneous bug fixes
410
411N: Adam Treat
412E: manyoso@yahoo.com
413D: C++ bugs filed, and C++ front-end bug fixes.
414
415N: Lauro Ramos Venancio
416E: lauro.venancio@indt.org.br
417D: ARM backend improvements
418D: Thread Local Storage implementation
419
420N: Bill Wendling
421E: wendling@apple.com
422D: Exception handling
423D: Bunches of stuff
424
425N: Bob Wilson
426E: bob.wilson@acm.org
427D: Advanced SIMD (NEON) support in the ARM backend
428