MachineBasicBlock.cpp revision dd58fa4869f9bff909720aaa428487a20fab1391
1//===-- llvm/CodeGen/MachineBasicBlock.cpp ----------------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// Collect the sequence of machine instructions for a basic block. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/MachineBasicBlock.h" 15#include "llvm/ADT/SmallPtrSet.h" 16#include "llvm/ADT/SmallString.h" 17#include "llvm/Assembly/Writer.h" 18#include "llvm/CodeGen/LiveIntervalAnalysis.h" 19#include "llvm/CodeGen/LiveVariables.h" 20#include "llvm/CodeGen/MachineDominators.h" 21#include "llvm/CodeGen/MachineFunction.h" 22#include "llvm/CodeGen/MachineLoopInfo.h" 23#include "llvm/CodeGen/MachineRegisterInfo.h" 24#include "llvm/CodeGen/SlotIndexes.h" 25#include "llvm/IR/BasicBlock.h" 26#include "llvm/IR/DataLayout.h" 27#include "llvm/MC/MCAsmInfo.h" 28#include "llvm/MC/MCContext.h" 29#include "llvm/Support/Debug.h" 30#include "llvm/Support/LeakDetector.h" 31#include "llvm/Support/raw_ostream.h" 32#include "llvm/Target/TargetInstrInfo.h" 33#include "llvm/Target/TargetMachine.h" 34#include "llvm/Target/TargetRegisterInfo.h" 35#include <algorithm> 36using namespace llvm; 37 38MachineBasicBlock::MachineBasicBlock(MachineFunction &mf, const BasicBlock *bb) 39 : BB(bb), Number(-1), xParent(&mf), Alignment(0), IsLandingPad(false), 40 AddressTaken(false) { 41 Insts.Parent = this; 42} 43 44MachineBasicBlock::~MachineBasicBlock() { 45 LeakDetector::removeGarbageObject(this); 46} 47 48/// getSymbol - Return the MCSymbol for this basic block. 49/// 50MCSymbol *MachineBasicBlock::getSymbol() const { 51 const MachineFunction *MF = getParent(); 52 MCContext &Ctx = MF->getContext(); 53 const char *Prefix = Ctx.getAsmInfo().getPrivateGlobalPrefix(); 54 return Ctx.GetOrCreateSymbol(Twine(Prefix) + "BB" + 55 Twine(MF->getFunctionNumber()) + "_" + 56 Twine(getNumber())); 57} 58 59 60raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) { 61 MBB.print(OS); 62 return OS; 63} 64 65/// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the 66/// parent pointer of the MBB, the MBB numbering, and any instructions in the 67/// MBB to be on the right operand list for registers. 68/// 69/// MBBs start out as #-1. When a MBB is added to a MachineFunction, it 70/// gets the next available unique MBB number. If it is removed from a 71/// MachineFunction, it goes back to being #-1. 72void ilist_traits<MachineBasicBlock>::addNodeToList(MachineBasicBlock *N) { 73 MachineFunction &MF = *N->getParent(); 74 N->Number = MF.addToMBBNumbering(N); 75 76 // Make sure the instructions have their operands in the reginfo lists. 77 MachineRegisterInfo &RegInfo = MF.getRegInfo(); 78 for (MachineBasicBlock::instr_iterator 79 I = N->instr_begin(), E = N->instr_end(); I != E; ++I) 80 I->AddRegOperandsToUseLists(RegInfo); 81 82 LeakDetector::removeGarbageObject(N); 83} 84 85void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock *N) { 86 N->getParent()->removeFromMBBNumbering(N->Number); 87 N->Number = -1; 88 LeakDetector::addGarbageObject(N); 89} 90 91 92/// addNodeToList (MI) - When we add an instruction to a basic block 93/// list, we update its parent pointer and add its operands from reg use/def 94/// lists if appropriate. 95void ilist_traits<MachineInstr>::addNodeToList(MachineInstr *N) { 96 assert(N->getParent() == 0 && "machine instruction already in a basic block"); 97 N->setParent(Parent); 98 99 // Add the instruction's register operands to their corresponding 100 // use/def lists. 101 MachineFunction *MF = Parent->getParent(); 102 N->AddRegOperandsToUseLists(MF->getRegInfo()); 103 104 LeakDetector::removeGarbageObject(N); 105} 106 107/// removeNodeFromList (MI) - When we remove an instruction from a basic block 108/// list, we update its parent pointer and remove its operands from reg use/def 109/// lists if appropriate. 110void ilist_traits<MachineInstr>::removeNodeFromList(MachineInstr *N) { 111 assert(N->getParent() != 0 && "machine instruction not in a basic block"); 112 113 // Remove from the use/def lists. 114 if (MachineFunction *MF = N->getParent()->getParent()) 115 N->RemoveRegOperandsFromUseLists(MF->getRegInfo()); 116 117 N->setParent(0); 118 119 LeakDetector::addGarbageObject(N); 120} 121 122/// transferNodesFromList (MI) - When moving a range of instructions from one 123/// MBB list to another, we need to update the parent pointers and the use/def 124/// lists. 125void ilist_traits<MachineInstr>:: 126transferNodesFromList(ilist_traits<MachineInstr> &fromList, 127 ilist_iterator<MachineInstr> first, 128 ilist_iterator<MachineInstr> last) { 129 assert(Parent->getParent() == fromList.Parent->getParent() && 130 "MachineInstr parent mismatch!"); 131 132 // Splice within the same MBB -> no change. 133 if (Parent == fromList.Parent) return; 134 135 // If splicing between two blocks within the same function, just update the 136 // parent pointers. 137 for (; first != last; ++first) 138 first->setParent(Parent); 139} 140 141void ilist_traits<MachineInstr>::deleteNode(MachineInstr* MI) { 142 assert(!MI->getParent() && "MI is still in a block!"); 143 Parent->getParent()->DeleteMachineInstr(MI); 144} 145 146MachineBasicBlock::iterator MachineBasicBlock::getFirstNonPHI() { 147 instr_iterator I = instr_begin(), E = instr_end(); 148 while (I != E && I->isPHI()) 149 ++I; 150 assert((I == E || !I->isInsideBundle()) && 151 "First non-phi MI cannot be inside a bundle!"); 152 return I; 153} 154 155MachineBasicBlock::iterator 156MachineBasicBlock::SkipPHIsAndLabels(MachineBasicBlock::iterator I) { 157 iterator E = end(); 158 while (I != E && (I->isPHI() || I->isLabel() || I->isDebugValue())) 159 ++I; 160 // FIXME: This needs to change if we wish to bundle labels / dbg_values 161 // inside the bundle. 162 assert((I == E || !I->isInsideBundle()) && 163 "First non-phi / non-label instruction is inside a bundle!"); 164 return I; 165} 166 167MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() { 168 iterator B = begin(), E = end(), I = E; 169 while (I != B && ((--I)->isTerminator() || I->isDebugValue())) 170 ; /*noop */ 171 while (I != E && !I->isTerminator()) 172 ++I; 173 return I; 174} 175 176MachineBasicBlock::const_iterator 177MachineBasicBlock::getFirstTerminator() const { 178 const_iterator B = begin(), E = end(), I = E; 179 while (I != B && ((--I)->isTerminator() || I->isDebugValue())) 180 ; /*noop */ 181 while (I != E && !I->isTerminator()) 182 ++I; 183 return I; 184} 185 186MachineBasicBlock::instr_iterator MachineBasicBlock::getFirstInstrTerminator() { 187 instr_iterator B = instr_begin(), E = instr_end(), I = E; 188 while (I != B && ((--I)->isTerminator() || I->isDebugValue())) 189 ; /*noop */ 190 while (I != E && !I->isTerminator()) 191 ++I; 192 return I; 193} 194 195MachineBasicBlock::iterator MachineBasicBlock::getLastNonDebugInstr() { 196 // Skip over end-of-block dbg_value instructions. 197 instr_iterator B = instr_begin(), I = instr_end(); 198 while (I != B) { 199 --I; 200 // Return instruction that starts a bundle. 201 if (I->isDebugValue() || I->isInsideBundle()) 202 continue; 203 return I; 204 } 205 // The block is all debug values. 206 return end(); 207} 208 209MachineBasicBlock::const_iterator 210MachineBasicBlock::getLastNonDebugInstr() const { 211 // Skip over end-of-block dbg_value instructions. 212 const_instr_iterator B = instr_begin(), I = instr_end(); 213 while (I != B) { 214 --I; 215 // Return instruction that starts a bundle. 216 if (I->isDebugValue() || I->isInsideBundle()) 217 continue; 218 return I; 219 } 220 // The block is all debug values. 221 return end(); 222} 223 224const MachineBasicBlock *MachineBasicBlock::getLandingPadSuccessor() const { 225 // A block with a landing pad successor only has one other successor. 226 if (succ_size() > 2) 227 return 0; 228 for (const_succ_iterator I = succ_begin(), E = succ_end(); I != E; ++I) 229 if ((*I)->isLandingPad()) 230 return *I; 231 return 0; 232} 233 234#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 235void MachineBasicBlock::dump() const { 236 print(dbgs()); 237} 238#endif 239 240StringRef MachineBasicBlock::getName() const { 241 if (const BasicBlock *LBB = getBasicBlock()) 242 return LBB->getName(); 243 else 244 return "(null)"; 245} 246 247/// Return a hopefully unique identifier for this block. 248std::string MachineBasicBlock::getFullName() const { 249 std::string Name; 250 if (getParent()) 251 Name = (getParent()->getName() + ":").str(); 252 if (getBasicBlock()) 253 Name += getBasicBlock()->getName(); 254 else 255 Name += (Twine("BB") + Twine(getNumber())).str(); 256 return Name; 257} 258 259void MachineBasicBlock::print(raw_ostream &OS, SlotIndexes *Indexes) const { 260 const MachineFunction *MF = getParent(); 261 if (!MF) { 262 OS << "Can't print out MachineBasicBlock because parent MachineFunction" 263 << " is null\n"; 264 return; 265 } 266 267 if (Indexes) 268 OS << Indexes->getMBBStartIdx(this) << '\t'; 269 270 OS << "BB#" << getNumber() << ": "; 271 272 const char *Comma = ""; 273 if (const BasicBlock *LBB = getBasicBlock()) { 274 OS << Comma << "derived from LLVM BB "; 275 WriteAsOperand(OS, LBB, /*PrintType=*/false); 276 Comma = ", "; 277 } 278 if (isLandingPad()) { OS << Comma << "EH LANDING PAD"; Comma = ", "; } 279 if (hasAddressTaken()) { OS << Comma << "ADDRESS TAKEN"; Comma = ", "; } 280 if (Alignment) 281 OS << Comma << "Align " << Alignment << " (" << (1u << Alignment) 282 << " bytes)"; 283 284 OS << '\n'; 285 286 const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo(); 287 if (!livein_empty()) { 288 if (Indexes) OS << '\t'; 289 OS << " Live Ins:"; 290 for (livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I) 291 OS << ' ' << PrintReg(*I, TRI); 292 OS << '\n'; 293 } 294 // Print the preds of this block according to the CFG. 295 if (!pred_empty()) { 296 if (Indexes) OS << '\t'; 297 OS << " Predecessors according to CFG:"; 298 for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI) 299 OS << " BB#" << (*PI)->getNumber(); 300 OS << '\n'; 301 } 302 303 for (const_instr_iterator I = instr_begin(); I != instr_end(); ++I) { 304 if (Indexes) { 305 if (Indexes->hasIndex(I)) 306 OS << Indexes->getInstructionIndex(I); 307 OS << '\t'; 308 } 309 OS << '\t'; 310 if (I->isInsideBundle()) 311 OS << " * "; 312 I->print(OS, &getParent()->getTarget()); 313 } 314 315 // Print the successors of this block according to the CFG. 316 if (!succ_empty()) { 317 if (Indexes) OS << '\t'; 318 OS << " Successors according to CFG:"; 319 for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI) { 320 OS << " BB#" << (*SI)->getNumber(); 321 if (!Weights.empty()) 322 OS << '(' << *getWeightIterator(SI) << ')'; 323 } 324 OS << '\n'; 325 } 326} 327 328void MachineBasicBlock::removeLiveIn(unsigned Reg) { 329 std::vector<unsigned>::iterator I = 330 std::find(LiveIns.begin(), LiveIns.end(), Reg); 331 if (I != LiveIns.end()) 332 LiveIns.erase(I); 333} 334 335bool MachineBasicBlock::isLiveIn(unsigned Reg) const { 336 livein_iterator I = std::find(livein_begin(), livein_end(), Reg); 337 return I != livein_end(); 338} 339 340void MachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) { 341 getParent()->splice(NewAfter, this); 342} 343 344void MachineBasicBlock::moveAfter(MachineBasicBlock *NewBefore) { 345 MachineFunction::iterator BBI = NewBefore; 346 getParent()->splice(++BBI, this); 347} 348 349void MachineBasicBlock::updateTerminator() { 350 const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo(); 351 // A block with no successors has no concerns with fall-through edges. 352 if (this->succ_empty()) return; 353 354 MachineBasicBlock *TBB = 0, *FBB = 0; 355 SmallVector<MachineOperand, 4> Cond; 356 DebugLoc dl; // FIXME: this is nowhere 357 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond); 358 (void) B; 359 assert(!B && "UpdateTerminators requires analyzable predecessors!"); 360 if (Cond.empty()) { 361 if (TBB) { 362 // The block has an unconditional branch. If its successor is now 363 // its layout successor, delete the branch. 364 if (isLayoutSuccessor(TBB)) 365 TII->RemoveBranch(*this); 366 } else { 367 // The block has an unconditional fallthrough. If its successor is not 368 // its layout successor, insert a branch. First we have to locate the 369 // only non-landing-pad successor, as that is the fallthrough block. 370 for (succ_iterator SI = succ_begin(), SE = succ_end(); SI != SE; ++SI) { 371 if ((*SI)->isLandingPad()) 372 continue; 373 assert(!TBB && "Found more than one non-landing-pad successor!"); 374 TBB = *SI; 375 } 376 377 // If there is no non-landing-pad successor, the block has no 378 // fall-through edges to be concerned with. 379 if (!TBB) 380 return; 381 382 // Finally update the unconditional successor to be reached via a branch 383 // if it would not be reached by fallthrough. 384 if (!isLayoutSuccessor(TBB)) 385 TII->InsertBranch(*this, TBB, 0, Cond, dl); 386 } 387 } else { 388 if (FBB) { 389 // The block has a non-fallthrough conditional branch. If one of its 390 // successors is its layout successor, rewrite it to a fallthrough 391 // conditional branch. 392 if (isLayoutSuccessor(TBB)) { 393 if (TII->ReverseBranchCondition(Cond)) 394 return; 395 TII->RemoveBranch(*this); 396 TII->InsertBranch(*this, FBB, 0, Cond, dl); 397 } else if (isLayoutSuccessor(FBB)) { 398 TII->RemoveBranch(*this); 399 TII->InsertBranch(*this, TBB, 0, Cond, dl); 400 } 401 } else { 402 // Walk through the successors and find the successor which is not 403 // a landing pad and is not the conditional branch destination (in TBB) 404 // as the fallthrough successor. 405 MachineBasicBlock *FallthroughBB = 0; 406 for (succ_iterator SI = succ_begin(), SE = succ_end(); SI != SE; ++SI) { 407 if ((*SI)->isLandingPad() || *SI == TBB) 408 continue; 409 assert(!FallthroughBB && "Found more than one fallthrough successor."); 410 FallthroughBB = *SI; 411 } 412 if (!FallthroughBB && canFallThrough()) { 413 // We fallthrough to the same basic block as the conditional jump 414 // targets. Remove the conditional jump, leaving unconditional 415 // fallthrough. 416 // FIXME: This does not seem like a reasonable pattern to support, but it 417 // has been seen in the wild coming out of degenerate ARM test cases. 418 TII->RemoveBranch(*this); 419 420 // Finally update the unconditional successor to be reached via a branch 421 // if it would not be reached by fallthrough. 422 if (!isLayoutSuccessor(TBB)) 423 TII->InsertBranch(*this, TBB, 0, Cond, dl); 424 return; 425 } 426 427 // The block has a fallthrough conditional branch. 428 if (isLayoutSuccessor(TBB)) { 429 if (TII->ReverseBranchCondition(Cond)) { 430 // We can't reverse the condition, add an unconditional branch. 431 Cond.clear(); 432 TII->InsertBranch(*this, FallthroughBB, 0, Cond, dl); 433 return; 434 } 435 TII->RemoveBranch(*this); 436 TII->InsertBranch(*this, FallthroughBB, 0, Cond, dl); 437 } else if (!isLayoutSuccessor(FallthroughBB)) { 438 TII->RemoveBranch(*this); 439 TII->InsertBranch(*this, TBB, FallthroughBB, Cond, dl); 440 } 441 } 442 } 443} 444 445void MachineBasicBlock::addSuccessor(MachineBasicBlock *succ, uint32_t weight) { 446 447 // If we see non-zero value for the first time it means we actually use Weight 448 // list, so we fill all Weights with 0's. 449 if (weight != 0 && Weights.empty()) 450 Weights.resize(Successors.size()); 451 452 if (weight != 0 || !Weights.empty()) 453 Weights.push_back(weight); 454 455 Successors.push_back(succ); 456 succ->addPredecessor(this); 457 } 458 459void MachineBasicBlock::removeSuccessor(MachineBasicBlock *succ) { 460 succ->removePredecessor(this); 461 succ_iterator I = std::find(Successors.begin(), Successors.end(), succ); 462 assert(I != Successors.end() && "Not a current successor!"); 463 464 // If Weight list is empty it means we don't use it (disabled optimization). 465 if (!Weights.empty()) { 466 weight_iterator WI = getWeightIterator(I); 467 Weights.erase(WI); 468 } 469 470 Successors.erase(I); 471} 472 473MachineBasicBlock::succ_iterator 474MachineBasicBlock::removeSuccessor(succ_iterator I) { 475 assert(I != Successors.end() && "Not a current successor!"); 476 477 // If Weight list is empty it means we don't use it (disabled optimization). 478 if (!Weights.empty()) { 479 weight_iterator WI = getWeightIterator(I); 480 Weights.erase(WI); 481 } 482 483 (*I)->removePredecessor(this); 484 return Successors.erase(I); 485} 486 487void MachineBasicBlock::replaceSuccessor(MachineBasicBlock *Old, 488 MachineBasicBlock *New) { 489 if (Old == New) 490 return; 491 492 succ_iterator E = succ_end(); 493 succ_iterator NewI = E; 494 succ_iterator OldI = E; 495 for (succ_iterator I = succ_begin(); I != E; ++I) { 496 if (*I == Old) { 497 OldI = I; 498 if (NewI != E) 499 break; 500 } 501 if (*I == New) { 502 NewI = I; 503 if (OldI != E) 504 break; 505 } 506 } 507 assert(OldI != E && "Old is not a successor of this block"); 508 Old->removePredecessor(this); 509 510 // If New isn't already a successor, let it take Old's place. 511 if (NewI == E) { 512 New->addPredecessor(this); 513 *OldI = New; 514 return; 515 } 516 517 // New is already a successor. 518 // Update its weight instead of adding a duplicate edge. 519 if (!Weights.empty()) { 520 weight_iterator OldWI = getWeightIterator(OldI); 521 *getWeightIterator(NewI) += *OldWI; 522 Weights.erase(OldWI); 523 } 524 Successors.erase(OldI); 525} 526 527void MachineBasicBlock::addPredecessor(MachineBasicBlock *pred) { 528 Predecessors.push_back(pred); 529} 530 531void MachineBasicBlock::removePredecessor(MachineBasicBlock *pred) { 532 pred_iterator I = std::find(Predecessors.begin(), Predecessors.end(), pred); 533 assert(I != Predecessors.end() && "Pred is not a predecessor of this block!"); 534 Predecessors.erase(I); 535} 536 537void MachineBasicBlock::transferSuccessors(MachineBasicBlock *fromMBB) { 538 if (this == fromMBB) 539 return; 540 541 while (!fromMBB->succ_empty()) { 542 MachineBasicBlock *Succ = *fromMBB->succ_begin(); 543 uint32_t Weight = 0; 544 545 // If Weight list is empty it means we don't use it (disabled optimization). 546 if (!fromMBB->Weights.empty()) 547 Weight = *fromMBB->Weights.begin(); 548 549 addSuccessor(Succ, Weight); 550 fromMBB->removeSuccessor(Succ); 551 } 552} 553 554void 555MachineBasicBlock::transferSuccessorsAndUpdatePHIs(MachineBasicBlock *fromMBB) { 556 if (this == fromMBB) 557 return; 558 559 while (!fromMBB->succ_empty()) { 560 MachineBasicBlock *Succ = *fromMBB->succ_begin(); 561 uint32_t Weight = 0; 562 if (!fromMBB->Weights.empty()) 563 Weight = *fromMBB->Weights.begin(); 564 addSuccessor(Succ, Weight); 565 fromMBB->removeSuccessor(Succ); 566 567 // Fix up any PHI nodes in the successor. 568 for (MachineBasicBlock::instr_iterator MI = Succ->instr_begin(), 569 ME = Succ->instr_end(); MI != ME && MI->isPHI(); ++MI) 570 for (unsigned i = 2, e = MI->getNumOperands()+1; i != e; i += 2) { 571 MachineOperand &MO = MI->getOperand(i); 572 if (MO.getMBB() == fromMBB) 573 MO.setMBB(this); 574 } 575 } 576} 577 578bool MachineBasicBlock::isPredecessor(const MachineBasicBlock *MBB) const { 579 return std::find(pred_begin(), pred_end(), MBB) != pred_end(); 580} 581 582bool MachineBasicBlock::isSuccessor(const MachineBasicBlock *MBB) const { 583 return std::find(succ_begin(), succ_end(), MBB) != succ_end(); 584} 585 586bool MachineBasicBlock::isLayoutSuccessor(const MachineBasicBlock *MBB) const { 587 MachineFunction::const_iterator I(this); 588 return llvm::next(I) == MachineFunction::const_iterator(MBB); 589} 590 591bool MachineBasicBlock::canFallThrough() { 592 MachineFunction::iterator Fallthrough = this; 593 ++Fallthrough; 594 // If FallthroughBlock is off the end of the function, it can't fall through. 595 if (Fallthrough == getParent()->end()) 596 return false; 597 598 // If FallthroughBlock isn't a successor, no fallthrough is possible. 599 if (!isSuccessor(Fallthrough)) 600 return false; 601 602 // Analyze the branches, if any, at the end of the block. 603 MachineBasicBlock *TBB = 0, *FBB = 0; 604 SmallVector<MachineOperand, 4> Cond; 605 const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo(); 606 if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) { 607 // If we couldn't analyze the branch, examine the last instruction. 608 // If the block doesn't end in a known control barrier, assume fallthrough 609 // is possible. The isPredicated check is needed because this code can be 610 // called during IfConversion, where an instruction which is normally a 611 // Barrier is predicated and thus no longer an actual control barrier. 612 return empty() || !back().isBarrier() || TII->isPredicated(&back()); 613 } 614 615 // If there is no branch, control always falls through. 616 if (TBB == 0) return true; 617 618 // If there is some explicit branch to the fallthrough block, it can obviously 619 // reach, even though the branch should get folded to fall through implicitly. 620 if (MachineFunction::iterator(TBB) == Fallthrough || 621 MachineFunction::iterator(FBB) == Fallthrough) 622 return true; 623 624 // If it's an unconditional branch to some block not the fall through, it 625 // doesn't fall through. 626 if (Cond.empty()) return false; 627 628 // Otherwise, if it is conditional and has no explicit false block, it falls 629 // through. 630 return FBB == 0; 631} 632 633MachineBasicBlock * 634MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ, Pass *P) { 635 // Splitting the critical edge to a landing pad block is non-trivial. Don't do 636 // it in this generic function. 637 if (Succ->isLandingPad()) 638 return NULL; 639 640 MachineFunction *MF = getParent(); 641 DebugLoc dl; // FIXME: this is nowhere 642 643 // We may need to update this's terminator, but we can't do that if 644 // AnalyzeBranch fails. If this uses a jump table, we won't touch it. 645 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo(); 646 MachineBasicBlock *TBB = 0, *FBB = 0; 647 SmallVector<MachineOperand, 4> Cond; 648 if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) 649 return NULL; 650 651 // Avoid bugpoint weirdness: A block may end with a conditional branch but 652 // jumps to the same MBB is either case. We have duplicate CFG edges in that 653 // case that we can't handle. Since this never happens in properly optimized 654 // code, just skip those edges. 655 if (TBB && TBB == FBB) { 656 DEBUG(dbgs() << "Won't split critical edge after degenerate BB#" 657 << getNumber() << '\n'); 658 return NULL; 659 } 660 661 MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock(); 662 MF->insert(llvm::next(MachineFunction::iterator(this)), NMBB); 663 DEBUG(dbgs() << "Splitting critical edge:" 664 " BB#" << getNumber() 665 << " -- BB#" << NMBB->getNumber() 666 << " -- BB#" << Succ->getNumber() << '\n'); 667 668 LiveIntervals *LIS = P->getAnalysisIfAvailable<LiveIntervals>(); 669 SlotIndexes *Indexes = P->getAnalysisIfAvailable<SlotIndexes>(); 670 if (LIS) 671 LIS->insertMBBInMaps(NMBB); 672 else if (Indexes) 673 Indexes->insertMBBInMaps(NMBB); 674 675 // On some targets like Mips, branches may kill virtual registers. Make sure 676 // that LiveVariables is properly updated after updateTerminator replaces the 677 // terminators. 678 LiveVariables *LV = P->getAnalysisIfAvailable<LiveVariables>(); 679 680 // Collect a list of virtual registers killed by the terminators. 681 SmallVector<unsigned, 4> KilledRegs; 682 if (LV) 683 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end(); 684 I != E; ++I) { 685 MachineInstr *MI = I; 686 for (MachineInstr::mop_iterator OI = MI->operands_begin(), 687 OE = MI->operands_end(); OI != OE; ++OI) { 688 if (!OI->isReg() || OI->getReg() == 0 || 689 !OI->isUse() || !OI->isKill() || OI->isUndef()) 690 continue; 691 unsigned Reg = OI->getReg(); 692 if (TargetRegisterInfo::isPhysicalRegister(Reg) || 693 LV->getVarInfo(Reg).removeKill(MI)) { 694 KilledRegs.push_back(Reg); 695 DEBUG(dbgs() << "Removing terminator kill: " << *MI); 696 OI->setIsKill(false); 697 } 698 } 699 } 700 701 ReplaceUsesOfBlockWith(Succ, NMBB); 702 703 // If updateTerminator() removes instructions, we need to remove them from 704 // SlotIndexes. 705 SmallVector<MachineInstr*, 4> Terminators; 706 if (Indexes) { 707 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end(); 708 I != E; ++I) 709 Terminators.push_back(I); 710 } 711 712 updateTerminator(); 713 714 if (Indexes) { 715 SmallVector<MachineInstr*, 4> NewTerminators; 716 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end(); 717 I != E; ++I) 718 NewTerminators.push_back(I); 719 720 for (SmallVectorImpl<MachineInstr*>::iterator I = Terminators.begin(), 721 E = Terminators.end(); I != E; ++I) { 722 if (std::find(NewTerminators.begin(), NewTerminators.end(), *I) == 723 NewTerminators.end()) 724 Indexes->removeMachineInstrFromMaps(*I); 725 } 726 } 727 728 // Insert unconditional "jump Succ" instruction in NMBB if necessary. 729 NMBB->addSuccessor(Succ); 730 if (!NMBB->isLayoutSuccessor(Succ)) { 731 Cond.clear(); 732 MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, Succ, NULL, Cond, dl); 733 734 if (Indexes) { 735 for (instr_iterator I = NMBB->instr_begin(), E = NMBB->instr_end(); 736 I != E; ++I) { 737 // Some instructions may have been moved to NMBB by updateTerminator(), 738 // so we first remove any instruction that already has an index. 739 if (Indexes->hasIndex(I)) 740 Indexes->removeMachineInstrFromMaps(I); 741 Indexes->insertMachineInstrInMaps(I); 742 } 743 } 744 } 745 746 // Fix PHI nodes in Succ so they refer to NMBB instead of this 747 for (MachineBasicBlock::instr_iterator 748 i = Succ->instr_begin(),e = Succ->instr_end(); 749 i != e && i->isPHI(); ++i) 750 for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2) 751 if (i->getOperand(ni+1).getMBB() == this) 752 i->getOperand(ni+1).setMBB(NMBB); 753 754 // Inherit live-ins from the successor 755 for (MachineBasicBlock::livein_iterator I = Succ->livein_begin(), 756 E = Succ->livein_end(); I != E; ++I) 757 NMBB->addLiveIn(*I); 758 759 // Update LiveVariables. 760 const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo(); 761 if (LV) { 762 // Restore kills of virtual registers that were killed by the terminators. 763 while (!KilledRegs.empty()) { 764 unsigned Reg = KilledRegs.pop_back_val(); 765 for (instr_iterator I = instr_end(), E = instr_begin(); I != E;) { 766 if (!(--I)->addRegisterKilled(Reg, TRI, /* addIfNotFound= */ false)) 767 continue; 768 if (TargetRegisterInfo::isVirtualRegister(Reg)) 769 LV->getVarInfo(Reg).Kills.push_back(I); 770 DEBUG(dbgs() << "Restored terminator kill: " << *I); 771 break; 772 } 773 } 774 // Update relevant live-through information. 775 LV->addNewBlock(NMBB, this, Succ); 776 } 777 778 if (LIS) { 779 // After splitting the edge and updating SlotIndexes, live intervals may be 780 // in one of two situations, depending on whether this block was the last in 781 // the function. If the original block was the last in the function, all live 782 // intervals will end prior to the beginning of the new split block. If the 783 // original block was not at the end of the function, all live intervals will 784 // extend to the end of the new split block. 785 786 bool isLastMBB = 787 llvm::next(MachineFunction::iterator(NMBB)) == getParent()->end(); 788 789 SlotIndex StartIndex = Indexes->getMBBEndIdx(this); 790 SlotIndex PrevIndex = StartIndex.getPrevSlot(); 791 SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB); 792 793 // Find the registers used from NMBB in PHIs in Succ. 794 SmallSet<unsigned, 8> PHISrcRegs; 795 for (MachineBasicBlock::instr_iterator 796 I = Succ->instr_begin(), E = Succ->instr_end(); 797 I != E && I->isPHI(); ++I) { 798 for (unsigned ni = 1, ne = I->getNumOperands(); ni != ne; ni += 2) { 799 if (I->getOperand(ni+1).getMBB() == NMBB) { 800 MachineOperand &MO = I->getOperand(ni); 801 unsigned Reg = MO.getReg(); 802 PHISrcRegs.insert(Reg); 803 if (MO.isUndef()) 804 continue; 805 806 LiveInterval &LI = LIS->getInterval(Reg); 807 VNInfo *VNI = LI.getVNInfoAt(PrevIndex); 808 assert(VNI && "PHI sources should be live out of their predecessors."); 809 LI.addRange(LiveRange(StartIndex, EndIndex, VNI)); 810 } 811 } 812 } 813 814 MachineRegisterInfo *MRI = &getParent()->getRegInfo(); 815 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) { 816 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); 817 if (PHISrcRegs.count(Reg) || !LIS->hasInterval(Reg)) 818 continue; 819 820 LiveInterval &LI = LIS->getInterval(Reg); 821 if (!LI.liveAt(PrevIndex)) 822 continue; 823 824 bool isLiveOut = LI.liveAt(LIS->getMBBStartIdx(Succ)); 825 if (isLiveOut && isLastMBB) { 826 VNInfo *VNI = LI.getVNInfoAt(PrevIndex); 827 assert(VNI && "LiveInterval should have VNInfo where it is live."); 828 LI.addRange(LiveRange(StartIndex, EndIndex, VNI)); 829 } else if (!isLiveOut && !isLastMBB) { 830 LI.removeRange(StartIndex, EndIndex); 831 } 832 } 833 } 834 835 if (MachineDominatorTree *MDT = 836 P->getAnalysisIfAvailable<MachineDominatorTree>()) { 837 // Update dominator information. 838 MachineDomTreeNode *SucccDTNode = MDT->getNode(Succ); 839 840 bool IsNewIDom = true; 841 for (const_pred_iterator PI = Succ->pred_begin(), E = Succ->pred_end(); 842 PI != E; ++PI) { 843 MachineBasicBlock *PredBB = *PI; 844 if (PredBB == NMBB) 845 continue; 846 if (!MDT->dominates(SucccDTNode, MDT->getNode(PredBB))) { 847 IsNewIDom = false; 848 break; 849 } 850 } 851 852 // We know "this" dominates the newly created basic block. 853 MachineDomTreeNode *NewDTNode = MDT->addNewBlock(NMBB, this); 854 855 // If all the other predecessors of "Succ" are dominated by "Succ" itself 856 // then the new block is the new immediate dominator of "Succ". Otherwise, 857 // the new block doesn't dominate anything. 858 if (IsNewIDom) 859 MDT->changeImmediateDominator(SucccDTNode, NewDTNode); 860 } 861 862 if (MachineLoopInfo *MLI = P->getAnalysisIfAvailable<MachineLoopInfo>()) 863 if (MachineLoop *TIL = MLI->getLoopFor(this)) { 864 // If one or the other blocks were not in a loop, the new block is not 865 // either, and thus LI doesn't need to be updated. 866 if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) { 867 if (TIL == DestLoop) { 868 // Both in the same loop, the NMBB joins loop. 869 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase()); 870 } else if (TIL->contains(DestLoop)) { 871 // Edge from an outer loop to an inner loop. Add to the outer loop. 872 TIL->addBasicBlockToLoop(NMBB, MLI->getBase()); 873 } else if (DestLoop->contains(TIL)) { 874 // Edge from an inner loop to an outer loop. Add to the outer loop. 875 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase()); 876 } else { 877 // Edge from two loops with no containment relation. Because these 878 // are natural loops, we know that the destination block must be the 879 // header of its loop (adding a branch into a loop elsewhere would 880 // create an irreducible loop). 881 assert(DestLoop->getHeader() == Succ && 882 "Should not create irreducible loops!"); 883 if (MachineLoop *P = DestLoop->getParentLoop()) 884 P->addBasicBlockToLoop(NMBB, MLI->getBase()); 885 } 886 } 887 } 888 889 return NMBB; 890} 891 892/// Prepare MI to be removed from its bundle. This fixes bundle flags on MI's 893/// neighboring instructions so the bundle won't be broken by removing MI. 894static void unbundleSingleMI(MachineInstr *MI) { 895 // Removing the first instruction in a bundle. 896 if (MI->isBundledWithSucc() && !MI->isBundledWithPred()) 897 MI->unbundleFromSucc(); 898 // Removing the last instruction in a bundle. 899 if (MI->isBundledWithPred() && !MI->isBundledWithSucc()) 900 MI->unbundleFromPred(); 901 // If MI is not bundled, or if it is internal to a bundle, the neighbor flags 902 // are already fine. 903} 904 905MachineBasicBlock::instr_iterator 906MachineBasicBlock::erase(MachineBasicBlock::instr_iterator I) { 907 unbundleSingleMI(I); 908 return Insts.erase(I); 909} 910 911MachineInstr *MachineBasicBlock::remove_instr(MachineInstr *MI) { 912 unbundleSingleMI(MI); 913 MI->clearFlag(MachineInstr::BundledPred); 914 MI->clearFlag(MachineInstr::BundledSucc); 915 return Insts.remove(MI); 916} 917 918MachineBasicBlock::instr_iterator 919MachineBasicBlock::insert(instr_iterator I, MachineInstr *MI) { 920 assert(!MI->isBundledWithPred() && !MI->isBundledWithSucc() && 921 "Cannot insert instruction with bundle flags"); 922 // Set the bundle flags when inserting inside a bundle. 923 if (I != instr_end() && I->isBundledWithPred()) { 924 MI->setFlag(MachineInstr::BundledPred); 925 MI->setFlag(MachineInstr::BundledSucc); 926 } 927 return Insts.insert(I, MI); 928} 929 930/// removeFromParent - This method unlinks 'this' from the containing function, 931/// and returns it, but does not delete it. 932MachineBasicBlock *MachineBasicBlock::removeFromParent() { 933 assert(getParent() && "Not embedded in a function!"); 934 getParent()->remove(this); 935 return this; 936} 937 938 939/// eraseFromParent - This method unlinks 'this' from the containing function, 940/// and deletes it. 941void MachineBasicBlock::eraseFromParent() { 942 assert(getParent() && "Not embedded in a function!"); 943 getParent()->erase(this); 944} 945 946 947/// ReplaceUsesOfBlockWith - Given a machine basic block that branched to 948/// 'Old', change the code and CFG so that it branches to 'New' instead. 949void MachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old, 950 MachineBasicBlock *New) { 951 assert(Old != New && "Cannot replace self with self!"); 952 953 MachineBasicBlock::instr_iterator I = instr_end(); 954 while (I != instr_begin()) { 955 --I; 956 if (!I->isTerminator()) break; 957 958 // Scan the operands of this machine instruction, replacing any uses of Old 959 // with New. 960 for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) 961 if (I->getOperand(i).isMBB() && 962 I->getOperand(i).getMBB() == Old) 963 I->getOperand(i).setMBB(New); 964 } 965 966 // Update the successor information. 967 replaceSuccessor(Old, New); 968} 969 970/// CorrectExtraCFGEdges - Various pieces of code can cause excess edges in the 971/// CFG to be inserted. If we have proven that MBB can only branch to DestA and 972/// DestB, remove any other MBB successors from the CFG. DestA and DestB can be 973/// null. 974/// 975/// Besides DestA and DestB, retain other edges leading to LandingPads 976/// (currently there can be only one; we don't check or require that here). 977/// Note it is possible that DestA and/or DestB are LandingPads. 978bool MachineBasicBlock::CorrectExtraCFGEdges(MachineBasicBlock *DestA, 979 MachineBasicBlock *DestB, 980 bool isCond) { 981 // The values of DestA and DestB frequently come from a call to the 982 // 'TargetInstrInfo::AnalyzeBranch' method. We take our meaning of the initial 983 // values from there. 984 // 985 // 1. If both DestA and DestB are null, then the block ends with no branches 986 // (it falls through to its successor). 987 // 2. If DestA is set, DestB is null, and isCond is false, then the block ends 988 // with only an unconditional branch. 989 // 3. If DestA is set, DestB is null, and isCond is true, then the block ends 990 // with a conditional branch that falls through to a successor (DestB). 991 // 4. If DestA and DestB is set and isCond is true, then the block ends with a 992 // conditional branch followed by an unconditional branch. DestA is the 993 // 'true' destination and DestB is the 'false' destination. 994 995 bool Changed = false; 996 997 MachineFunction::iterator FallThru = 998 llvm::next(MachineFunction::iterator(this)); 999 1000 if (DestA == 0 && DestB == 0) { 1001 // Block falls through to successor. 1002 DestA = FallThru; 1003 DestB = FallThru; 1004 } else if (DestA != 0 && DestB == 0) { 1005 if (isCond) 1006 // Block ends in conditional jump that falls through to successor. 1007 DestB = FallThru; 1008 } else { 1009 assert(DestA && DestB && isCond && 1010 "CFG in a bad state. Cannot correct CFG edges"); 1011 } 1012 1013 // Remove superfluous edges. I.e., those which aren't destinations of this 1014 // basic block, duplicate edges, or landing pads. 1015 SmallPtrSet<const MachineBasicBlock*, 8> SeenMBBs; 1016 MachineBasicBlock::succ_iterator SI = succ_begin(); 1017 while (SI != succ_end()) { 1018 const MachineBasicBlock *MBB = *SI; 1019 if (!SeenMBBs.insert(MBB) || 1020 (MBB != DestA && MBB != DestB && !MBB->isLandingPad())) { 1021 // This is a superfluous edge, remove it. 1022 SI = removeSuccessor(SI); 1023 Changed = true; 1024 } else { 1025 ++SI; 1026 } 1027 } 1028 1029 return Changed; 1030} 1031 1032/// findDebugLoc - find the next valid DebugLoc starting at MBBI, skipping 1033/// any DBG_VALUE instructions. Return UnknownLoc if there is none. 1034DebugLoc 1035MachineBasicBlock::findDebugLoc(instr_iterator MBBI) { 1036 DebugLoc DL; 1037 instr_iterator E = instr_end(); 1038 if (MBBI == E) 1039 return DL; 1040 1041 // Skip debug declarations, we don't want a DebugLoc from them. 1042 while (MBBI != E && MBBI->isDebugValue()) 1043 MBBI++; 1044 if (MBBI != E) 1045 DL = MBBI->getDebugLoc(); 1046 return DL; 1047} 1048 1049/// getSuccWeight - Return weight of the edge from this block to MBB. 1050/// 1051uint32_t MachineBasicBlock::getSuccWeight(const_succ_iterator Succ) const { 1052 if (Weights.empty()) 1053 return 0; 1054 1055 return *getWeightIterator(Succ); 1056} 1057 1058/// getWeightIterator - Return wight iterator corresonding to the I successor 1059/// iterator 1060MachineBasicBlock::weight_iterator MachineBasicBlock:: 1061getWeightIterator(MachineBasicBlock::succ_iterator I) { 1062 assert(Weights.size() == Successors.size() && "Async weight list!"); 1063 size_t index = std::distance(Successors.begin(), I); 1064 assert(index < Weights.size() && "Not a current successor!"); 1065 return Weights.begin() + index; 1066} 1067 1068/// getWeightIterator - Return wight iterator corresonding to the I successor 1069/// iterator 1070MachineBasicBlock::const_weight_iterator MachineBasicBlock:: 1071getWeightIterator(MachineBasicBlock::const_succ_iterator I) const { 1072 assert(Weights.size() == Successors.size() && "Async weight list!"); 1073 const size_t index = std::distance(Successors.begin(), I); 1074 assert(index < Weights.size() && "Not a current successor!"); 1075 return Weights.begin() + index; 1076} 1077 1078/// Return whether (physical) register "Reg" has been <def>ined and not <kill>ed 1079/// as of just before "MI". 1080/// 1081/// Search is localised to a neighborhood of 1082/// Neighborhood instructions before (searching for defs or kills) and N 1083/// instructions after (searching just for defs) MI. 1084MachineBasicBlock::LivenessQueryResult 1085MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI, 1086 unsigned Reg, MachineInstr *MI, 1087 unsigned Neighborhood) { 1088 unsigned N = Neighborhood; 1089 MachineBasicBlock *MBB = MI->getParent(); 1090 1091 // Start by searching backwards from MI, looking for kills, reads or defs. 1092 1093 MachineBasicBlock::iterator I(MI); 1094 // If this is the first insn in the block, don't search backwards. 1095 if (I != MBB->begin()) { 1096 do { 1097 --I; 1098 1099 MachineOperandIteratorBase::PhysRegInfo Analysis = 1100 MIOperands(I).analyzePhysReg(Reg, TRI); 1101 1102 if (Analysis.Defines) 1103 // Outputs happen after inputs so they take precedence if both are 1104 // present. 1105 return Analysis.DefinesDead ? LQR_Dead : LQR_Live; 1106 1107 if (Analysis.Kills || Analysis.Clobbers) 1108 // Register killed, so isn't live. 1109 return LQR_Dead; 1110 1111 else if (Analysis.ReadsOverlap) 1112 // Defined or read without a previous kill - live. 1113 return Analysis.Reads ? LQR_Live : LQR_OverlappingLive; 1114 1115 } while (I != MBB->begin() && --N > 0); 1116 } 1117 1118 // Did we get to the start of the block? 1119 if (I == MBB->begin()) { 1120 // If so, the register's state is definitely defined by the live-in state. 1121 for (MCRegAliasIterator RAI(Reg, TRI, /*IncludeSelf=*/true); 1122 RAI.isValid(); ++RAI) { 1123 if (MBB->isLiveIn(*RAI)) 1124 return (*RAI == Reg) ? LQR_Live : LQR_OverlappingLive; 1125 } 1126 1127 return LQR_Dead; 1128 } 1129 1130 N = Neighborhood; 1131 1132 // Try searching forwards from MI, looking for reads or defs. 1133 I = MachineBasicBlock::iterator(MI); 1134 // If this is the last insn in the block, don't search forwards. 1135 if (I != MBB->end()) { 1136 for (++I; I != MBB->end() && N > 0; ++I, --N) { 1137 MachineOperandIteratorBase::PhysRegInfo Analysis = 1138 MIOperands(I).analyzePhysReg(Reg, TRI); 1139 1140 if (Analysis.ReadsOverlap) 1141 // Used, therefore must have been live. 1142 return (Analysis.Reads) ? 1143 LQR_Live : LQR_OverlappingLive; 1144 1145 else if (Analysis.Clobbers || Analysis.Defines) 1146 // Defined (but not read) therefore cannot have been live. 1147 return LQR_Dead; 1148 } 1149 } 1150 1151 // At this point we have no idea of the liveness of the register. 1152 return LQR_Unknown; 1153} 1154 1155void llvm::WriteAsOperand(raw_ostream &OS, const MachineBasicBlock *MBB, 1156 bool t) { 1157 OS << "BB#" << MBB->getNumber(); 1158} 1159 1160