RegAllocBase.h revision 7fb95d4235ad588d4105544b2ae3fa1aa0eba3b1
114e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick//===-- RegAllocBase.h - basic regalloc interface and driver --*- C++ -*---===// 214e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// 314e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// The LLVM Compiler Infrastructure 414e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// 514e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// This file is distributed under the University of Illinois Open Source 614e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// License. See LICENSE.TXT for details. 714e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// 814e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick//===----------------------------------------------------------------------===// 914e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// 1014e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// This file defines the RegAllocBase class, which is the skeleton of a basic 1114e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// register allocation algorithm and interface for extending it. It provides the 1214e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// building blocks on which to construct other experimental allocators and test 1314e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// the validity of two principles: 1418c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick// 1514e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// - If virtual and physical register liveness is modeled using intervals, then 1614e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// on-the-fly interference checking is cheap. Furthermore, interferences can be 1714e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// lazily cached and reused. 1818c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick// 1914e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// - Register allocation complexity, and generated code performance is 2014e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// determined by the effectiveness of live range splitting rather than optimal 2114e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// coloring. 2214e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// 2314e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// Following the first principle, interfering checking revolves around the 2414e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// LiveIntervalUnion data structure. 2514e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// 2614e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// To fulfill the second principle, the basic allocator provides a driver for 2714e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// incremental splitting. It essentially punts on the problem of register 2814e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// coloring, instead driving the assignment of virtual to physical registers by 2914e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// the cost of splitting. The basic allocator allows for heuristic reassignment 3014e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// of registers, if a more sophisticated allocator chooses to do that. 3114e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// 3214e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// This framework provides a way to engineer the compile time vs. code 337fb95d4235ad588d4105544b2ae3fa1aa0eba3b1Cameron Zwarich// quality trade-off without relying on a particular theoretical solver. 3414e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick// 3514e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick//===----------------------------------------------------------------------===// 3614e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 3714e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick#ifndef LLVM_CODEGEN_REGALLOCBASE 3814e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick#define LLVM_CODEGEN_REGALLOCBASE 3914e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 4014e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick#include "llvm/ADT/OwningPtr.h" 41953af2c3c560a13bd5eeb676c128b7e362dca684Jakob Stoklund Olesen#include "LiveIntervalUnion.h" 42d0bec3e62c98b1f0ef3a41db8f95599b2014c131Jakob Stoklund Olesen#include <queue> 4314e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 4414e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Tricknamespace llvm { 4514e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 46e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Tricktemplate<typename T> class SmallVectorImpl; 47e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trickclass TargetRegisterInfo; 4814e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trickclass VirtRegMap; 49e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trickclass LiveIntervals; 50f4baeaf8485f01beda46d29fd55753199dc68070Andrew Trickclass Spiller; 51e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick 52e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick// Forward declare a priority queue of live virtual registers. If an 53e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick// implementation needs to prioritize by anything other than spill weight, then 54e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick// this will become an abstract base class with virtual calls to push/get. 55e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trickclass LiveVirtRegQueue; 5614e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 5714e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick/// RegAllocBase provides the register allocation driver and interface that can 5814e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick/// be extended to add interesting heuristics. 5914e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick/// 6018c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick/// Register allocators must override the selectOrSplit() method to implement 61b853e6c3702149cdbbd6fa404334e3ba0055641aAndrew Trick/// live range splitting. They may also override getPriority() which otherwise 62b853e6c3702149cdbbd6fa404334e3ba0055641aAndrew Trick/// defaults to the spill weight computed by CalculateSpillWeights. 6314e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trickclass RegAllocBase { 64953af2c3c560a13bd5eeb676c128b7e362dca684Jakob Stoklund Olesen LiveIntervalUnion::Allocator UnionAllocator; 6514e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trickprotected: 6614e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick // Array of LiveIntervalUnions indexed by physical register. 6718c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick class LiveUnionArray { 6818c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick unsigned NumRegs; 69953af2c3c560a13bd5eeb676c128b7e362dca684Jakob Stoklund Olesen LiveIntervalUnion *Array; 7014e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick public: 71953af2c3c560a13bd5eeb676c128b7e362dca684Jakob Stoklund Olesen LiveUnionArray(): NumRegs(0), Array(0) {} 72953af2c3c560a13bd5eeb676c128b7e362dca684Jakob Stoklund Olesen ~LiveUnionArray() { clear(); } 7314e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 7418c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick unsigned numRegs() const { return NumRegs; } 7514e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 76953af2c3c560a13bd5eeb676c128b7e362dca684Jakob Stoklund Olesen void init(LiveIntervalUnion::Allocator &, unsigned NRegs); 7714e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 7814e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick void clear(); 7918c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick 8018c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick LiveIntervalUnion& operator[](unsigned PhysReg) { 8118c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick assert(PhysReg < NumRegs && "physReg out of bounds"); 8218c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick return Array[PhysReg]; 8314e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick } 8414e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick }; 8518c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick 8618c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick const TargetRegisterInfo *TRI; 874680dec5fb3a1b624f13ca9b2a555ca90a07973eJakob Stoklund Olesen MachineRegisterInfo *MRI; 8818c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick VirtRegMap *VRM; 8918c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick LiveIntervals *LIS; 9018c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick LiveUnionArray PhysReg2LiveUnion; 9114e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 92e141a4960f702bef957b28abde3801ec64e32d87Andrew Trick // Current queries, one per physreg. They must be reinitialized each time we 93e141a4960f702bef957b28abde3801ec64e32d87Andrew Trick // query on a new live virtual register. 9418c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick OwningArrayPtr<LiveIntervalUnion::Query> Queries; 95e141a4960f702bef957b28abde3801ec64e32d87Andrew Trick 964680dec5fb3a1b624f13ca9b2a555ca90a07973eJakob Stoklund Olesen RegAllocBase(): TRI(0), MRI(0), VRM(0), LIS(0) {} 9714e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 98f4331060548004471f5bb10e330ba4ce4de28ad2Andrew Trick virtual ~RegAllocBase() {} 99f4331060548004471f5bb10e330ba4ce4de28ad2Andrew Trick 10014e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick // A RegAlloc pass should call this before allocatePhysRegs. 1014680dec5fb3a1b624f13ca9b2a555ca90a07973eJakob Stoklund Olesen void init(VirtRegMap &vrm, LiveIntervals &lis); 10214e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 1038a83d54528c197675ba0f21ebe95ac30fa3d8841Andrew Trick // Get an initialized query to check interferences between lvr and preg. Note 1048a83d54528c197675ba0f21ebe95ac30fa3d8841Andrew Trick // that Query::init must be called at least once for each physical register 10518c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick // before querying a new live virtual register. This ties Queries and 10618c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick // PhysReg2LiveUnion together. 10718c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick LiveIntervalUnion::Query &query(LiveInterval &VirtReg, unsigned PhysReg) { 10818c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick Queries[PhysReg].init(&VirtReg, &PhysReg2LiveUnion[PhysReg]); 10918c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick return Queries[PhysReg]; 1108a83d54528c197675ba0f21ebe95ac30fa3d8841Andrew Trick } 11118c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick 112e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick // The top-level driver. The output is a VirtRegMap that us updated with 113e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick // physical register assignments. 114e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick // 115e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick // If an implementation wants to override the LiveInterval comparator, we 116e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick // should modify this interface to allow passing in an instance derived from 117e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick // LiveVirtRegQueue. 118e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick void allocatePhysRegs(); 11914e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 120f4baeaf8485f01beda46d29fd55753199dc68070Andrew Trick // Get a temporary reference to a Spiller instance. 121f4baeaf8485f01beda46d29fd55753199dc68070Andrew Trick virtual Spiller &spiller() = 0; 12218c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick 123d0bec3e62c98b1f0ef3a41db8f95599b2014c131Jakob Stoklund Olesen // getPriority - Calculate the allocation priority for VirtReg. 124d0bec3e62c98b1f0ef3a41db8f95599b2014c131Jakob Stoklund Olesen // Virtual registers with higher priorities are allocated first. 125d0bec3e62c98b1f0ef3a41db8f95599b2014c131Jakob Stoklund Olesen virtual float getPriority(LiveInterval *LI) = 0; 126d0bec3e62c98b1f0ef3a41db8f95599b2014c131Jakob Stoklund Olesen 12714e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick // A RegAlloc pass should override this to provide the allocation heuristics. 128e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick // Each call must guarantee forward progess by returning an available PhysReg 129e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick // or new set of split live virtual registers. It is up to the splitter to 13014e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick // converge quickly toward fully spilled live ranges. 13118c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick virtual unsigned selectOrSplit(LiveInterval &VirtReg, 132e16eecc323879744dcff4f359ba9ccdb25bd6909Andrew Trick SmallVectorImpl<LiveInterval*> &splitLVRs) = 0; 13314e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 13414e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick // A RegAlloc pass should call this when PassManager releases its memory. 13514e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick virtual void releaseMemory(); 13614e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 13714e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick // Helper for checking interference between a live virtual register and a 138e141a4960f702bef957b28abde3801ec64e32d87Andrew Trick // physical register, including all its register aliases. If an interference 139e141a4960f702bef957b28abde3801ec64e32d87Andrew Trick // exists, return the interfering register, which may be preg or an alias. 14018c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick unsigned checkPhysRegInterference(LiveInterval& VirtReg, unsigned PhysReg); 141e141a4960f702bef957b28abde3801ec64e32d87Andrew Trick 142f4baeaf8485f01beda46d29fd55753199dc68070Andrew Trick // Helper for spilling all live virtual registers currently unified under preg 143f4baeaf8485f01beda46d29fd55753199dc68070Andrew Trick // that interfere with the most recently queried lvr. Return true if spilling 144f4baeaf8485f01beda46d29fd55753199dc68070Andrew Trick // was successful, and append any new spilled/split intervals to splitLVRs. 14518c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick bool spillInterferences(LiveInterval &VirtReg, unsigned PhysReg, 14618c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick SmallVectorImpl<LiveInterval*> &SplitVRegs); 147f4baeaf8485f01beda46d29fd55753199dc68070Andrew Trick 1481b19dc1d8b7594434ea9a157bfe2ae68eabf9f05Jakob Stoklund Olesen /// addMBBLiveIns - Add physreg liveins to basic blocks. 1491b19dc1d8b7594434ea9a157bfe2ae68eabf9f05Jakob Stoklund Olesen void addMBBLiveIns(MachineFunction *); 1501b19dc1d8b7594434ea9a157bfe2ae68eabf9f05Jakob Stoklund Olesen 151071d1c063f1080c70a7141d947a96cf511a1ba45Andrew Trick#ifndef NDEBUG 152071d1c063f1080c70a7141d947a96cf511a1ba45Andrew Trick // Verify each LiveIntervalUnion. 153071d1c063f1080c70a7141d947a96cf511a1ba45Andrew Trick void verify(); 154071d1c063f1080c70a7141d947a96cf511a1ba45Andrew Trick#endif 15518c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick 156533f58ecdd8a4732c2f0e149387c4d8d8d4142deJakob Stoklund Olesen // Use this group name for NamedRegionTimer. 157533f58ecdd8a4732c2f0e149387c4d8d8d4142deJakob Stoklund Olesen static const char *TimerGroupName; 158533f58ecdd8a4732c2f0e149387c4d8d8d4142deJakob Stoklund Olesen 159af24964251e27c2dd863239ba66ffd967b593be5Jakob Stoklund Olesenpublic: 160af24964251e27c2dd863239ba66ffd967b593be5Jakob Stoklund Olesen /// VerifyEnabled - True when -verify-regalloc is given. 161af24964251e27c2dd863239ba66ffd967b593be5Jakob Stoklund Olesen static bool VerifyEnabled; 162af24964251e27c2dd863239ba66ffd967b593be5Jakob Stoklund Olesen 16314e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trickprivate: 164d0bec3e62c98b1f0ef3a41db8f95599b2014c131Jakob Stoklund Olesen void seedLiveVirtRegs(std::priority_queue<std::pair<float, unsigned> >&); 165f4baeaf8485f01beda46d29fd55753199dc68070Andrew Trick 16618c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick void spillReg(LiveInterval &VirtReg, unsigned PhysReg, 16718c57a8a09a7c79fbcf4348b0ad8135246ab984fAndrew Trick SmallVectorImpl<LiveInterval*> &SplitVRegs); 16814e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick}; 16914e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 17014e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick} // end namespace llvm 17114e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick 17214e8d71cc945034d4ee6e76be00e00f14efac62fAndrew Trick#endif // !defined(LLVM_CODEGEN_REGALLOCBASE) 173