Thumb2RegisterInfo.h revision 77521f5232e679aa3de10aaaed2464aa91d7ff55
1//===- Thumb2RegisterInfo.h - Thumb-2 Register Information Impl ----*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the Thumb-2 implementation of the TargetRegisterInfo class. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef THUMB2REGISTERINFO_H 15#define THUMB2REGISTERINFO_H 16 17#include "ARM.h" 18#include "ARMRegisterInfo.h" 19#include "llvm/Target/TargetRegisterInfo.h" 20 21namespace llvm { 22 class ARMSubtarget; 23 class ARMBaseInstrInfo; 24 class Type; 25 26struct Thumb2RegisterInfo : public ARMBaseRegisterInfo { 27public: 28 Thumb2RegisterInfo(const ARMBaseInstrInfo &tii, const ARMSubtarget &STI); 29 30 /// emitLoadConstPool - Emits a load from constpool to materialize the 31 /// specified immediate. 32 void emitLoadConstPool(MachineBasicBlock &MBB, 33 MachineBasicBlock::iterator &MBBI, 34 DebugLoc dl, 35 unsigned DestReg, int Val, 36 ARMCC::CondCodes Pred = ARMCC::AL, 37 unsigned PredReg = 0) const; 38 39 /// Code Generation virtual methods... 40 const TargetRegisterClass * 41 getPhysicalRegisterRegClass(unsigned Reg, MVT VT = MVT::Other) const; 42 43 bool requiresRegisterScavenging(const MachineFunction &MF) const; 44 45 bool hasReservedCallFrame(MachineFunction &MF) const; 46 47 void eliminateCallFramePseudoInstr(MachineFunction &MF, 48 MachineBasicBlock &MBB, 49 MachineBasicBlock::iterator I) const; 50 51 void eliminateFrameIndex(MachineBasicBlock::iterator II, 52 int SPAdj, RegScavenger *RS = NULL) const; 53 54 void emitPrologue(MachineFunction &MF) const; 55 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; 56}; 57} 58 59#endif // THUMB2REGISTERINFO_H 60