MipsInstPrinter.cpp revision 794bf17cbe0bac301ef9e52fb4a0295bfdfe0cab 
1//===-- MipsInstPrinter.cpp - Convert Mips MCInst to assembly syntax --------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This class prints an Mips MCInst to a .s file.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "asm-printer"
15#include "MipsInstPrinter.h"
16#include "llvm/MC/MCExpr.h"
17#include "llvm/MC/MCInst.h"
18#include "llvm/Support/raw_ostream.h"
19#include "llvm/ADT/StringExtras.h"
20using namespace llvm;
21
22#define GET_INSTRUCTION_NAME
23#include "MipsGenAsmWriter.inc"
24
25const char* Mips::MipsFCCToString(Mips::CondCode CC) {
26  switch (CC) {
27  case FCOND_F:
28  case FCOND_T:   return "f";
29  case FCOND_UN:
30  case FCOND_OR:  return "un";
31  case FCOND_OEQ:
32  case FCOND_UNE: return "eq";
33  case FCOND_UEQ:
34  case FCOND_ONE: return "ueq";
35  case FCOND_OLT:
36  case FCOND_UGE: return "olt";
37  case FCOND_ULT:
38  case FCOND_OGE: return "ult";
39  case FCOND_OLE:
40  case FCOND_UGT: return "ole";
41  case FCOND_ULE:
42  case FCOND_OGT: return "ule";
43  case FCOND_SF:
44  case FCOND_ST:  return "sf";
45  case FCOND_NGLE:
46  case FCOND_GLE: return "ngle";
47  case FCOND_SEQ:
48  case FCOND_SNE: return "seq";
49  case FCOND_NGL:
50  case FCOND_GL:  return "ngl";
51  case FCOND_LT:
52  case FCOND_NLT: return "lt";
53  case FCOND_NGE:
54  case FCOND_GE:  return "nge";
55  case FCOND_LE:
56  case FCOND_NLE: return "le";
57  case FCOND_NGT:
58  case FCOND_GT:  return "ngt";
59  }
60}
61
62StringRef MipsInstPrinter::getOpcodeName(unsigned Opcode) const {
63  return getInstructionName(Opcode);
64}
65
66void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
67  OS << '$' << LowercaseString(getRegisterName(RegNo));
68}
69
70void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
71  printInstruction(MI, O);
72}
73
74void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
75                                   raw_ostream &O) {
76  const MCOperand &Op = MI->getOperand(OpNo);
77  if (Op.isReg()) {
78    printRegName(O, Op.getReg());
79    return;
80  }
81
82  if (Op.isImm()) {
83    O << Op.getImm();
84    return;
85  }
86
87  assert(Op.isExpr() && "unknown operand kind in printOperand");
88  O << *Op.getExpr();
89}
90
91void MipsInstPrinter::printUnsignedImm(const MCInst *MI, int opNum,
92                                       raw_ostream &O) {
93  const MCOperand &MO = MI->getOperand(opNum);
94  if (MO.isImm())
95    O << (unsigned short int)MO.getImm();
96  else
97    printOperand(MI, opNum, O);
98}
99
100void MipsInstPrinter::
101printMemOperand(const MCInst *MI, int opNum, raw_ostream &O) {
102  // Load/Store memory operands -- imm($reg)
103  // If PIC target the target is loaded as the
104  // pattern lw $25,%call16($28)
105  printOperand(MI, opNum+1, O);
106  O << "(";
107  printOperand(MI, opNum, O);
108  O << ")";
109}
110
111void MipsInstPrinter::
112printMemOperandEA(const MCInst *MI, int opNum, raw_ostream &O) {
113  // when using stack locations for not load/store instructions
114  // print the same way as all normal 3 operand instructions.
115  printOperand(MI, opNum, O);
116  O << ", ";
117  printOperand(MI, opNum+1, O);
118  return;
119}
120
121void MipsInstPrinter::
122printFCCOperand(const MCInst *MI, int opNum, raw_ostream &O) {
123  const MCOperand& MO = MI->getOperand(opNum);
124  O << MipsFCCToString((Mips::CondCode)MO.getImm());
125}
126