PPCAsmBackend.cpp revision 349c2787cf9e174c8aa955bf8e3b09a405b2aece 
1//===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "MCTargetDesc/PPCMCTargetDesc.h"
11#include "MCTargetDesc/PPCFixupKinds.h"
12#include "llvm/MC/MCAsmBackend.h"
13#include "llvm/MC/MCELFObjectWriter.h"
14#include "llvm/MC/MCFixupKindInfo.h"
15#include "llvm/MC/MCMachObjectWriter.h"
16#include "llvm/MC/MCObjectWriter.h"
17#include "llvm/MC/MCSectionMachO.h"
18#include "llvm/MC/MCValue.h"
19#include "llvm/Object/MachOFormat.h"
20#include "llvm/Support/ELF.h"
21#include "llvm/Support/ErrorHandling.h"
22#include "llvm/Support/TargetRegistry.h"
23using namespace llvm;
24
25static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
26  switch (Kind) {
27  default:
28    llvm_unreachable("Unknown fixup kind!");
29  case FK_Data_1:
30  case FK_Data_2:
31  case FK_Data_4:
32  case FK_Data_8:
33  case PPC::fixup_ppc_toc:
34  case PPC::fixup_ppc_tlsreg:
35  case PPC::fixup_ppc_nofixup:
36    return Value;
37  case PPC::fixup_ppc_lo14:
38  case PPC::fixup_ppc_toc16_ds:
39    return (Value & 0xffff) << 2;
40  case PPC::fixup_ppc_brcond14:
41    return Value & 0xfffc;
42  case PPC::fixup_ppc_br24:
43    return Value & 0x3fffffc;
44#if 0
45  case PPC::fixup_ppc_hi16:
46    return (Value >> 16) & 0xffff;
47#endif
48  case PPC::fixup_ppc_ha16:
49    return ((Value >> 16) + ((Value & 0x8000) ? 1 : 0)) & 0xffff;
50  case PPC::fixup_ppc_lo16:
51  case PPC::fixup_ppc_toc16:
52    return Value & 0xffff;
53  }
54}
55
56namespace {
57class PPCMachObjectWriter : public MCMachObjectTargetWriter {
58public:
59  PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
60                      uint32_t CPUSubtype)
61    : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
62
63  void RecordRelocation(MachObjectWriter *Writer,
64                        const MCAssembler &Asm, const MCAsmLayout &Layout,
65                        const MCFragment *Fragment, const MCFixup &Fixup,
66                        MCValue Target, uint64_t &FixedValue) {
67    llvm_unreachable("Relocation emission for MachO/PPC unimplemented!");
68  }
69};
70
71class PPCAsmBackend : public MCAsmBackend {
72const Target &TheTarget;
73public:
74  PPCAsmBackend(const Target &T) : MCAsmBackend(), TheTarget(T) {}
75
76  unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
77
78  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
79    const static MCFixupKindInfo Infos[PPC::NumTargetFixupKinds] = {
80      // name                    offset  bits  flags
81      { "fixup_ppc_br24",        6,      24,   MCFixupKindInfo::FKF_IsPCRel },
82      { "fixup_ppc_brcond14",    16,     14,   MCFixupKindInfo::FKF_IsPCRel },
83      { "fixup_ppc_lo16",        16,     16,   0 },
84      { "fixup_ppc_ha16",        16,     16,   0 },
85      { "fixup_ppc_lo14",        16,     14,   0 },
86      { "fixup_ppc_toc",          0,     64,   0 },
87      { "fixup_ppc_toc16",       16,     16,   0 },
88      { "fixup_ppc_toc16_ds",    16,     14,   0 },
89      { "fixup_ppc_tlsreg",       0,      0,   0 },
90      { "fixup_ppc_nofixup",      0,      0,   0 }
91    };
92
93    if (Kind < FirstTargetFixupKind)
94      return MCAsmBackend::getFixupKindInfo(Kind);
95
96    assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
97           "Invalid kind!");
98    return Infos[Kind - FirstTargetFixupKind];
99  }
100
101  void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
102                  uint64_t Value) const {
103    Value = adjustFixupValue(Fixup.getKind(), Value);
104    if (!Value) return;           // Doesn't change encoding.
105
106    unsigned Offset = Fixup.getOffset();
107
108    // For each byte of the fragment that the fixup touches, mask in the bits
109    // from the fixup value. The Value has been "split up" into the appropriate
110    // bitfields above.
111    for (unsigned i = 0; i != 4; ++i)
112      Data[Offset + i] |= uint8_t((Value >> ((4 - i - 1)*8)) & 0xff);
113  }
114
115  bool mayNeedRelaxation(const MCInst &Inst) const {
116    // FIXME.
117    return false;
118  }
119
120  bool fixupNeedsRelaxation(const MCFixup &Fixup,
121                            uint64_t Value,
122                            const MCInstFragment *DF,
123                            const MCAsmLayout &Layout) const {
124    // FIXME.
125    llvm_unreachable("relaxInstruction() unimplemented");
126  }
127
128
129  void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
130    // FIXME.
131    llvm_unreachable("relaxInstruction() unimplemented");
132  }
133
134  bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
135    // FIXME: Zero fill for now. That's not right, but at least will get the
136    // section size right.
137    for (uint64_t i = 0; i != Count; ++i)
138      OW->Write8(0);
139    return true;
140  }
141
142  unsigned getPointerSize() const {
143    StringRef Name = TheTarget.getName();
144    if (Name == "ppc64") return 8;
145    assert(Name == "ppc32" && "Unknown target name!");
146    return 4;
147  }
148};
149} // end anonymous namespace
150
151
152// FIXME: This should be in a separate file.
153namespace {
154  class DarwinPPCAsmBackend : public PPCAsmBackend {
155  public:
156    DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { }
157
158    MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
159      bool is64 = getPointerSize() == 8;
160      return createMachObjectWriter(new PPCMachObjectWriter(
161                                      /*Is64Bit=*/is64,
162                                      (is64 ? object::mach::CTM_PowerPC64 :
163                                       object::mach::CTM_PowerPC),
164                                      object::mach::CSPPC_ALL),
165                                    OS, /*IsLittleEndian=*/false);
166    }
167
168    virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
169      return false;
170    }
171  };
172
173  class ELFPPCAsmBackend : public PPCAsmBackend {
174    uint8_t OSABI;
175  public:
176    ELFPPCAsmBackend(const Target &T, uint8_t OSABI) :
177      PPCAsmBackend(T), OSABI(OSABI) { }
178
179
180    MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
181      bool is64 = getPointerSize() == 8;
182      return createPPCELFObjectWriter(OS, is64, OSABI);
183    }
184
185    virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
186      return false;
187    }
188  };
189
190} // end anonymous namespace
191
192
193
194
195MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU) {
196  if (Triple(TT).isOSDarwin())
197    return new DarwinPPCAsmBackend(T);
198
199  uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
200  return new ELFPPCAsmBackend(T, OSABI);
201}
202