PPCAsmBackend.cpp revision e88d17de99c5f46bc8104bc777f657d0299fd0e6
1//===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "MCTargetDesc/PPCMCTargetDesc.h"
11#include "MCTargetDesc/PPCFixupKinds.h"
12#include "llvm/MC/MCAsmBackend.h"
13#include "llvm/MC/MCELFObjectWriter.h"
14#include "llvm/MC/MCFixupKindInfo.h"
15#include "llvm/MC/MCMachObjectWriter.h"
16#include "llvm/MC/MCSectionMachO.h"
17#include "llvm/MC/MCObjectWriter.h"
18#include "llvm/MC/MCValue.h"
19#include "llvm/Object/MachOFormat.h"
20#include "llvm/Support/ELF.h"
21#include "llvm/Support/ErrorHandling.h"
22#include "llvm/Support/TargetRegistry.h"
23using namespace llvm;
24
25static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
26  switch (Kind) {
27  default:
28    llvm_unreachable("Unknown fixup kind!");
29  case FK_Data_1:
30  case FK_Data_2:
31  case FK_Data_4:
32  case FK_Data_8:
33  case PPC::fixup_ppc_toc:
34    return Value;
35  case PPC::fixup_ppc_lo14:
36  case PPC::fixup_ppc_toc16_ds:
37    return (Value & 0xffff) >> 2;
38  case PPC::fixup_ppc_brcond14:
39    return Value & 0x3ffc;
40  case PPC::fixup_ppc_br24:
41    return Value & 0x3fffffc;
42#if 0
43  case PPC::fixup_ppc_hi16:
44    return (Value >> 16) & 0xffff;
45#endif
46  case PPC::fixup_ppc_ha16:
47    return ((Value >> 16) + ((Value & 0x8000) ? 1 : 0)) & 0xffff;
48  case PPC::fixup_ppc_toc16:
49  case PPC::fixup_ppc_lo16:
50    return Value & 0xffff;
51  }
52}
53
54namespace {
55class PPCMachObjectWriter : public MCMachObjectTargetWriter {
56public:
57  PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
58                      uint32_t CPUSubtype)
59    : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
60
61  void RecordRelocation(MachObjectWriter *Writer,
62                        const MCAssembler &Asm, const MCAsmLayout &Layout,
63                        const MCFragment *Fragment, const MCFixup &Fixup,
64                        MCValue Target, uint64_t &FixedValue) {}
65};
66
67class PPCAsmBackend : public MCAsmBackend {
68const Target &TheTarget;
69public:
70  PPCAsmBackend(const Target &T) : MCAsmBackend(), TheTarget(T) {}
71
72  unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
73
74  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
75    const static MCFixupKindInfo Infos[PPC::NumTargetFixupKinds] = {
76      // name                    offset  bits  flags
77      { "fixup_ppc_br24",        6,      24,   MCFixupKindInfo::FKF_IsPCRel },
78      { "fixup_ppc_brcond14",    16,     14,   MCFixupKindInfo::FKF_IsPCRel },
79      { "fixup_ppc_lo16",        16,     16,   0 },
80      { "fixup_ppc_ha16",        16,     16,   0 },
81      { "fixup_ppc_lo14",        16,     14,   0 },
82      { "fixup_ppc_toc",          0,     64,   0 },
83      { "fixup_ppc_toc16",       16,     16,   0 },
84      { "fixup_ppc_toc16_ds",    16,     14,   0 }
85    };
86
87    if (Kind < FirstTargetFixupKind)
88      return MCAsmBackend::getFixupKindInfo(Kind);
89
90    assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
91           "Invalid kind!");
92    return Infos[Kind - FirstTargetFixupKind];
93  }
94
95  bool mayNeedRelaxation(const MCInst &Inst) const {
96    // FIXME.
97    return false;
98  }
99
100  bool fixupNeedsRelaxation(const MCFixup &Fixup,
101                            uint64_t Value,
102                            const MCInstFragment *DF,
103                            const MCAsmLayout &Layout) const {
104    // FIXME.
105    llvm_unreachable("relaxInstruction() unimplemented");
106  }
107
108
109  void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
110    // FIXME.
111    llvm_unreachable("relaxInstruction() unimplemented");
112  }
113
114  bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
115    // FIXME: Zero fill for now. That's not right, but at least will get the
116    // section size right.
117    for (uint64_t i = 0; i != Count; ++i)
118      OW->Write8(0);
119    return true;
120  }
121
122  unsigned getPointerSize() const {
123    StringRef Name = TheTarget.getName();
124    if (Name == "ppc64") return 8;
125    assert(Name == "ppc32" && "Unknown target name!");
126    return 4;
127  }
128};
129} // end anonymous namespace
130
131
132// FIXME: This should be in a separate file.
133namespace {
134  class DarwinPPCAsmBackend : public PPCAsmBackend {
135  public:
136    DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { }
137
138    void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
139                    uint64_t Value) const {
140      llvm_unreachable("UNIMP");
141    }
142
143    MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
144      bool is64 = getPointerSize() == 8;
145      return createMachObjectWriter(new PPCMachObjectWriter(
146                                      /*Is64Bit=*/is64,
147                                      (is64 ? object::mach::CTM_PowerPC64 :
148                                       object::mach::CTM_PowerPC),
149                                      object::mach::CSPPC_ALL),
150                                    OS, /*IsLittleEndian=*/false);
151    }
152
153    virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
154      return false;
155    }
156  };
157
158  class ELFPPCAsmBackend : public PPCAsmBackend {
159    uint8_t OSABI;
160  public:
161    ELFPPCAsmBackend(const Target &T, uint8_t OSABI) :
162      PPCAsmBackend(T), OSABI(OSABI) { }
163
164    void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
165                    uint64_t Value) const {
166      Value = adjustFixupValue(Fixup.getKind(), Value);
167      if (!Value) return;           // Doesn't change encoding.
168
169      unsigned Offset = Fixup.getOffset();
170
171      // For each byte of the fragment that the fixup touches, mask in the bits from
172      // the fixup value. The Value has been "split up" into the appropriate
173      // bitfields above.
174      for (unsigned i = 0; i != 4; ++i)
175        Data[Offset + i] |= uint8_t((Value >> ((4 - i - 1)*8)) & 0xff);
176    }
177
178    MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
179      bool is64 = getPointerSize() == 8;
180      return createPPCELFObjectWriter(OS, is64, OSABI);
181    }
182
183    virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
184      return false;
185    }
186  };
187
188} // end anonymous namespace
189
190
191
192
193MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT) {
194  if (Triple(TT).isOSDarwin())
195    return new DarwinPPCAsmBackend(T);
196
197  uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
198  return new ELFPPCAsmBackend(T, OSABI);
199}
200