1f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===-- SIInstrInfo.cpp - SI Instruction Information ---------------------===// 2f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 3f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// The LLVM Compiler Infrastructure 4f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 5f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// This file is distributed under the University of Illinois Open Source 6f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// License. See LICENSE.TXT for details. 7f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 8f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 9f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 10f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \file 11f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \brief SI Implementation of TargetInstrInfo. 12f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 13f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 14f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 15f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 16f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "SIInstrInfo.h" 17f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "AMDGPUTargetMachine.h" 18f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/CodeGen/MachineInstrBuilder.h" 19f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/CodeGen/MachineRegisterInfo.h" 20f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "llvm/MC/MCInstrDesc.h" 21f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include <stdio.h> 22f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 23f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardusing namespace llvm; 24f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 25f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardSIInstrInfo::SIInstrInfo(AMDGPUTargetMachine &tm) 26f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard : AMDGPUInstrInfo(tm), 27b5632b5b456db647b42239cbd4d8b58c82290c4eBill Wendling RI(tm) 28f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard { } 29f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 30f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardconst SIRegisterInfo &SIInstrInfo::getRegisterInfo() const { 31f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return RI; 32f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 33f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 34f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardvoid 35f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardSIInstrInfo::copyPhysReg(MachineBasicBlock &MBB, 3666501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig MachineBasicBlock::iterator MI, DebugLoc DL, 3766501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig unsigned DestReg, unsigned SrcReg, 3866501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig bool KillSrc) const { 3966501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 40f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // If we are trying to copy to or from SCC, there is a bug somewhere else in 41f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // the backend. While it may be theoretically possible to do this, it should 42f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard // never be necessary. 43f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard assert(DestReg != AMDGPU::SCC && SrcReg != AMDGPU::SCC); 44f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 45787e71df693e94cc512f3e439bf91609a8ec9baeCraig Topper static const int16_t Sub0_15[] = { 4666501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3, 4766501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig AMDGPU::sub4, AMDGPU::sub5, AMDGPU::sub6, AMDGPU::sub7, 4866501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig AMDGPU::sub8, AMDGPU::sub9, AMDGPU::sub10, AMDGPU::sub11, 4966501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig AMDGPU::sub12, AMDGPU::sub13, AMDGPU::sub14, AMDGPU::sub15, 0 5066501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig }; 5166501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 52787e71df693e94cc512f3e439bf91609a8ec9baeCraig Topper static const int16_t Sub0_7[] = { 5366501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3, 5466501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig AMDGPU::sub4, AMDGPU::sub5, AMDGPU::sub6, AMDGPU::sub7, 0 5566501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig }; 5666501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 57787e71df693e94cc512f3e439bf91609a8ec9baeCraig Topper static const int16_t Sub0_3[] = { 5866501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3, 0 5966501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig }; 6066501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 61787e71df693e94cc512f3e439bf91609a8ec9baeCraig Topper static const int16_t Sub0_2[] = { 624d0e8a8a3e2e5b98f598acad4d57452b99d52e74Christian Konig AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, 0 634d0e8a8a3e2e5b98f598acad4d57452b99d52e74Christian Konig }; 644d0e8a8a3e2e5b98f598acad4d57452b99d52e74Christian Konig 65787e71df693e94cc512f3e439bf91609a8ec9baeCraig Topper static const int16_t Sub0_1[] = { 6666501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig AMDGPU::sub0, AMDGPU::sub1, 0 6766501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig }; 6866501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 6966501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig unsigned Opcode; 7066501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig const int16_t *SubIndices; 7166501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 723851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig if (AMDGPU::M0 == DestReg) { 733851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig // Check if M0 isn't already set to this value 743851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig for (MachineBasicBlock::reverse_iterator E = MBB.rend(), 753851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig I = MachineBasicBlock::reverse_iterator(MI); I != E; ++I) { 763851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig 773851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig if (!I->definesRegister(AMDGPU::M0)) 783851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig continue; 793851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig 803851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig unsigned Opc = I->getOpcode(); 813851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig if (Opc != TargetOpcode::COPY && Opc != AMDGPU::S_MOV_B32) 823851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig break; 833851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig 843851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig if (!I->readsRegister(SrcReg)) 853851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig break; 863851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig 873851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig // The copy isn't necessary 883851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig return; 893851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig } 903851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig } 913851e9869f8da4bf0a733bdd0510bd6579d00b09Christian Konig 9266501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig if (AMDGPU::SReg_32RegClass.contains(DestReg)) { 9366501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig assert(AMDGPU::SReg_32RegClass.contains(SrcReg)); 9466501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), DestReg) 9566501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig .addReg(SrcReg, getKillRegState(KillSrc)); 9666501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig return; 9766501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 9860fc58262f4dba20c1ea5ede63e5a2c322489d32Tom Stellard } else if (AMDGPU::SReg_64RegClass.contains(DestReg)) { 99f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard assert(AMDGPU::SReg_64RegClass.contains(SrcReg)); 100f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), DestReg) 101f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard .addReg(SrcReg, getKillRegState(KillSrc)); 10266501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig return; 10366501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 10466501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig } else if (AMDGPU::SReg_128RegClass.contains(DestReg)) { 10566501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig assert(AMDGPU::SReg_128RegClass.contains(SrcReg)); 10666501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig Opcode = AMDGPU::S_MOV_B32; 10766501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig SubIndices = Sub0_3; 10866501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 10966501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig } else if (AMDGPU::SReg_256RegClass.contains(DestReg)) { 11066501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig assert(AMDGPU::SReg_256RegClass.contains(SrcReg)); 11166501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig Opcode = AMDGPU::S_MOV_B32; 11266501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig SubIndices = Sub0_7; 11366501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 11466501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig } else if (AMDGPU::SReg_512RegClass.contains(DestReg)) { 11566501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig assert(AMDGPU::SReg_512RegClass.contains(SrcReg)); 11666501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig Opcode = AMDGPU::S_MOV_B32; 11766501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig SubIndices = Sub0_15; 11866501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 119f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } else if (AMDGPU::VReg_32RegClass.contains(DestReg)) { 120f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard assert(AMDGPU::VReg_32RegClass.contains(SrcReg) || 12166501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig AMDGPU::SReg_32RegClass.contains(SrcReg)); 122f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DestReg) 123f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard .addReg(SrcReg, getKillRegState(KillSrc)); 12466501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig return; 12566501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 12666501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig } else if (AMDGPU::VReg_64RegClass.contains(DestReg)) { 12766501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig assert(AMDGPU::VReg_64RegClass.contains(SrcReg) || 12866501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig AMDGPU::SReg_64RegClass.contains(SrcReg)); 12966501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig Opcode = AMDGPU::V_MOV_B32_e32; 13066501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig SubIndices = Sub0_1; 13166501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 1324d0e8a8a3e2e5b98f598acad4d57452b99d52e74Christian Konig } else if (AMDGPU::VReg_96RegClass.contains(DestReg)) { 1334d0e8a8a3e2e5b98f598acad4d57452b99d52e74Christian Konig assert(AMDGPU::VReg_96RegClass.contains(SrcReg)); 1344d0e8a8a3e2e5b98f598acad4d57452b99d52e74Christian Konig Opcode = AMDGPU::V_MOV_B32_e32; 1354d0e8a8a3e2e5b98f598acad4d57452b99d52e74Christian Konig SubIndices = Sub0_2; 1364d0e8a8a3e2e5b98f598acad4d57452b99d52e74Christian Konig 13766501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig } else if (AMDGPU::VReg_128RegClass.contains(DestReg)) { 13866501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig assert(AMDGPU::VReg_128RegClass.contains(SrcReg) || 13966501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig AMDGPU::SReg_128RegClass.contains(SrcReg)); 14066501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig Opcode = AMDGPU::V_MOV_B32_e32; 14166501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig SubIndices = Sub0_3; 14266501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 14366501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig } else if (AMDGPU::VReg_256RegClass.contains(DestReg)) { 14466501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig assert(AMDGPU::VReg_256RegClass.contains(SrcReg) || 14566501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig AMDGPU::SReg_256RegClass.contains(SrcReg)); 14666501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig Opcode = AMDGPU::V_MOV_B32_e32; 14766501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig SubIndices = Sub0_7; 14866501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 14966501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig } else if (AMDGPU::VReg_512RegClass.contains(DestReg)) { 15066501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig assert(AMDGPU::VReg_512RegClass.contains(SrcReg) || 15166501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig AMDGPU::SReg_512RegClass.contains(SrcReg)); 15266501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig Opcode = AMDGPU::V_MOV_B32_e32; 15366501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig SubIndices = Sub0_15; 15466501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 155f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } else { 15666501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig llvm_unreachable("Can't copy register!"); 15766501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig } 15866501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 15966501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig while (unsigned SubIdx = *SubIndices++) { 16066501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig MachineInstrBuilder Builder = BuildMI(MBB, MI, DL, 16166501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig get(Opcode), RI.getSubReg(DestReg, SubIdx)); 16266501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 16366501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig Builder.addReg(RI.getSubReg(SrcReg, SubIdx), getKillRegState(KillSrc)); 16466501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig 16566501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig if (*SubIndices) 16666501123d1b7b0395a9de091bf72b2cd42a04dc6Christian Konig Builder.addReg(DestReg, RegState::Define | RegState::Implicit); 167f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 168f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 169f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 170e49230895d9c666b84beaa748259fbf1f6715122Christian Konigunsigned SIInstrInfo::commuteOpcode(unsigned Opcode) const { 171e49230895d9c666b84beaa748259fbf1f6715122Christian Konig 172e49230895d9c666b84beaa748259fbf1f6715122Christian Konig int NewOpc; 173e49230895d9c666b84beaa748259fbf1f6715122Christian Konig 174e49230895d9c666b84beaa748259fbf1f6715122Christian Konig // Try to map original to commuted opcode 175e49230895d9c666b84beaa748259fbf1f6715122Christian Konig if ((NewOpc = AMDGPU::getCommuteRev(Opcode)) != -1) 176e49230895d9c666b84beaa748259fbf1f6715122Christian Konig return NewOpc; 177e49230895d9c666b84beaa748259fbf1f6715122Christian Konig 178e49230895d9c666b84beaa748259fbf1f6715122Christian Konig // Try to map commuted to original opcode 179e49230895d9c666b84beaa748259fbf1f6715122Christian Konig if ((NewOpc = AMDGPU::getCommuteOrig(Opcode)) != -1) 180e49230895d9c666b84beaa748259fbf1f6715122Christian Konig return NewOpc; 181e49230895d9c666b84beaa748259fbf1f6715122Christian Konig 182e49230895d9c666b84beaa748259fbf1f6715122Christian Konig return Opcode; 183e49230895d9c666b84beaa748259fbf1f6715122Christian Konig} 184e49230895d9c666b84beaa748259fbf1f6715122Christian Konig 185b3d1eaded7d7a874bbda2b0d322df7389c724bfcChristian KonigMachineInstr *SIInstrInfo::commuteInstruction(MachineInstr *MI, 186b3d1eaded7d7a874bbda2b0d322df7389c724bfcChristian Konig bool NewMI) const { 187b3d1eaded7d7a874bbda2b0d322df7389c724bfcChristian Konig 188b3d1eaded7d7a874bbda2b0d322df7389c724bfcChristian Konig if (MI->getNumOperands() < 3 || !MI->getOperand(1).isReg() || 189b3d1eaded7d7a874bbda2b0d322df7389c724bfcChristian Konig !MI->getOperand(2).isReg()) 190b3d1eaded7d7a874bbda2b0d322df7389c724bfcChristian Konig return 0; 191b3d1eaded7d7a874bbda2b0d322df7389c724bfcChristian Konig 192e49230895d9c666b84beaa748259fbf1f6715122Christian Konig MI = TargetInstrInfo::commuteInstruction(MI, NewMI); 193e49230895d9c666b84beaa748259fbf1f6715122Christian Konig 194e49230895d9c666b84beaa748259fbf1f6715122Christian Konig if (MI) 195e49230895d9c666b84beaa748259fbf1f6715122Christian Konig MI->setDesc(get(commuteOpcode(MI->getOpcode()))); 196e49230895d9c666b84beaa748259fbf1f6715122Christian Konig 197e49230895d9c666b84beaa748259fbf1f6715122Christian Konig return MI; 198b3d1eaded7d7a874bbda2b0d322df7389c724bfcChristian Konig} 199b3d1eaded7d7a874bbda2b0d322df7389c724bfcChristian Konig 200f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardMachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg, 201f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard int64_t Imm) const { 202e25e490793241e471036c3e2f969ce6a068e5ce1Christian Konig MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::V_MOV_B32_e32), DebugLoc()); 2036b207d3cfa6b7be87ebde25c6c002f776f3d1595NAKAMURA Takumi MachineInstrBuilder MIB(*MF, MI); 2046b207d3cfa6b7be87ebde25c6c002f776f3d1595NAKAMURA Takumi MIB.addReg(DstReg, RegState::Define); 2056b207d3cfa6b7be87ebde25c6c002f776f3d1595NAKAMURA Takumi MIB.addImm(Imm); 206f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 207f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return MI; 208f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 209f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 210f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 211f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardbool SIInstrInfo::isMov(unsigned Opcode) const { 212f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard switch(Opcode) { 213f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard default: return false; 214f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPU::S_MOV_B32: 215f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPU::S_MOV_B64: 216f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPU::V_MOV_B32_e32: 217f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPU::V_MOV_B32_e64: 218f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return true; 219f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 220f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 221f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 222f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardbool 223f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardSIInstrInfo::isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const { 224f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return RC != &AMDGPU::EXECRegRegClass; 225f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 226c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 227c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard//===----------------------------------------------------------------------===// 228c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard// Indirect addressing callbacks 229c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard//===----------------------------------------------------------------------===// 230c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 231c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellardunsigned SIInstrInfo::calculateIndirectAddress(unsigned RegIndex, 232c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned Channel) const { 233c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard assert(Channel == 0); 234c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard return RegIndex; 235c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard} 236c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 237c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 238c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellardint SIInstrInfo::getIndirectIndexBegin(const MachineFunction &MF) const { 239c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard llvm_unreachable("Unimplemented"); 240c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard} 241c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 242c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellardint SIInstrInfo::getIndirectIndexEnd(const MachineFunction &MF) const { 243c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard llvm_unreachable("Unimplemented"); 244c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard} 245c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 246c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellardconst TargetRegisterClass *SIInstrInfo::getIndirectAddrStoreRegClass( 247c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned SourceReg) const { 248c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard llvm_unreachable("Unimplemented"); 249c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard} 250c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 251c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellardconst TargetRegisterClass *SIInstrInfo::getIndirectAddrLoadRegClass() const { 252c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard llvm_unreachable("Unimplemented"); 253c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard} 254c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 255c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom StellardMachineInstrBuilder SIInstrInfo::buildIndirectWrite( 256c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard MachineBasicBlock *MBB, 257c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard MachineBasicBlock::iterator I, 258c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned ValueReg, 259c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned Address, unsigned OffsetReg) const { 260c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard llvm_unreachable("Unimplemented"); 261c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard} 262c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 263c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom StellardMachineInstrBuilder SIInstrInfo::buildIndirectRead( 264c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard MachineBasicBlock *MBB, 265c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard MachineBasicBlock::iterator I, 266c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned ValueReg, 267c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned Address, unsigned OffsetReg) const { 268c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard llvm_unreachable("Unimplemented"); 269c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard} 270c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 271c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellardconst TargetRegisterClass *SIInstrInfo::getSuperIndirectRegClass() const { 272c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard llvm_unreachable("Unimplemented"); 273c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard} 274